LeeT WiFiLamp code and test

Dependencies:   ESP8266_WebServer mbed

Fork of WiFiLamp by Sebastian Schocke

Committer:
sschocke
Date:
Thu Nov 20 17:44:22 2014 +0000
Revision:
1:f07afcffeb5a
Extracting URI and Pololu LED Intergation

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sschocke 1:f07afcffeb5a 1 #include "PololuLedStrip.h"
sschocke 1:f07afcffeb5a 2
sschocke 1:f07afcffeb5a 3 bool PololuLedStrip::interruptFriendly = false;
sschocke 1:f07afcffeb5a 4
sschocke 1:f07afcffeb5a 5 // The two timed delays, in units of half-cycles.
sschocke 1:f07afcffeb5a 6 uint8_t led_strip_write_delays[2];
sschocke 1:f07afcffeb5a 7
sschocke 1:f07afcffeb5a 8 void PololuLedStrip::calculateDelays()
sschocke 1:f07afcffeb5a 9 {
sschocke 1:f07afcffeb5a 10 int f_mhz = SystemCoreClock / 1000000; // Clock frequency in MHz.
sschocke 1:f07afcffeb5a 11
sschocke 1:f07afcffeb5a 12 if (f_mhz <= 48)
sschocke 1:f07afcffeb5a 13 {
sschocke 1:f07afcffeb5a 14 // The delays below result in 360/1120 ns pulses and a 1880 ns period on the mbed NXP LPC11U24.
sschocke 1:f07afcffeb5a 15 led_strip_write_delays[0] = 0;
sschocke 1:f07afcffeb5a 16 led_strip_write_delays[1] = 0;
sschocke 1:f07afcffeb5a 17 }
sschocke 1:f07afcffeb5a 18 else
sschocke 1:f07afcffeb5a 19 {
sschocke 1:f07afcffeb5a 20 // Try to generally compute what the delays should be for a ide range of clock frequencies.
sschocke 1:f07afcffeb5a 21
sschocke 1:f07afcffeb5a 22 // The fudge factors below were experimentally chosen so that we would have
sschocke 1:f07afcffeb5a 23 // ~100/840 ns pulses and a ~1430 ns period on the mbed NXP LPC1768 (96 MHz Cortex-M3).
sschocke 1:f07afcffeb5a 24 // There seem to be some ~100 ns inconsistencies in the timing depending on which example program is
sschocke 1:f07afcffeb5a 25 // running; the most likely explanation is some kind of flash caching that affects the timing.
sschocke 1:f07afcffeb5a 26 // If you ever change these numbers, it is important to check the the subtractions below
sschocke 1:f07afcffeb5a 27 // will not overflow in the worst case (smallest possible f_mhz).
sschocke 1:f07afcffeb5a 28 led_strip_write_delays[0] = 750*f_mhz/1000 - 33;
sschocke 1:f07afcffeb5a 29 led_strip_write_delays[1] = 550*f_mhz/1000 - 20;
sschocke 1:f07afcffeb5a 30 }
sschocke 1:f07afcffeb5a 31
sschocke 1:f07afcffeb5a 32 // Convert from units of cycles to units of half-cycles; it makes the assembly faster.
sschocke 1:f07afcffeb5a 33 for(int i = 0; i < 2; i++)
sschocke 1:f07afcffeb5a 34 {
sschocke 1:f07afcffeb5a 35 led_strip_write_delays[i] <<= 1;
sschocke 1:f07afcffeb5a 36 }
sschocke 1:f07afcffeb5a 37 }
sschocke 1:f07afcffeb5a 38
sschocke 1:f07afcffeb5a 39 PololuLedStrip::PololuLedStrip(PinName pinName)
sschocke 1:f07afcffeb5a 40 {
sschocke 1:f07afcffeb5a 41 gpio_init_out(&gpio, pinName);
sschocke 1:f07afcffeb5a 42 }
sschocke 1:f07afcffeb5a 43
sschocke 1:f07afcffeb5a 44 void PololuLedStrip::write(rgb_color * colors, unsigned int count)
sschocke 1:f07afcffeb5a 45 {
sschocke 1:f07afcffeb5a 46 calculateDelays();
sschocke 1:f07afcffeb5a 47
sschocke 1:f07afcffeb5a 48 __disable_irq(); // Disable interrupts temporarily because we don't want our pulse timing to be messed up.
sschocke 1:f07afcffeb5a 49
sschocke 1:f07afcffeb5a 50 while(count--)
sschocke 1:f07afcffeb5a 51 {
sschocke 1:f07afcffeb5a 52 led_strip_write_color(colors, gpio.reg_set, gpio.reg_clr, gpio.mask);
sschocke 1:f07afcffeb5a 53 colors++;
sschocke 1:f07afcffeb5a 54
sschocke 1:f07afcffeb5a 55 if (interruptFriendly)
sschocke 1:f07afcffeb5a 56 {
sschocke 1:f07afcffeb5a 57 __enable_irq();
sschocke 1:f07afcffeb5a 58 __nop();
sschocke 1:f07afcffeb5a 59 __nop();
sschocke 1:f07afcffeb5a 60 __nop();
sschocke 1:f07afcffeb5a 61 __disable_irq();
sschocke 1:f07afcffeb5a 62 }
sschocke 1:f07afcffeb5a 63 }
sschocke 1:f07afcffeb5a 64
sschocke 1:f07afcffeb5a 65 __enable_irq(); // Re-enable interrupts now that we are done.
sschocke 1:f07afcffeb5a 66 wait_us(24); // Hold the line low for 24 microseconds to send the reset signal.
sschocke 1:f07afcffeb5a 67
sschocke 1:f07afcffeb5a 68 //*(gpio.reg_set) = gpio.mask;
sschocke 1:f07afcffeb5a 69 //*(gpio.reg_clr) = gpio.mask;
sschocke 1:f07afcffeb5a 70
sschocke 1:f07afcffeb5a 71 }