Laxmi Kant Tiwari / mbed-dsp

CMSIS DSP Lib

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cmsis_dsp/BasicMathFunctions/arm_negate_q7.c@1:fdd22bb7aa52, 2012-11-28 (annotated)

Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_negate_q7.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Negates Q7 vectors.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.7 2010/06/10
emilmont 1:fdd22bb7aa52 33 * Misra-C changes done
emilmont 1:fdd22bb7aa52 34 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 35
emilmont 1:fdd22bb7aa52 36 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 37
emilmont 1:fdd22bb7aa52 38 /**
emilmont 1:fdd22bb7aa52 39 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 40 */
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 /**
emilmont 1:fdd22bb7aa52 43 * @addtogroup negate
emilmont 1:fdd22bb7aa52 44 * @{
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @brief Negates the elements of a Q7 vector.
emilmont 1:fdd22bb7aa52 49 * @param[in] *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 50 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 51 * @param[in] blockSize number of samples in the vector
emilmont 1:fdd22bb7aa52 52 * @return none.
emilmont 1:fdd22bb7aa52 53 *
emilmont 1:fdd22bb7aa52 54 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 55 * \par
emilmont 1:fdd22bb7aa52 56 * The function uses saturating arithmetic.
emilmont 1:fdd22bb7aa52 57 * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
emilmont 1:fdd22bb7aa52 58 */
emilmont 1:fdd22bb7aa52 59
emilmont 1:fdd22bb7aa52 60 void arm_negate_q7(
emilmont 1:fdd22bb7aa52 61 q7_t * pSrc,
emilmont 1:fdd22bb7aa52 62 q7_t * pDst,
emilmont 1:fdd22bb7aa52 63 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 64 {
emilmont 1:fdd22bb7aa52 65 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 66 q7_t in;
emilmont 1:fdd22bb7aa52 67
emilmont 1:fdd22bb7aa52 68 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 69
emilmont 1:fdd22bb7aa52 70 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 71 q31_t input; /* Input values1-4 */
emilmont 1:fdd22bb7aa52 72 q31_t zero = 0x00000000;
emilmont 1:fdd22bb7aa52 73
emilmont 1:fdd22bb7aa52 74
emilmont 1:fdd22bb7aa52 75 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 76 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 79 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 80 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 81 {
emilmont 1:fdd22bb7aa52 82 /* C = -A */
emilmont 1:fdd22bb7aa52 83 /* Read four inputs */
emilmont 1:fdd22bb7aa52 84 input = *__SIMD32(pSrc)++;
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86 /* Store the Negated results in the destination buffer in a single cycle by packing the results */
emilmont 1:fdd22bb7aa52 87 *__SIMD32(pDst)++ = __QSUB8(zero, input);
emilmont 1:fdd22bb7aa52 88
emilmont 1:fdd22bb7aa52 89 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 90 blkCnt--;
emilmont 1:fdd22bb7aa52 91 }
emilmont 1:fdd22bb7aa52 92
emilmont 1:fdd22bb7aa52 93 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 94 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 95 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 96
emilmont 1:fdd22bb7aa52 97 #else
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 102 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 105
emilmont 1:fdd22bb7aa52 106 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 107 {
emilmont 1:fdd22bb7aa52 108 /* C = -A */
emilmont 1:fdd22bb7aa52 109 /* Negate and then store the results in the destination buffer. */ \
emilmont 1:fdd22bb7aa52 110 in = *pSrc++;
emilmont 1:fdd22bb7aa52 111 *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in;
emilmont 1:fdd22bb7aa52 112
emilmont 1:fdd22bb7aa52 113 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 114 blkCnt--;
emilmont 1:fdd22bb7aa52 115 }
emilmont 1:fdd22bb7aa52 116 }
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 /**
emilmont 1:fdd22bb7aa52 119 * @} end of negate group
emilmont 1:fdd22bb7aa52 120 */