Laxmi Kant Tiwari / mbed-dsp

CMSIS DSP Lib

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cmsis_dsp/BasicMathFunctions/arm_add_q31.c@1:fdd22bb7aa52, 2012-11-28 (annotated)

Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_add_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Q31 vector addition.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.7 2010/06/10
emilmont 1:fdd22bb7aa52 33 * Misra-C changes done
emilmont 1:fdd22bb7aa52 34 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 35
emilmont 1:fdd22bb7aa52 36 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 37
emilmont 1:fdd22bb7aa52 38 /**
emilmont 1:fdd22bb7aa52 39 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 40 */
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 /**
emilmont 1:fdd22bb7aa52 43 * @addtogroup BasicAdd
emilmont 1:fdd22bb7aa52 44 * @{
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47
emilmont 1:fdd22bb7aa52 48 /**
emilmont 1:fdd22bb7aa52 49 * @brief Q31 vector addition.
emilmont 1:fdd22bb7aa52 50 * @param[in] *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 51 * @param[in] *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 52 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 53 * @param[in] blockSize number of samples in each vector
emilmont 1:fdd22bb7aa52 54 * @return none.
emilmont 1:fdd22bb7aa52 55 *
emilmont 1:fdd22bb7aa52 56 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 57 * \par
emilmont 1:fdd22bb7aa52 58 * The function uses saturating arithmetic.
emilmont 1:fdd22bb7aa52 59 * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
emilmont 1:fdd22bb7aa52 60 */
emilmont 1:fdd22bb7aa52 61
emilmont 1:fdd22bb7aa52 62 void arm_add_q31(
emilmont 1:fdd22bb7aa52 63 q31_t * pSrcA,
emilmont 1:fdd22bb7aa52 64 q31_t * pSrcB,
emilmont 1:fdd22bb7aa52 65 q31_t * pDst,
emilmont 1:fdd22bb7aa52 66 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 67 {
emilmont 1:fdd22bb7aa52 68 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 69
emilmont 1:fdd22bb7aa52 70 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 71
emilmont 1:fdd22bb7aa52 72 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 73 q31_t inA1, inA2, inA3, inA4;
emilmont 1:fdd22bb7aa52 74 q31_t inB1, inB2, inB3, inB4;
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 77 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 78
emilmont 1:fdd22bb7aa52 79 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 80 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 81 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 82 {
emilmont 1:fdd22bb7aa52 83 /* C = A + B */
emilmont 1:fdd22bb7aa52 84 /* Add and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 85 inA1 = *pSrcA++;
emilmont 1:fdd22bb7aa52 86 inA2 = *pSrcA++;
emilmont 1:fdd22bb7aa52 87 inB1 = *pSrcB++;
emilmont 1:fdd22bb7aa52 88 inB2 = *pSrcB++;
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 inA3 = *pSrcA++;
emilmont 1:fdd22bb7aa52 91 inA4 = *pSrcA++;
emilmont 1:fdd22bb7aa52 92 inB3 = *pSrcB++;
emilmont 1:fdd22bb7aa52 93 inB4 = *pSrcB++;
emilmont 1:fdd22bb7aa52 94
emilmont 1:fdd22bb7aa52 95 *pDst++ = __QADD(inA1, inB1);
emilmont 1:fdd22bb7aa52 96 *pDst++ = __QADD(inA2, inB2);
emilmont 1:fdd22bb7aa52 97 *pDst++ = __QADD(inA3, inB3);
emilmont 1:fdd22bb7aa52 98 *pDst++ = __QADD(inA4, inB4);
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 101 blkCnt--;
emilmont 1:fdd22bb7aa52 102 }
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 105 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 106 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 107
emilmont 1:fdd22bb7aa52 108 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 109 {
emilmont 1:fdd22bb7aa52 110 /* C = A + B */
emilmont 1:fdd22bb7aa52 111 /* Add and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 112 *pDst++ = __QADD(*pSrcA++, *pSrcB++);
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 115 blkCnt--;
emilmont 1:fdd22bb7aa52 116 }
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 #else
emilmont 1:fdd22bb7aa52 119
emilmont 1:fdd22bb7aa52 120 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123
emilmont 1:fdd22bb7aa52 124 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 125 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 128 {
emilmont 1:fdd22bb7aa52 129 /* C = A + B */
emilmont 1:fdd22bb7aa52 130 /* Add and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 131 *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 134 blkCnt--;
emilmont 1:fdd22bb7aa52 135 }
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 }
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 /**
emilmont 1:fdd22bb7aa52 142 * @} end of BasicAdd group
emilmont 1:fdd22bb7aa52 143 */