Laxmi Kant Tiwari / mbed-dsp

CMSIS DSP Lib

Fork of mbed-dsp by mbed official

cmsis_dsp/StatisticsFunctions/arm_rms_q31.c@4:9cee975aadce, 2014-06-23 (annotated)

Committer:
mbed_official
Date:
Mon Jun 23 09:30:09 2014 +0100
Revision:
4:9cee975aadce
Parent:
3:7a284390b0ce 
Synchronized with git revision 6e7c7bcec41226f536474daae3c13d49e4c0e865



Full URL: https://github.com/mbedmicro/mbed/commit/6e7c7bcec41226f536474daae3c13d49e4c0e865/



Fix signed unsigned compare in dsp library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 3:7a284390b0ce 2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 3:7a284390b0ce 4 * $Date: 17. January 2013
mbed_official 3:7a284390b0ce 5 * $Revision: V1.4.1
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_rms_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Root Mean Square of the elements of a Q31 vector.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @addtogroup RMS
emilmont 1:fdd22bb7aa52 45 * @{
emilmont 1:fdd22bb7aa52 46 */
emilmont 1:fdd22bb7aa52 47
emilmont 1:fdd22bb7aa52 48
emilmont 1:fdd22bb7aa52 49 /**
emilmont 1:fdd22bb7aa52 50 * @brief Root Mean Square of the elements of a Q31 vector.
emilmont 1:fdd22bb7aa52 51 * @param[in] *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 52 * @param[in] blockSize length of the input vector
emilmont 1:fdd22bb7aa52 53 * @param[out] *pResult rms value returned here
emilmont 1:fdd22bb7aa52 54 * @return none.
emilmont 1:fdd22bb7aa52 55 *
emilmont 1:fdd22bb7aa52 56 * @details
emilmont 1:fdd22bb7aa52 57 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 58 *
emilmont 1:fdd22bb7aa52 59 *\par
emilmont 1:fdd22bb7aa52 60 * The function is implemented using an internal 64-bit accumulator.
emilmont 1:fdd22bb7aa52 61 * The input is represented in 1.31 format, and intermediate multiplication
emilmont 1:fdd22bb7aa52 62 * yields a 2.62 format.
emilmont 1:fdd22bb7aa52 63 * The accumulator maintains full precision of the intermediate multiplication results,
emilmont 1:fdd22bb7aa52 64 * but provides only a single guard bit.
emilmont 1:fdd22bb7aa52 65 * There is no saturation on intermediate additions.
emilmont 1:fdd22bb7aa52 66 * If the accumulator overflows, it wraps around and distorts the result.
emilmont 1:fdd22bb7aa52 67 * In order to avoid overflows completely, the input signal must be scaled down by
emilmont 1:fdd22bb7aa52 68 * log2(blockSize) bits, as a total of blockSize additions are performed internally.
emilmont 1:fdd22bb7aa52 69 * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
emilmont 1:fdd22bb7aa52 70 *
emilmont 1:fdd22bb7aa52 71 */
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73 void arm_rms_q31(
emilmont 1:fdd22bb7aa52 74 q31_t * pSrc,
emilmont 1:fdd22bb7aa52 75 uint32_t blockSize,
emilmont 1:fdd22bb7aa52 76 q31_t * pResult)
emilmont 1:fdd22bb7aa52 77 {
emilmont 1:fdd22bb7aa52 78 q63_t sum = 0; /* accumulator */
emilmont 1:fdd22bb7aa52 79 q31_t in; /* Temporary variable to store the input */
emilmont 1:fdd22bb7aa52 80 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 81
mbed_official 3:7a284390b0ce 82 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 83
emilmont 1:fdd22bb7aa52 84 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86 q31_t in1, in2, in3, in4; /* Temporary input variables */
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 89 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 90
emilmont 1:fdd22bb7aa52 91 /* First part of the processing with loop unrolling. Compute 8 outputs at a time.
emilmont 1:fdd22bb7aa52 92 ** a second loop below computes the remaining 1 to 7 samples. */
emilmont 1:fdd22bb7aa52 93 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 94 {
emilmont 1:fdd22bb7aa52 95 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
emilmont 1:fdd22bb7aa52 96 /* Compute sum of the squares and then store the result in a temporary variable, sum */
emilmont 1:fdd22bb7aa52 97 /* read two samples from source buffer */
emilmont 1:fdd22bb7aa52 98 in1 = pSrc[0];
emilmont 1:fdd22bb7aa52 99 in2 = pSrc[1];
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101 /* calculate power and accumulate to accumulator */
emilmont 1:fdd22bb7aa52 102 sum += (q63_t) in1 *in1;
emilmont 1:fdd22bb7aa52 103 sum += (q63_t) in2 *in2;
emilmont 1:fdd22bb7aa52 104
emilmont 1:fdd22bb7aa52 105 /* read two samples from source buffer */
emilmont 1:fdd22bb7aa52 106 in3 = pSrc[2];
emilmont 1:fdd22bb7aa52 107 in4 = pSrc[3];
emilmont 1:fdd22bb7aa52 108
emilmont 1:fdd22bb7aa52 109 /* calculate power and accumulate to accumulator */
emilmont 1:fdd22bb7aa52 110 sum += (q63_t) in3 *in3;
emilmont 1:fdd22bb7aa52 111 sum += (q63_t) in4 *in4;
emilmont 1:fdd22bb7aa52 112
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 /* update source buffer to process next samples */
emilmont 1:fdd22bb7aa52 115 pSrc += 4u;
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 118 blkCnt--;
emilmont 1:fdd22bb7aa52 119 }
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 122 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 123 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 #else
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 128 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 129
mbed_official 3:7a284390b0ce 130 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 133 {
emilmont 1:fdd22bb7aa52 134 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
emilmont 1:fdd22bb7aa52 135 /* Compute sum of the squares and then store the results in a temporary variable, sum */
emilmont 1:fdd22bb7aa52 136 in = *pSrc++;
emilmont 1:fdd22bb7aa52 137 sum += (q63_t) in *in;
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 140 blkCnt--;
emilmont 1:fdd22bb7aa52 141 }
emilmont 1:fdd22bb7aa52 142
emilmont 1:fdd22bb7aa52 143 /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
emilmont 1:fdd22bb7aa52 144
emilmont 1:fdd22bb7aa52 145 sum = __SSAT(sum >> 31, 31);
emilmont 1:fdd22bb7aa52 146
emilmont 1:fdd22bb7aa52 147
emilmont 1:fdd22bb7aa52 148 /* Compute Rms and store the result in the destination vector */
emilmont 1:fdd22bb7aa52 149 arm_sqrt_q31((q31_t) ((q31_t) sum / (int32_t) blockSize), pResult);
emilmont 1:fdd22bb7aa52 150 }
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152 /**
emilmont 1:fdd22bb7aa52 153 * @} end of RMS group
emilmont 1:fdd22bb7aa52 154 */