Laxmi Kant Tiwari / mbed-dsp

CMSIS DSP Lib

Fork of mbed-dsp by mbed official

cmsis_dsp/BasicMathFunctions/arm_mult_q15.c@4:9cee975aadce, 2014-06-23 (annotated)

Committer:
mbed_official
Date:
Mon Jun 23 09:30:09 2014 +0100
Revision:
4:9cee975aadce
Parent:
3:7a284390b0ce 
Synchronized with git revision 6e7c7bcec41226f536474daae3c13d49e4c0e865



Full URL: https://github.com/mbedmicro/mbed/commit/6e7c7bcec41226f536474daae3c13d49e4c0e865/



Fix signed unsigned compare in dsp library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 3:7a284390b0ce 2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 3:7a284390b0ce 4 * $Date: 17. January 2013
mbed_official 3:7a284390b0ce 5 * $Revision: V1.4.1
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_mult_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q15 vector multiplication.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup BasicMult
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52
emilmont 1:fdd22bb7aa52 53 /**
emilmont 1:fdd22bb7aa52 54 * @brief Q15 vector multiplication
emilmont 1:fdd22bb7aa52 55 * @param[in] *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 56 * @param[in] *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 57 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 58 * @param[in] blockSize number of samples in each vector
emilmont 1:fdd22bb7aa52 59 * @return none.
emilmont 1:fdd22bb7aa52 60 *
emilmont 1:fdd22bb7aa52 61 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 62 * \par
emilmont 1:fdd22bb7aa52 63 * The function uses saturating arithmetic.
emilmont 1:fdd22bb7aa52 64 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
emilmont 1:fdd22bb7aa52 65 */
emilmont 1:fdd22bb7aa52 66
emilmont 1:fdd22bb7aa52 67 void arm_mult_q15(
emilmont 1:fdd22bb7aa52 68 q15_t * pSrcA,
emilmont 1:fdd22bb7aa52 69 q15_t * pSrcB,
emilmont 1:fdd22bb7aa52 70 q15_t * pDst,
emilmont 1:fdd22bb7aa52 71 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 72 {
emilmont 1:fdd22bb7aa52 73 uint32_t blkCnt; /* loop counters */
emilmont 1:fdd22bb7aa52 74
mbed_official 3:7a284390b0ce 75 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 76
emilmont 1:fdd22bb7aa52 77 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 78 q31_t inA1, inA2, inB1, inB2; /* temporary input variables */
emilmont 1:fdd22bb7aa52 79 q15_t out1, out2, out3, out4; /* temporary output variables */
emilmont 1:fdd22bb7aa52 80 q31_t mul1, mul2, mul3, mul4; /* temporary variables */
emilmont 1:fdd22bb7aa52 81
emilmont 1:fdd22bb7aa52 82 /* loop Unrolling */
emilmont 1:fdd22bb7aa52 83 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 84
emilmont 1:fdd22bb7aa52 85 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 86 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 87 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 88 {
emilmont 1:fdd22bb7aa52 89 /* read two samples at a time from sourceA */
emilmont 1:fdd22bb7aa52 90 inA1 = *__SIMD32(pSrcA)++;
emilmont 1:fdd22bb7aa52 91 /* read two samples at a time from sourceB */
emilmont 1:fdd22bb7aa52 92 inB1 = *__SIMD32(pSrcB)++;
emilmont 1:fdd22bb7aa52 93 /* read two samples at a time from sourceA */
emilmont 1:fdd22bb7aa52 94 inA2 = *__SIMD32(pSrcA)++;
emilmont 1:fdd22bb7aa52 95 /* read two samples at a time from sourceB */
emilmont 1:fdd22bb7aa52 96 inB2 = *__SIMD32(pSrcB)++;
emilmont 1:fdd22bb7aa52 97
emilmont 1:fdd22bb7aa52 98 /* multiply mul = sourceA * sourceB */
emilmont 1:fdd22bb7aa52 99 mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
emilmont 1:fdd22bb7aa52 100 mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
emilmont 1:fdd22bb7aa52 101 mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
emilmont 1:fdd22bb7aa52 102 mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104 /* saturate result to 16 bit */
emilmont 1:fdd22bb7aa52 105 out1 = (q15_t) __SSAT(mul1 >> 15, 16);
emilmont 1:fdd22bb7aa52 106 out2 = (q15_t) __SSAT(mul2 >> 15, 16);
emilmont 1:fdd22bb7aa52 107 out3 = (q15_t) __SSAT(mul3 >> 15, 16);
emilmont 1:fdd22bb7aa52 108 out4 = (q15_t) __SSAT(mul4 >> 15, 16);
emilmont 1:fdd22bb7aa52 109
emilmont 1:fdd22bb7aa52 110 /* store the result */
emilmont 1:fdd22bb7aa52 111 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 112
emilmont 1:fdd22bb7aa52 113 *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
emilmont 1:fdd22bb7aa52 114 *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
emilmont 1:fdd22bb7aa52 115
emilmont 1:fdd22bb7aa52 116 #else
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
emilmont 1:fdd22bb7aa52 119 *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 #endif // #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 /* Decrement the blockSize loop counter */
emilmont 1:fdd22bb7aa52 124 blkCnt--;
emilmont 1:fdd22bb7aa52 125 }
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 128 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 129 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 130
emilmont 1:fdd22bb7aa52 131 #else
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 134
emilmont 1:fdd22bb7aa52 135 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 136 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 137
mbed_official 3:7a284390b0ce 138 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 139
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 142 {
emilmont 1:fdd22bb7aa52 143 /* C = A * B */
emilmont 1:fdd22bb7aa52 144 /* Multiply the inputs and store the result in the destination buffer */
emilmont 1:fdd22bb7aa52 145 *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
emilmont 1:fdd22bb7aa52 146
emilmont 1:fdd22bb7aa52 147 /* Decrement the blockSize loop counter */
emilmont 1:fdd22bb7aa52 148 blkCnt--;
emilmont 1:fdd22bb7aa52 149 }
emilmont 1:fdd22bb7aa52 150 }
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152 /**
emilmont 1:fdd22bb7aa52 153 * @} end of BasicMult group
emilmont 1:fdd22bb7aa52 154 */