CMSIS DSP Lib
Fork of mbed-dsp by
cmsis_dsp/SupportFunctions/arm_copy_q15.c@3:7a284390b0ce, 2013-11-08 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Nov 08 13:45:10 2013 +0000
- Revision:
- 3:7a284390b0ce
- Parent:
- 2:da51fb522205
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 1:fdd22bb7aa52 | 1 | /* ---------------------------------------------------------------------- |
mbed_official | 3:7a284390b0ce | 2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved. |
emilmont | 1:fdd22bb7aa52 | 3 | * |
mbed_official | 3:7a284390b0ce | 4 | * $Date: 17. January 2013 |
mbed_official | 3:7a284390b0ce | 5 | * $Revision: V1.4.1 |
emilmont | 1:fdd22bb7aa52 | 6 | * |
emilmont | 2:da51fb522205 | 7 | * Project: CMSIS DSP Library |
emilmont | 2:da51fb522205 | 8 | * Title: arm_copy_q15.c |
emilmont | 1:fdd22bb7aa52 | 9 | * |
emilmont | 2:da51fb522205 | 10 | * Description: Copies the elements of a Q15 vector. |
emilmont | 1:fdd22bb7aa52 | 11 | * |
emilmont | 1:fdd22bb7aa52 | 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
emilmont | 1:fdd22bb7aa52 | 13 | * |
mbed_official | 3:7a284390b0ce | 14 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 3:7a284390b0ce | 15 | * modification, are permitted provided that the following conditions |
mbed_official | 3:7a284390b0ce | 16 | * are met: |
mbed_official | 3:7a284390b0ce | 17 | * - Redistributions of source code must retain the above copyright |
mbed_official | 3:7a284390b0ce | 18 | * notice, this list of conditions and the following disclaimer. |
mbed_official | 3:7a284390b0ce | 19 | * - Redistributions in binary form must reproduce the above copyright |
mbed_official | 3:7a284390b0ce | 20 | * notice, this list of conditions and the following disclaimer in |
mbed_official | 3:7a284390b0ce | 21 | * the documentation and/or other materials provided with the |
mbed_official | 3:7a284390b0ce | 22 | * distribution. |
mbed_official | 3:7a284390b0ce | 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
mbed_official | 3:7a284390b0ce | 24 | * may be used to endorse or promote products derived from this |
mbed_official | 3:7a284390b0ce | 25 | * software without specific prior written permission. |
mbed_official | 3:7a284390b0ce | 26 | * |
mbed_official | 3:7a284390b0ce | 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
mbed_official | 3:7a284390b0ce | 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
mbed_official | 3:7a284390b0ce | 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
mbed_official | 3:7a284390b0ce | 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
mbed_official | 3:7a284390b0ce | 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
mbed_official | 3:7a284390b0ce | 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
mbed_official | 3:7a284390b0ce | 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
mbed_official | 3:7a284390b0ce | 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 3:7a284390b0ce | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
mbed_official | 3:7a284390b0ce | 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
mbed_official | 3:7a284390b0ce | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
mbed_official | 3:7a284390b0ce | 38 | * POSSIBILITY OF SUCH DAMAGE. |
emilmont | 1:fdd22bb7aa52 | 39 | * -------------------------------------------------------------------- */ |
emilmont | 1:fdd22bb7aa52 | 40 | |
emilmont | 1:fdd22bb7aa52 | 41 | #include "arm_math.h" |
emilmont | 1:fdd22bb7aa52 | 42 | |
emilmont | 1:fdd22bb7aa52 | 43 | /** |
emilmont | 1:fdd22bb7aa52 | 44 | * @ingroup groupSupport |
emilmont | 1:fdd22bb7aa52 | 45 | */ |
emilmont | 1:fdd22bb7aa52 | 46 | |
emilmont | 1:fdd22bb7aa52 | 47 | /** |
emilmont | 1:fdd22bb7aa52 | 48 | * @addtogroup copy |
emilmont | 1:fdd22bb7aa52 | 49 | * @{ |
emilmont | 1:fdd22bb7aa52 | 50 | */ |
emilmont | 1:fdd22bb7aa52 | 51 | /** |
emilmont | 1:fdd22bb7aa52 | 52 | * @brief Copies the elements of a Q15 vector. |
emilmont | 1:fdd22bb7aa52 | 53 | * @param[in] *pSrc points to input vector |
emilmont | 1:fdd22bb7aa52 | 54 | * @param[out] *pDst points to output vector |
emilmont | 1:fdd22bb7aa52 | 55 | * @param[in] blockSize length of the input vector |
emilmont | 1:fdd22bb7aa52 | 56 | * @return none. |
emilmont | 1:fdd22bb7aa52 | 57 | * |
emilmont | 1:fdd22bb7aa52 | 58 | */ |
emilmont | 1:fdd22bb7aa52 | 59 | |
emilmont | 1:fdd22bb7aa52 | 60 | void arm_copy_q15( |
emilmont | 1:fdd22bb7aa52 | 61 | q15_t * pSrc, |
emilmont | 1:fdd22bb7aa52 | 62 | q15_t * pDst, |
emilmont | 1:fdd22bb7aa52 | 63 | uint32_t blockSize) |
emilmont | 1:fdd22bb7aa52 | 64 | { |
emilmont | 1:fdd22bb7aa52 | 65 | uint32_t blkCnt; /* loop counter */ |
emilmont | 1:fdd22bb7aa52 | 66 | |
mbed_official | 3:7a284390b0ce | 67 | #ifndef ARM_MATH_CM0_FAMILY |
emilmont | 1:fdd22bb7aa52 | 68 | |
emilmont | 1:fdd22bb7aa52 | 69 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
emilmont | 1:fdd22bb7aa52 | 70 | |
emilmont | 1:fdd22bb7aa52 | 71 | /*loop Unrolling */ |
emilmont | 1:fdd22bb7aa52 | 72 | blkCnt = blockSize >> 2u; |
emilmont | 1:fdd22bb7aa52 | 73 | |
emilmont | 1:fdd22bb7aa52 | 74 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
emilmont | 1:fdd22bb7aa52 | 75 | ** a second loop below computes the remaining 1 to 3 samples. */ |
emilmont | 1:fdd22bb7aa52 | 76 | while(blkCnt > 0u) |
emilmont | 1:fdd22bb7aa52 | 77 | { |
emilmont | 1:fdd22bb7aa52 | 78 | /* C = A */ |
emilmont | 1:fdd22bb7aa52 | 79 | /* Read two inputs */ |
emilmont | 1:fdd22bb7aa52 | 80 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++; |
emilmont | 1:fdd22bb7aa52 | 81 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++; |
emilmont | 1:fdd22bb7aa52 | 82 | |
emilmont | 1:fdd22bb7aa52 | 83 | /* Decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 84 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 85 | } |
emilmont | 1:fdd22bb7aa52 | 86 | |
emilmont | 1:fdd22bb7aa52 | 87 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here. |
emilmont | 1:fdd22bb7aa52 | 88 | ** No loop unrolling is used. */ |
emilmont | 1:fdd22bb7aa52 | 89 | blkCnt = blockSize % 0x4u; |
emilmont | 1:fdd22bb7aa52 | 90 | |
emilmont | 1:fdd22bb7aa52 | 91 | |
emilmont | 1:fdd22bb7aa52 | 92 | #else |
emilmont | 1:fdd22bb7aa52 | 93 | |
emilmont | 1:fdd22bb7aa52 | 94 | /* Run the below code for Cortex-M0 */ |
emilmont | 1:fdd22bb7aa52 | 95 | |
emilmont | 1:fdd22bb7aa52 | 96 | /* Loop over blockSize number of values */ |
emilmont | 1:fdd22bb7aa52 | 97 | blkCnt = blockSize; |
emilmont | 1:fdd22bb7aa52 | 98 | |
mbed_official | 3:7a284390b0ce | 99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
emilmont | 1:fdd22bb7aa52 | 100 | |
emilmont | 1:fdd22bb7aa52 | 101 | while(blkCnt > 0u) |
emilmont | 1:fdd22bb7aa52 | 102 | { |
emilmont | 1:fdd22bb7aa52 | 103 | /* C = A */ |
emilmont | 1:fdd22bb7aa52 | 104 | /* Copy and then store the value in the destination buffer */ |
emilmont | 1:fdd22bb7aa52 | 105 | *pDst++ = *pSrc++; |
emilmont | 1:fdd22bb7aa52 | 106 | |
emilmont | 1:fdd22bb7aa52 | 107 | /* Decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 108 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 109 | } |
emilmont | 1:fdd22bb7aa52 | 110 | } |
emilmont | 1:fdd22bb7aa52 | 111 | |
emilmont | 1:fdd22bb7aa52 | 112 | /** |
emilmont | 1:fdd22bb7aa52 | 113 | * @} end of BasicCopy group |
emilmont | 1:fdd22bb7aa52 | 114 | */ |