This version has been verified for basic register R/W. No calibration has been added yet. See example main code at https://os.mbed.com/users/laserdad/code/MAX11410_testing/
Dependents: MAX11410_testing MAX11410_test MAX11410-test
MAX11410.h@5:c38d406f8d02, 2018-03-22 (annotated)
- Committer:
- laserdad
- Date:
- Thu Mar 22 20:24:43 2018 +0000
- Revision:
- 5:c38d406f8d02
- Parent:
- 4:3a158956e225
made the ADCs sample simultaneously. added IIR filter
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
laserdad | 0:b90ccc530cb1 | 1 | #ifndef __MAX11410_H__ |
laserdad | 0:b90ccc530cb1 | 2 | #define __MAX11410_H__ |
laserdad | 0:b90ccc530cb1 | 3 | |
laserdad | 0:b90ccc530cb1 | 4 | #include "mbed.h" |
laserdad | 0:b90ccc530cb1 | 5 | |
laserdad | 0:b90ccc530cb1 | 6 | //#define DEBUG //if you want to print stuff |
laserdad | 0:b90ccc530cb1 | 7 | |
laserdad | 0:b90ccc530cb1 | 8 | //HW definition |
laserdad | 0:b90ccc530cb1 | 9 | |
laserdad | 0:b90ccc530cb1 | 10 | |
laserdad | 5:c38d406f8d02 | 11 | #define CONV_DELAY_MS 1 |
laserdad | 0:b90ccc530cb1 | 12 | |
laserdad | 0:b90ccc530cb1 | 13 | // SPI interface configuration |
laserdad | 0:b90ccc530cb1 | 14 | #define MAX11410_SPI_MODE 0 |
laserdad | 0:b90ccc530cb1 | 15 | |
laserdad | 0:b90ccc530cb1 | 16 | //8 bit registers |
laserdad | 0:b90ccc530cb1 | 17 | #define SPI_READ 1<<7 |
laserdad | 0:b90ccc530cb1 | 18 | #define SPI_WRITE 0<<7 |
laserdad | 0:b90ccc530cb1 | 19 | #define REG_PD 0x0 |
laserdad | 0:b90ccc530cb1 | 20 | #define REG_CONV_START 0x01 |
laserdad | 0:b90ccc530cb1 | 21 | #define REG_SEQ_START 0x02 |
laserdad | 0:b90ccc530cb1 | 22 | #define REG_CAL_START 0x03 |
laserdad | 0:b90ccc530cb1 | 23 | #define REG_GP0_CTRL 0x04 |
laserdad | 0:b90ccc530cb1 | 24 | #define REG_GP1_CTRL 0x05 |
laserdad | 0:b90ccc530cb1 | 25 | #define REG_GP_CONV 0x06 |
laserdad | 0:b90ccc530cb1 | 26 | #define REG_GP_SEQ 0x07 |
laserdad | 0:b90ccc530cb1 | 27 | #define REG_FILTER 0x08 |
laserdad | 0:b90ccc530cb1 | 28 | #define REG_CTRL 0x09 |
laserdad | 0:b90ccc530cb1 | 29 | #define REG_SOURCE 0x0A |
laserdad | 0:b90ccc530cb1 | 30 | #define REG_MUX_CTRL0 0x0B |
laserdad | 0:b90ccc530cb1 | 31 | #define REG_MUX_CTRL1 0x0C |
laserdad | 0:b90ccc530cb1 | 32 | #define REG_MUX_CTRL2 0x0D |
laserdad | 0:b90ccc530cb1 | 33 | #define REG_PGA 0x0E |
laserdad | 0:b90ccc530cb1 | 34 | #define REG_WAIT_EXT 0x0F |
laserdad | 0:b90ccc530cb1 | 35 | #define REG_WAIT_START 0x10 |
laserdad | 0:b90ccc530cb1 | 36 | |
laserdad | 0:b90ccc530cb1 | 37 | //24 big registers |
laserdad | 0:b90ccc530cb1 | 38 | #define REG_PART_ID 0x11 |
laserdad | 0:b90ccc530cb1 | 39 | #define REG_SYSC_SEL 0x12 |
laserdad | 0:b90ccc530cb1 | 40 | #define REG_SYS_OFF_A 0x13 |
laserdad | 0:b90ccc530cb1 | 41 | #define REG_SYS_OFF_B 0x14 |
laserdad | 0:b90ccc530cb1 | 42 | #define REG_SYS_GAIN_A 0x15 |
laserdad | 0:b90ccc530cb1 | 43 | #define REG_SYS_GAIN_B 0x16 |
laserdad | 0:b90ccc530cb1 | 44 | #define REG_SELF_OFF 0x17 |
laserdad | 0:b90ccc530cb1 | 45 | #define REG_SELF_GAIN_1 0x18 |
laserdad | 0:b90ccc530cb1 | 46 | #define REG_SELF_GAIN_2 0x19 |
laserdad | 0:b90ccc530cb1 | 47 | #define REG_SELF_GAIN_4 0x1A |
laserdad | 0:b90ccc530cb1 | 48 | #define REG_SELF_GAIN_8 0x1B |
laserdad | 0:b90ccc530cb1 | 49 | #define REG_SELF_GAIN_16 0x1C |
laserdad | 0:b90ccc530cb1 | 50 | #define REG_SELF_GAIN_32 0x1D |
laserdad | 0:b90ccc530cb1 | 51 | #define REG_SELF_GAIN_64 0x1E |
laserdad | 0:b90ccc530cb1 | 52 | #define REG_SELF_GAIN_128 0x1F |
laserdad | 0:b90ccc530cb1 | 53 | #define REG_LTHRESH0 0x20 |
laserdad | 0:b90ccc530cb1 | 54 | #define REG_LTHRESH1 0x21 |
laserdad | 0:b90ccc530cb1 | 55 | #define REG_LTHRESH2 0x22 |
laserdad | 0:b90ccc530cb1 | 56 | #define REG_LTHRESH3 0x23 |
laserdad | 0:b90ccc530cb1 | 57 | #define REG_LTHRESH4 0x24 |
laserdad | 0:b90ccc530cb1 | 58 | #define REG_LTHRESH5 0x25 |
laserdad | 0:b90ccc530cb1 | 59 | #define REG_LTHRESH6 0x26 |
laserdad | 0:b90ccc530cb1 | 60 | #define REG_LTHRESH7 0x27 |
laserdad | 0:b90ccc530cb1 | 61 | #define REG_UTHRESH0 0x28 |
laserdad | 0:b90ccc530cb1 | 62 | #define REG_UTHRESH1 0x29 |
laserdad | 0:b90ccc530cb1 | 63 | #define REG_UTHRESH2 0x2A |
laserdad | 0:b90ccc530cb1 | 64 | #define REG_UTHRESH3 0x2B |
laserdad | 0:b90ccc530cb1 | 65 | #define REG_UTHRESH4 0x2C |
laserdad | 0:b90ccc530cb1 | 66 | #define REG_UTHRESH5 0x2D |
laserdad | 0:b90ccc530cb1 | 67 | #define REG_UTHRESH6 0x2E |
laserdad | 0:b90ccc530cb1 | 68 | #define REG_UTHRESH7 0x2F |
laserdad | 0:b90ccc530cb1 | 69 | #define REG_DATA0 0x30 |
laserdad | 0:b90ccc530cb1 | 70 | #define REG_DATA1 0x31 |
laserdad | 0:b90ccc530cb1 | 71 | #define REG_DATA2 0x32 |
laserdad | 0:b90ccc530cb1 | 72 | #define REG_DATA3 0x33 |
laserdad | 0:b90ccc530cb1 | 73 | #define REG_DATA4 0x34 |
laserdad | 0:b90ccc530cb1 | 74 | #define REG_DATA5 0x35 |
laserdad | 0:b90ccc530cb1 | 75 | #define REG_DATA6 0x36 |
laserdad | 0:b90ccc530cb1 | 76 | #define REG_DATA7 0x37 |
laserdad | 0:b90ccc530cb1 | 77 | #define REG_STATUS 0x38 |
laserdad | 0:b90ccc530cb1 | 78 | #define REG_STATUS_IE 0x39 |
laserdad | 0:b90ccc530cb1 | 79 | |
laserdad | 0:b90ccc530cb1 | 80 | //16 bit registers for sequencer |
laserdad | 0:b90ccc530cb1 | 81 | #define REG_UC0 0x3A |
laserdad | 0:b90ccc530cb1 | 82 | #define REG_UCADDR 0x6F |
laserdad | 0:b90ccc530cb1 | 83 | |
laserdad | 0:b90ccc530cb1 | 84 | // Read/Write |
laserdad | 0:b90ccc530cb1 | 85 | #define _WRITE(x) (SPI_WRITE | x) |
laserdad | 0:b90ccc530cb1 | 86 | #define _READ(x) (SPI_READ | x) |
laserdad | 0:b90ccc530cb1 | 87 | |
laserdad | 0:b90ccc530cb1 | 88 | //PD bits |
laserdad | 0:b90ccc530cb1 | 89 | #define MODE_NORMAL 0 |
laserdad | 0:b90ccc530cb1 | 90 | #define MODE_STANDBY 1 //shut down analog, except LDO |
laserdad | 0:b90ccc530cb1 | 91 | #define MODE_SLEEP 2 //shut down analog including LDO(default) |
laserdad | 0:b90ccc530cb1 | 92 | #define MODE_RESET 3 //POR |
laserdad | 0:b90ccc530cb1 | 93 | |
laserdad | 0:b90ccc530cb1 | 94 | //CONV_START bits |
laserdad | 0:b90ccc530cb1 | 95 | #define _DEST(x) x<<4 //where x = 0:7 is the destination data register |
laserdad | 0:b90ccc530cb1 | 96 | #define SINGLE_CONV 0 //single conversion |
laserdad | 0:b90ccc530cb1 | 97 | #define CONT_CONV 1 //continuous conversions |
laserdad | 0:b90ccc530cb1 | 98 | #define DUTY_CONV 2 //25% duty cycle for lower power consumption |
laserdad | 0:b90ccc530cb1 | 99 | |
laserdad | 0:b90ccc530cb1 | 100 | //CAL_START bits |
laserdad | 0:b90ccc530cb1 | 101 | #define SELF_CAL 0 |
laserdad | 0:b90ccc530cb1 | 102 | #define PGA_CAL 1 |
laserdad | 0:b90ccc530cb1 | 103 | #define SYS_OFF_A_CAL 4 |
laserdad | 0:b90ccc530cb1 | 104 | #define SYS_GAIN_A_CAL 5 |
laserdad | 0:b90ccc530cb1 | 105 | #define SYS_OFF_B_CAL 6 |
laserdad | 0:b90ccc530cb1 | 106 | #define SYS_GAIN_B_CAL 7 |
laserdad | 0:b90ccc530cb1 | 107 | |
laserdad | 0:b90ccc530cb1 | 108 | //GP0_CTRL bits |
laserdad | 0:b90ccc530cb1 | 109 | //GP1_CTRL bits |
laserdad | 0:b90ccc530cb1 | 110 | //GP_CONV bits |
laserdad | 0:b90ccc530cb1 | 111 | //GP_SEQ_ADDR bit |
laserdad | 0:b90ccc530cb1 | 112 | |
laserdad | 0:b90ccc530cb1 | 113 | //FILTER bits |
laserdad | 0:b90ccc530cb1 | 114 | #define FIR_FIFTYSIXTY 0<<4 //default |
laserdad | 0:b90ccc530cb1 | 115 | #define FIR_FIFTY 1<<4 |
laserdad | 0:b90ccc530cb1 | 116 | #define FIR_SIXTY 2<<4 |
laserdad | 0:b90ccc530cb1 | 117 | #define SINC4 3<<4 |
laserdad | 0:b90ccc530cb1 | 118 | |
laserdad | 0:b90ccc530cb1 | 119 | #define _RATE(x) x //where x is 0 to 7 |
laserdad | 0:b90ccc530cb1 | 120 | |
laserdad | 0:b90ccc530cb1 | 121 | //CTRL bits |
laserdad | 0:b90ccc530cb1 | 122 | #define EXT_CLOCK 1<<7 |
laserdad | 0:b90ccc530cb1 | 123 | #define INT_CLOCK 0<<7 //default |
laserdad | 0:b90ccc530cb1 | 124 | |
laserdad | 0:b90ccc530cb1 | 125 | #define UNIPOLAR 1<<6 |
laserdad | 0:b90ccc530cb1 | 126 | #define BIPOLAR 0<<6 //default |
laserdad | 0:b90ccc530cb1 | 127 | |
laserdad | 0:b90ccc530cb1 | 128 | #define TWOS_COMP 0<<5 //default |
laserdad | 0:b90ccc530cb1 | 129 | #define OFFSET_BIN 1<<5 |
laserdad | 0:b90ccc530cb1 | 130 | |
laserdad | 0:b90ccc530cb1 | 131 | #define _PBUF_EN(x) x<<4 |
laserdad | 0:b90ccc530cb1 | 132 | #define _NBUF_EN(x) x<<3 |
laserdad | 0:b90ccc530cb1 | 133 | |
laserdad | 0:b90ccc530cb1 | 134 | #define REF_AIN01 0 |
laserdad | 0:b90ccc530cb1 | 135 | #define REF1 1 |
laserdad | 0:b90ccc530cb1 | 136 | #define REF2 2 |
laserdad | 0:b90ccc530cb1 | 137 | #define REF_AVDD 3 |
laserdad | 0:b90ccc530cb1 | 138 | #define REF_UNI_AIN 4 |
laserdad | 0:b90ccc530cb1 | 139 | #define REF_UNI_REF1 5 |
laserdad | 0:b90ccc530cb1 | 140 | #define REF_UNI_REF2 6 |
laserdad | 0:b90ccc530cb1 | 141 | |
laserdad | 0:b90ccc530cb1 | 142 | //SOURCE bits |
laserdad | 0:b90ccc530cb1 | 143 | #define VBIAS_ACTIVE 0<<6 //default |
laserdad | 0:b90ccc530cb1 | 144 | #define VBIAS_HIGH 1<<6 |
laserdad | 0:b90ccc530cb1 | 145 | #define VBIAS_LOW 2<<6 |
laserdad | 0:b90ccc530cb1 | 146 | |
laserdad | 0:b90ccc530cb1 | 147 | #define BRN_OFF 0<<4 //default |
laserdad | 0:b90ccc530cb1 | 148 | #define BRN_0P5UA 1<<4 |
laserdad | 0:b90ccc530cb1 | 149 | #define BRN_1UA 2<<4 |
laserdad | 0:b90ccc530cb1 | 150 | #define BRN_10UA 3<<4 |
laserdad | 0:b90ccc530cb1 | 151 | |
laserdad | 0:b90ccc530cb1 | 152 | #define _IDAC(x) x //0 defaul, where x is 0x00 to 0x0F 10-1600uA |
laserdad | 0:b90ccc530cb1 | 153 | |
laserdad | 0:b90ccc530cb1 | 154 | //MUX_CTRL0 bits |
laserdad | 0:b90ccc530cb1 | 155 | #define _AINP(x) x<<4 //where x is x0,1,2,3,4,5,6,7,8,9 for ecah of the ten inputs or xA for VDD, xF for disconnnected (default) |
laserdad | 0:b90ccc530cb1 | 156 | #define _AINN(x) x //where x is x0,1,2,3,4,5,6,7,8,9 for ecah of the ten inputs or xA for GND, xF for disconnected (default) |
laserdad | 0:b90ccc530cb1 | 157 | |
laserdad | 0:b90ccc530cb1 | 158 | //MUX_CTRL1 bits |
laserdad | 0:b90ccc530cb1 | 159 | #define _IDAC1(x) x<<4 //where IDAC1 is connect ed to x = x0,1,2,3,4,5,6,7,8,9 for ecah of the ten inputs or xA for VDD, xF for disconnnected (default) |
laserdad | 0:b90ccc530cb1 | 160 | #define _IDAC0(x) x //where IDAC0 is connect ed to x = x0,1,2,3,4,5,6,7,8,9 for ecah of the ten inputs or xA for VDD, xF for disconnnected (default) |
laserdad | 0:b90ccc530cb1 | 161 | |
laserdad | 0:b90ccc530cb1 | 162 | //MUX_CTRL2 bits |
laserdad | 0:b90ccc530cb1 | 163 | #define _VDD_2_INPUT(x) 1<<x |
laserdad | 0:b90ccc530cb1 | 164 | #define _VDD_OFF_INPUT(x) 0<<x |
laserdad | 0:b90ccc530cb1 | 165 | |
laserdad | 0:b90ccc530cb1 | 166 | //PGA bits |
laserdad | 2:4784f0a3b76d | 167 | #define BUFFER_ON 0<<4 //default |
laserdad | 2:4784f0a3b76d | 168 | #define BYPASS 1<<4 //no buffer (saves a tiny amount of power) |
laserdad | 2:4784f0a3b76d | 169 | #define PGA 2<<4 //use progammable gain |
laserdad | 0:b90ccc530cb1 | 170 | |
laserdad | 0:b90ccc530cb1 | 171 | #define _GAIN_EXP(x) x //gain is 2^x (exponent) |
laserdad | 0:b90ccc530cb1 | 172 | |
laserdad | 0:b90ccc530cb1 | 173 | //Status interrupt enbable (REG_STATUS_IE) bits |
laserdad | 0:b90ccc530cb1 | 174 | #define DATA_RDY_INT 0x00000010 |
laserdad | 0:b90ccc530cb1 | 175 | #define CAL_RDY_INT 0x00000004 |
laserdad | 0:b90ccc530cb1 | 176 | #define CONV_RDY_INT 0x00000001 //default |
laserdad | 0:b90ccc530cb1 | 177 | |
laserdad | 0:b90ccc530cb1 | 178 | //WAIT_EXT |
laserdad | 0:b90ccc530cb1 | 179 | //WAIT_START |
laserdad | 0:b90ccc530cb1 | 180 | |
laserdad | 0:b90ccc530cb1 | 181 | |
laserdad | 0:b90ccc530cb1 | 182 | class MAX11410 |
laserdad | 0:b90ccc530cb1 | 183 | { |
laserdad | 0:b90ccc530cb1 | 184 | SPI *spi; |
laserdad | 0:b90ccc530cb1 | 185 | DigitalOut *cs; |
laserdad | 0:b90ccc530cb1 | 186 | |
laserdad | 0:b90ccc530cb1 | 187 | public: |
laserdad | 0:b90ccc530cb1 | 188 | MAX11410(SPI *, DigitalOut *); |
laserdad | 0:b90ccc530cb1 | 189 | void reset(); |
laserdad | 0:b90ccc530cb1 | 190 | void write8bitReg(char, char); |
laserdad | 0:b90ccc530cb1 | 191 | void write24bitReg(char, uint32_t); |
laserdad | 0:b90ccc530cb1 | 192 | char read8bits(char regAddr, bool *); |
laserdad | 0:b90ccc530cb1 | 193 | uint32_t read24bits(char regAddr, bool *); |
laserdad | 2:4784f0a3b76d | 194 | int32_t read24bitsSigned(char regAddr, bool *); |
laserdad | 2:4784f0a3b76d | 195 | int32_t readInterrupts(bool *); |
laserdad | 0:b90ccc530cb1 | 196 | bool interrupt(); |
laserdad | 0:b90ccc530cb1 | 197 | void calOffset(); |
laserdad | 0:b90ccc530cb1 | 198 | void calGain(); |
laserdad | 0:b90ccc530cb1 | 199 | uint32_t readStatus(bool *); |
laserdad | 0:b90ccc530cb1 | 200 | |
laserdad | 0:b90ccc530cb1 | 201 | }; |
laserdad | 0:b90ccc530cb1 | 202 | |
laserdad | 0:b90ccc530cb1 | 203 | #endif /*__MAX11410_H__*/ |
laserdad | 0:b90ccc530cb1 | 204 |