Kevin Kadooka / mbed-dev

Fork of mbed-dev build 137, last build before FAT file system appears to be broken. Also reduced HSE timeout time in STM4XX HAL

Fork of mbed-dev by mbed official

targets/TARGET_STM/TARGET_STM32F4/can_api.c@167:356ef919c855, 2017-06-20 (annotated)

Committer:
kkado
Date:
Tue Jun 20 11:06:37 2017 +0000
Revision:
167:356ef919c855
Parent:
156:95d6b41a828b 
Build 137 with reduced HSE timeout

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 75:245e7931bad6 1 /* mbed Microcontroller Library
mbed_official 75:245e7931bad6 2 * Copyright (c) 2006-2016 ARM Limited
mbed_official 75:245e7931bad6 3 *
mbed_official 75:245e7931bad6 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 75:245e7931bad6 5 * you may not use this file except in compliance with the License.
mbed_official 75:245e7931bad6 6 * You may obtain a copy of the License at
mbed_official 75:245e7931bad6 7 *
mbed_official 75:245e7931bad6 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 75:245e7931bad6 9 *
mbed_official 75:245e7931bad6 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 75:245e7931bad6 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 75:245e7931bad6 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 75:245e7931bad6 13 * See the License for the specific language governing permissions and
mbed_official 75:245e7931bad6 14 * limitations under the License.
mbed_official 75:245e7931bad6 15 */
mbed_official 75:245e7931bad6 16 #include "can_api.h"
mbed_official 75:245e7931bad6 17
mbed_official 75:245e7931bad6 18 #if DEVICE_CAN
mbed_official 75:245e7931bad6 19
mbed_official 75:245e7931bad6 20 #include "cmsis.h"
mbed_official 75:245e7931bad6 21 #include "pinmap.h"
mbed_official 75:245e7931bad6 22 #include "PeripheralPins.h"
mbed_official 75:245e7931bad6 23 #include "mbed_error.h"
mbed_official 75:245e7931bad6 24 #include <math.h>
mbed_official 75:245e7931bad6 25 #include <string.h>
mbed_official 75:245e7931bad6 26
mbed_official 75:245e7931bad6 27 #define CAN_NUM 2
mbed_official 75:245e7931bad6 28 static CAN_HandleTypeDef CanHandle;
mbed_official 75:245e7931bad6 29 static uint32_t can_irq_ids[CAN_NUM] = {0};
mbed_official 75:245e7931bad6 30 static can_irq_handler irq_handler;
mbed_official 75:245e7931bad6 31
mbed_official 75:245e7931bad6 32 void can_init(can_t *obj, PinName rd, PinName td)
mbed_official 75:245e7931bad6 33 {
mbed_official 125:e632577a484c 34 uint32_t filter_number;
mbed_official 75:245e7931bad6 35 CANName can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD);
mbed_official 75:245e7931bad6 36 CANName can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD);
mbed_official 75:245e7931bad6 37 obj->can = (CANName)pinmap_merge(can_rd, can_td);
mbed_official 75:245e7931bad6 38 MBED_ASSERT((int)obj->can != NC);
mbed_official 75:245e7931bad6 39
mbed_official 75:245e7931bad6 40 if(obj->can == CAN_1) {
mbed_official 75:245e7931bad6 41 __HAL_RCC_CAN1_CLK_ENABLE();
mbed_official 75:245e7931bad6 42 obj->index = 0;
mbed_official 75:245e7931bad6 43 } else {
mbed_official 75:245e7931bad6 44 __HAL_RCC_CAN2_CLK_ENABLE();
mbed_official 129:8a86d1aafce0 45 obj->index = 1;
mbed_official 75:245e7931bad6 46 }
mbed_official 75:245e7931bad6 47
mbed_official 75:245e7931bad6 48 // Configure the CAN pins
mbed_official 75:245e7931bad6 49 pinmap_pinout(rd, PinMap_CAN_RD);
mbed_official 75:245e7931bad6 50 pinmap_pinout(td, PinMap_CAN_TD);
mbed_official 75:245e7931bad6 51 if (rd != NC) {
mbed_official 75:245e7931bad6 52 pin_mode(rd, PullUp);
mbed_official 75:245e7931bad6 53 }
mbed_official 75:245e7931bad6 54 if (td != NC) {
mbed_official 75:245e7931bad6 55 pin_mode(td, PullUp);
mbed_official 75:245e7931bad6 56 }
mbed_official 75:245e7931bad6 57
mbed_official 75:245e7931bad6 58 CanHandle.Instance = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 59
mbed_official 75:245e7931bad6 60 CanHandle.Init.TTCM = DISABLE;
mbed_official 75:245e7931bad6 61 CanHandle.Init.ABOM = DISABLE;
mbed_official 75:245e7931bad6 62 CanHandle.Init.AWUM = DISABLE;
mbed_official 75:245e7931bad6 63 CanHandle.Init.NART = DISABLE;
mbed_official 75:245e7931bad6 64 CanHandle.Init.RFLM = DISABLE;
mbed_official 75:245e7931bad6 65 CanHandle.Init.TXFP = DISABLE;
mbed_official 75:245e7931bad6 66 CanHandle.Init.Mode = CAN_MODE_NORMAL;
mbed_official 75:245e7931bad6 67 CanHandle.Init.SJW = CAN_SJW_1TQ;
mbed_official 75:245e7931bad6 68 CanHandle.Init.BS1 = CAN_BS1_6TQ;
mbed_official 75:245e7931bad6 69 CanHandle.Init.BS2 = CAN_BS2_8TQ;
mbed_official 75:245e7931bad6 70 CanHandle.Init.Prescaler = 2;
mbed_official 75:245e7931bad6 71
mbed_official 75:245e7931bad6 72 if (HAL_CAN_Init(&CanHandle) != HAL_OK) {
mbed_official 75:245e7931bad6 73 error("Cannot initialize CAN");
mbed_official 75:245e7931bad6 74 }
mbed_official 125:e632577a484c 75
mbed_official 125:e632577a484c 76 filter_number = (obj->can == CAN_1) ? 0 : 14;
mbed_official 125:e632577a484c 77
mbed_official 129:8a86d1aafce0 78 // Set initial CAN frequency to 100kb/s
mbed_official 129:8a86d1aafce0 79 can_frequency(obj, 100000);
mbed_official 129:8a86d1aafce0 80
mbed_official 125:e632577a484c 81 can_filter(obj, 0, 0, CANStandard, filter_number);
mbed_official 75:245e7931bad6 82 }
mbed_official 75:245e7931bad6 83
mbed_official 75:245e7931bad6 84 void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id)
mbed_official 75:245e7931bad6 85 {
mbed_official 75:245e7931bad6 86 irq_handler = handler;
mbed_official 75:245e7931bad6 87 can_irq_ids[obj->index] = id;
mbed_official 75:245e7931bad6 88 }
mbed_official 75:245e7931bad6 89
mbed_official 75:245e7931bad6 90 void can_irq_free(can_t *obj)
mbed_official 75:245e7931bad6 91 {
mbed_official 75:245e7931bad6 92 CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 93
mbed_official 75:245e7931bad6 94 can->IER &= ~(CAN_IT_FMP0 | CAN_IT_FMP1 | CAN_IT_TME | \
mbed_official 75:245e7931bad6 95 CAN_IT_ERR | CAN_IT_EPV | CAN_IT_BOF);
mbed_official 75:245e7931bad6 96 can_irq_ids[obj->can] = 0;
mbed_official 75:245e7931bad6 97 }
mbed_official 75:245e7931bad6 98
mbed_official 75:245e7931bad6 99 void can_free(can_t *obj)
mbed_official 75:245e7931bad6 100 {
mbed_official 75:245e7931bad6 101 // Reset CAN and disable clock
mbed_official 75:245e7931bad6 102 if (obj->can == CAN_1) {
mbed_official 75:245e7931bad6 103 __HAL_RCC_CAN1_FORCE_RESET();
mbed_official 75:245e7931bad6 104 __HAL_RCC_CAN1_RELEASE_RESET();
mbed_official 75:245e7931bad6 105 __HAL_RCC_CAN1_CLK_DISABLE();
mbed_official 75:245e7931bad6 106 }
mbed_official 75:245e7931bad6 107
mbed_official 75:245e7931bad6 108 if (obj->can == CAN_2) {
mbed_official 75:245e7931bad6 109 __HAL_RCC_CAN2_FORCE_RESET();
mbed_official 75:245e7931bad6 110 __HAL_RCC_CAN2_RELEASE_RESET();
mbed_official 75:245e7931bad6 111 __HAL_RCC_CAN2_CLK_DISABLE();
mbed_official 75:245e7931bad6 112 }
mbed_official 75:245e7931bad6 113 }
mbed_official 75:245e7931bad6 114
mbed_official 75:245e7931bad6 115 // The following table is used to program bit_timing. It is an adjustment of the sample
mbed_official 75:245e7931bad6 116 // point by synchronizing on the start-bit edge and resynchronizing on the following edges.
mbed_official 75:245e7931bad6 117 // This table has the sampling points as close to 75% as possible (most commonly used).
mbed_official 75:245e7931bad6 118 // The first value is TSEG1, the second TSEG2.
mbed_official 75:245e7931bad6 119 static const int timing_pts[23][2] = {
mbed_official 75:245e7931bad6 120 {0x0, 0x0}, // 2, 50%
mbed_official 75:245e7931bad6 121 {0x1, 0x0}, // 3, 67%
mbed_official 75:245e7931bad6 122 {0x2, 0x0}, // 4, 75%
mbed_official 75:245e7931bad6 123 {0x3, 0x0}, // 5, 80%
mbed_official 75:245e7931bad6 124 {0x3, 0x1}, // 6, 67%
mbed_official 75:245e7931bad6 125 {0x4, 0x1}, // 7, 71%
mbed_official 75:245e7931bad6 126 {0x5, 0x1}, // 8, 75%
mbed_official 75:245e7931bad6 127 {0x6, 0x1}, // 9, 78%
mbed_official 75:245e7931bad6 128 {0x6, 0x2}, // 10, 70%
mbed_official 75:245e7931bad6 129 {0x7, 0x2}, // 11, 73%
mbed_official 75:245e7931bad6 130 {0x8, 0x2}, // 12, 75%
mbed_official 75:245e7931bad6 131 {0x9, 0x2}, // 13, 77%
mbed_official 75:245e7931bad6 132 {0x9, 0x3}, // 14, 71%
mbed_official 75:245e7931bad6 133 {0xA, 0x3}, // 15, 73%
mbed_official 75:245e7931bad6 134 {0xB, 0x3}, // 16, 75%
mbed_official 75:245e7931bad6 135 {0xC, 0x3}, // 17, 76%
mbed_official 75:245e7931bad6 136 {0xD, 0x3}, // 18, 78%
mbed_official 75:245e7931bad6 137 {0xD, 0x4}, // 19, 74%
mbed_official 75:245e7931bad6 138 {0xE, 0x4}, // 20, 75%
mbed_official 75:245e7931bad6 139 {0xF, 0x4}, // 21, 76%
mbed_official 75:245e7931bad6 140 {0xF, 0x5}, // 22, 73%
mbed_official 75:245e7931bad6 141 {0xF, 0x6}, // 23, 70%
mbed_official 75:245e7931bad6 142 {0xF, 0x7}, // 24, 67%
mbed_official 75:245e7931bad6 143 };
mbed_official 75:245e7931bad6 144
mbed_official 75:245e7931bad6 145 static unsigned int can_speed(unsigned int pclk, unsigned int cclk, unsigned char psjw)
mbed_official 75:245e7931bad6 146 {
mbed_official 75:245e7931bad6 147 uint32_t btr;
mbed_official 75:245e7931bad6 148 uint16_t brp = 0;
mbed_official 75:245e7931bad6 149 uint32_t calcbit;
mbed_official 75:245e7931bad6 150 uint32_t bitwidth;
mbed_official 75:245e7931bad6 151 int hit = 0;
mbed_official 75:245e7931bad6 152 int bits;
mbed_official 75:245e7931bad6 153
mbed_official 75:245e7931bad6 154 bitwidth = (pclk / cclk);
mbed_official 75:245e7931bad6 155
mbed_official 75:245e7931bad6 156 brp = bitwidth / 0x18;
mbed_official 75:245e7931bad6 157 while ((!hit) && (brp < bitwidth / 4)) {
mbed_official 75:245e7931bad6 158 brp++;
mbed_official 75:245e7931bad6 159 for (bits = 22; bits > 0; bits--) {
mbed_official 75:245e7931bad6 160 calcbit = (bits + 3) * (brp + 1);
mbed_official 75:245e7931bad6 161 if (calcbit == bitwidth) {
mbed_official 75:245e7931bad6 162 hit = 1;
mbed_official 75:245e7931bad6 163 break;
mbed_official 75:245e7931bad6 164 }
mbed_official 75:245e7931bad6 165 }
mbed_official 75:245e7931bad6 166 }
mbed_official 75:245e7931bad6 167
mbed_official 75:245e7931bad6 168 if (hit) {
mbed_official 75:245e7931bad6 169 btr = ((timing_pts[bits][1] << 20) & 0x00700000)
mbed_official 75:245e7931bad6 170 | ((timing_pts[bits][0] << 16) & 0x000F0000)
mbed_official 75:245e7931bad6 171 | ((psjw << 24) & 0x0000C000)
mbed_official 75:245e7931bad6 172 | ((brp << 0) & 0x000003FF);
mbed_official 75:245e7931bad6 173 } else {
mbed_official 75:245e7931bad6 174 btr = 0xFFFFFFFF;
mbed_official 75:245e7931bad6 175 }
mbed_official 75:245e7931bad6 176
mbed_official 75:245e7931bad6 177 return btr;
mbed_official 75:245e7931bad6 178
mbed_official 75:245e7931bad6 179 }
mbed_official 75:245e7931bad6 180
mbed_official 75:245e7931bad6 181 int can_frequency(can_t *obj, int f)
mbed_official 75:245e7931bad6 182 {
mbed_official 129:8a86d1aafce0 183 int pclk = HAL_RCC_GetPCLK1Freq();
mbed_official 75:245e7931bad6 184 int btr = can_speed(pclk, (unsigned int)f, 1);
mbed_official 75:245e7931bad6 185 CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 186
mbed_official 75:245e7931bad6 187 if (btr > 0) {
mbed_official 75:245e7931bad6 188 can->MCR |= CAN_MCR_INRQ ;
mbed_official 75:245e7931bad6 189 while((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
mbed_official 75:245e7931bad6 190 }
mbed_official 75:245e7931bad6 191 can->BTR = btr;
mbed_official 75:245e7931bad6 192 can->MCR &= ~(uint32_t)CAN_MCR_INRQ;
mbed_official 75:245e7931bad6 193 while((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
mbed_official 75:245e7931bad6 194 }
mbed_official 75:245e7931bad6 195 return 1;
mbed_official 75:245e7931bad6 196 } else {
mbed_official 75:245e7931bad6 197 return 0;
mbed_official 75:245e7931bad6 198 }
mbed_official 75:245e7931bad6 199 }
mbed_official 75:245e7931bad6 200
mbed_official 75:245e7931bad6 201 int can_write(can_t *obj, CAN_Message msg, int cc)
mbed_official 75:245e7931bad6 202 {
mbed_official 75:245e7931bad6 203 uint32_t transmitmailbox = 5;
mbed_official 75:245e7931bad6 204 CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 205
mbed_official 75:245e7931bad6 206 /* Select one empty transmit mailbox */
mbed_official 75:245e7931bad6 207 if ((can->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) {
mbed_official 75:245e7931bad6 208 transmitmailbox = 0;
mbed_official 75:245e7931bad6 209 } else if ((can->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) {
mbed_official 75:245e7931bad6 210 transmitmailbox = 1;
mbed_official 75:245e7931bad6 211 } else if ((can->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) {
mbed_official 75:245e7931bad6 212 transmitmailbox = 2;
mbed_official 75:245e7931bad6 213 } else {
mbed_official 75:245e7931bad6 214 transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
mbed_official 75:245e7931bad6 215 }
mbed_official 75:245e7931bad6 216
mbed_official 75:245e7931bad6 217 if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX) {
mbed_official 75:245e7931bad6 218 can->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
mbed_official 75:245e7931bad6 219 if (!(msg.format))
mbed_official 75:245e7931bad6 220 {
mbed_official 75:245e7931bad6 221 can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 21) | msg.type);
mbed_official 75:245e7931bad6 222 }
mbed_official 75:245e7931bad6 223 else
mbed_official 75:245e7931bad6 224 {
mbed_official 75:245e7931bad6 225 can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 3) | CAN_ID_EXT | msg.type);
mbed_official 75:245e7931bad6 226 }
mbed_official 75:245e7931bad6 227
mbed_official 75:245e7931bad6 228 /* Set up the DLC */
mbed_official 75:245e7931bad6 229 can->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
mbed_official 75:245e7931bad6 230 can->sTxMailBox[transmitmailbox].TDTR |= (msg.len & (uint8_t)0x0000000F);
mbed_official 75:245e7931bad6 231
mbed_official 75:245e7931bad6 232 /* Set up the data field */
mbed_official 75:245e7931bad6 233 can->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)msg.data[3] << 24) |
mbed_official 75:245e7931bad6 234 ((uint32_t)msg.data[2] << 16) |
mbed_official 75:245e7931bad6 235 ((uint32_t)msg.data[1] << 8) |
mbed_official 75:245e7931bad6 236 ((uint32_t)msg.data[0]));
mbed_official 75:245e7931bad6 237 can->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)msg.data[7] << 24) |
mbed_official 75:245e7931bad6 238 ((uint32_t)msg.data[6] << 16) |
mbed_official 75:245e7931bad6 239 ((uint32_t)msg.data[5] << 8) |
mbed_official 75:245e7931bad6 240 ((uint32_t)msg.data[4]));
mbed_official 75:245e7931bad6 241 /* Request transmission */
mbed_official 75:245e7931bad6 242 can->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
mbed_official 75:245e7931bad6 243 }
mbed_official 75:245e7931bad6 244
mbed_official 75:245e7931bad6 245 return 1;
mbed_official 75:245e7931bad6 246 }
mbed_official 75:245e7931bad6 247
mbed_official 75:245e7931bad6 248 int can_read(can_t *obj, CAN_Message *msg, int handle)
mbed_official 75:245e7931bad6 249 {
mbed_official 75:245e7931bad6 250 //handle is the FIFO number
mbed_official 75:245e7931bad6 251
mbed_official 75:245e7931bad6 252 CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 253
<> 156:95d6b41a828b 254 // check FPM0 which holds the pending message count in FIFO 0
<> 156:95d6b41a828b 255 // if no message is pending, return 0
<> 156:95d6b41a828b 256 if ((can->RF0R & CAN_RF0R_FMP0) == 0) {
<> 156:95d6b41a828b 257 return 0;
<> 156:95d6b41a828b 258 }
<> 156:95d6b41a828b 259
mbed_official 75:245e7931bad6 260 /* Get the Id */
mbed_official 75:245e7931bad6 261 msg->format = (CANFormat)((uint8_t)0x04 & can->sFIFOMailBox[handle].RIR);
mbed_official 75:245e7931bad6 262 if (!msg->format) {
mbed_official 75:245e7931bad6 263 msg->id = (uint32_t)0x000007FF & (can->sFIFOMailBox[handle].RIR >> 21);
mbed_official 75:245e7931bad6 264 } else {
mbed_official 75:245e7931bad6 265 msg->id = (uint32_t)0x1FFFFFFF & (can->sFIFOMailBox[handle].RIR >> 3);
mbed_official 75:245e7931bad6 266 }
mbed_official 75:245e7931bad6 267
mbed_official 75:245e7931bad6 268 msg->type = (CANType)((uint8_t)0x02 & can->sFIFOMailBox[handle].RIR);
mbed_official 75:245e7931bad6 269 /* Get the DLC */
mbed_official 75:245e7931bad6 270 msg->len = (uint8_t)0x0F & can->sFIFOMailBox[handle].RDTR;
mbed_official 75:245e7931bad6 271 // /* Get the FMI */
mbed_official 75:245e7931bad6 272 // msg->FMI = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDTR >> 8);
mbed_official 75:245e7931bad6 273 /* Get the data field */
mbed_official 75:245e7931bad6 274 msg->data[0] = (uint8_t)0xFF & can->sFIFOMailBox[handle].RDLR;
mbed_official 75:245e7931bad6 275 msg->data[1] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDLR >> 8);
mbed_official 75:245e7931bad6 276 msg->data[2] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDLR >> 16);
mbed_official 75:245e7931bad6 277 msg->data[3] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDLR >> 24);
mbed_official 75:245e7931bad6 278 msg->data[4] = (uint8_t)0xFF & can->sFIFOMailBox[handle].RDHR;
mbed_official 75:245e7931bad6 279 msg->data[5] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDHR >> 8);
mbed_official 75:245e7931bad6 280 msg->data[6] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDHR >> 16);
mbed_official 75:245e7931bad6 281 msg->data[7] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDHR >> 24);
mbed_official 75:245e7931bad6 282
mbed_official 75:245e7931bad6 283 /* Release the FIFO */
mbed_official 75:245e7931bad6 284 if(handle == CAN_FIFO0) {
mbed_official 75:245e7931bad6 285 /* Release FIFO0 */
<> 156:95d6b41a828b 286 can->RF0R |= CAN_RF0R_RFOM0;
mbed_official 75:245e7931bad6 287 } else { /* FIFONumber == CAN_FIFO1 */
mbed_official 75:245e7931bad6 288 /* Release FIFO1 */
<> 156:95d6b41a828b 289 can->RF1R |= CAN_RF1R_RFOM1;
mbed_official 75:245e7931bad6 290 }
mbed_official 75:245e7931bad6 291
mbed_official 75:245e7931bad6 292 return 1;
mbed_official 75:245e7931bad6 293 }
mbed_official 75:245e7931bad6 294
mbed_official 75:245e7931bad6 295 void can_reset(can_t *obj)
mbed_official 75:245e7931bad6 296 {
mbed_official 75:245e7931bad6 297 CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 298
mbed_official 75:245e7931bad6 299 can->MCR |= CAN_MCR_RESET;
mbed_official 75:245e7931bad6 300 can->ESR = 0x0;
mbed_official 75:245e7931bad6 301 }
mbed_official 75:245e7931bad6 302
mbed_official 75:245e7931bad6 303 unsigned char can_rderror(can_t *obj)
mbed_official 75:245e7931bad6 304 {
mbed_official 75:245e7931bad6 305 CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 306 return (can->ESR >> 24) & 0xFF;
mbed_official 75:245e7931bad6 307 }
mbed_official 75:245e7931bad6 308
mbed_official 75:245e7931bad6 309 unsigned char can_tderror(can_t *obj)
mbed_official 75:245e7931bad6 310 {
mbed_official 75:245e7931bad6 311 CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 312 return (can->ESR >> 16) & 0xFF;
mbed_official 75:245e7931bad6 313 }
mbed_official 75:245e7931bad6 314
mbed_official 75:245e7931bad6 315 void can_monitor(can_t *obj, int silent)
mbed_official 75:245e7931bad6 316 {
mbed_official 75:245e7931bad6 317 CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 318
mbed_official 75:245e7931bad6 319 can->MCR |= CAN_MCR_INRQ ;
mbed_official 75:245e7931bad6 320 while((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
mbed_official 75:245e7931bad6 321 }
mbed_official 75:245e7931bad6 322 if (silent) {
mbed_official 75:245e7931bad6 323 can->BTR |= ((uint32_t)1 << 31);
mbed_official 75:245e7931bad6 324 } else {
mbed_official 75:245e7931bad6 325 can->BTR &= ~((uint32_t)1 << 31);
mbed_official 75:245e7931bad6 326 }
mbed_official 75:245e7931bad6 327 can->MCR &= ~(uint32_t)CAN_MCR_INRQ;
mbed_official 75:245e7931bad6 328 while((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
mbed_official 75:245e7931bad6 329 }
mbed_official 75:245e7931bad6 330 }
mbed_official 75:245e7931bad6 331
mbed_official 75:245e7931bad6 332 int can_mode(can_t *obj, CanMode mode)
mbed_official 75:245e7931bad6 333 {
mbed_official 75:245e7931bad6 334 int success = 0;
mbed_official 75:245e7931bad6 335 CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 336 can->MCR |= CAN_MCR_INRQ ;
mbed_official 75:245e7931bad6 337 while((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
mbed_official 75:245e7931bad6 338 }
mbed_official 75:245e7931bad6 339 switch (mode) {
mbed_official 75:245e7931bad6 340 case MODE_NORMAL:
mbed_official 75:245e7931bad6 341 can->BTR &= ~(CAN_BTR_SILM | CAN_BTR_LBKM);
mbed_official 75:245e7931bad6 342 success = 1;
mbed_official 75:245e7931bad6 343 break;
mbed_official 75:245e7931bad6 344 case MODE_SILENT:
mbed_official 75:245e7931bad6 345 can->BTR |= CAN_BTR_SILM;
mbed_official 75:245e7931bad6 346 can->BTR &= ~CAN_BTR_LBKM;
mbed_official 75:245e7931bad6 347 success = 1;
mbed_official 75:245e7931bad6 348 break;
mbed_official 75:245e7931bad6 349 case MODE_TEST_GLOBAL:
mbed_official 75:245e7931bad6 350 case MODE_TEST_LOCAL:
mbed_official 75:245e7931bad6 351 can->BTR |= CAN_BTR_LBKM;
mbed_official 75:245e7931bad6 352 can->BTR &= ~CAN_BTR_SILM;
mbed_official 75:245e7931bad6 353 success = 1;
mbed_official 75:245e7931bad6 354 break;
mbed_official 75:245e7931bad6 355 case MODE_TEST_SILENT:
mbed_official 75:245e7931bad6 356 can->BTR |= (CAN_BTR_SILM | CAN_BTR_LBKM);
mbed_official 75:245e7931bad6 357 success = 1;
mbed_official 75:245e7931bad6 358 break;
mbed_official 75:245e7931bad6 359 default:
mbed_official 75:245e7931bad6 360 success = 0;
mbed_official 75:245e7931bad6 361 break;
mbed_official 75:245e7931bad6 362 }
mbed_official 75:245e7931bad6 363 can->MCR &= ~(uint32_t)CAN_MCR_INRQ;
mbed_official 75:245e7931bad6 364 while((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
mbed_official 75:245e7931bad6 365 }
mbed_official 75:245e7931bad6 366 return success;
mbed_official 75:245e7931bad6 367 }
mbed_official 75:245e7931bad6 368
mbed_official 75:245e7931bad6 369 int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle)
mbed_official 75:245e7931bad6 370 {
mbed_official 75:245e7931bad6 371 CanHandle.Instance = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 372 CAN_FilterConfTypeDef sFilterConfig;
mbed_official 75:245e7931bad6 373
mbed_official 75:245e7931bad6 374 sFilterConfig.FilterNumber = handle;
mbed_official 75:245e7931bad6 375 sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK;
mbed_official 75:245e7931bad6 376 sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT;
mbed_official 75:245e7931bad6 377 sFilterConfig.FilterIdHigh = (uint8_t) (id >> 8);
mbed_official 75:245e7931bad6 378 sFilterConfig.FilterIdLow = (uint8_t) id;
mbed_official 75:245e7931bad6 379 sFilterConfig.FilterMaskIdHigh = (uint8_t) (mask >> 8);
mbed_official 75:245e7931bad6 380 sFilterConfig.FilterMaskIdLow = (uint8_t) mask;
mbed_official 75:245e7931bad6 381 sFilterConfig.FilterFIFOAssignment = 0;
mbed_official 75:245e7931bad6 382 sFilterConfig.FilterActivation = ENABLE;
mbed_official 75:245e7931bad6 383 sFilterConfig.BankNumber = 14 + handle;
mbed_official 75:245e7931bad6 384
mbed_official 75:245e7931bad6 385 HAL_CAN_ConfigFilter(&CanHandle, &sFilterConfig);
mbed_official 75:245e7931bad6 386
mbed_official 75:245e7931bad6 387 return 0;
mbed_official 75:245e7931bad6 388 }
mbed_official 75:245e7931bad6 389
mbed_official 75:245e7931bad6 390 static void can_irq(CANName name, int id)
mbed_official 75:245e7931bad6 391 {
mbed_official 75:245e7931bad6 392 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
mbed_official 75:245e7931bad6 393 CanHandle.Instance = (CAN_TypeDef *)name;
mbed_official 75:245e7931bad6 394
mbed_official 75:245e7931bad6 395 if(__HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_TME)) {
mbed_official 75:245e7931bad6 396 tmp1 = __HAL_CAN_TRANSMIT_STATUS(&CanHandle, CAN_TXMAILBOX_0);
mbed_official 75:245e7931bad6 397 tmp2 = __HAL_CAN_TRANSMIT_STATUS(&CanHandle, CAN_TXMAILBOX_1);
mbed_official 75:245e7931bad6 398 tmp3 = __HAL_CAN_TRANSMIT_STATUS(&CanHandle, CAN_TXMAILBOX_2);
mbed_official 75:245e7931bad6 399 if(tmp1 || tmp2 || tmp3)
mbed_official 75:245e7931bad6 400 {
mbed_official 75:245e7931bad6 401 irq_handler(can_irq_ids[id], IRQ_TX);
mbed_official 75:245e7931bad6 402 }
mbed_official 75:245e7931bad6 403 }
mbed_official 75:245e7931bad6 404
mbed_official 75:245e7931bad6 405 tmp1 = __HAL_CAN_MSG_PENDING(&CanHandle, CAN_FIFO0);
mbed_official 75:245e7931bad6 406 tmp2 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_FMP0);
mbed_official 75:245e7931bad6 407
mbed_official 75:245e7931bad6 408 if((tmp1 != 0) && tmp2) {
mbed_official 75:245e7931bad6 409 irq_handler(can_irq_ids[id], IRQ_RX);
mbed_official 75:245e7931bad6 410 }
mbed_official 75:245e7931bad6 411
mbed_official 75:245e7931bad6 412 tmp1 = __HAL_CAN_GET_FLAG(&CanHandle, CAN_FLAG_EPV);
mbed_official 75:245e7931bad6 413 tmp2 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_EPV);
mbed_official 75:245e7931bad6 414 tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
mbed_official 75:245e7931bad6 415
mbed_official 75:245e7931bad6 416 if(tmp1 && tmp2 && tmp3) {
mbed_official 75:245e7931bad6 417 irq_handler(can_irq_ids[id], IRQ_PASSIVE);
mbed_official 75:245e7931bad6 418 }
mbed_official 75:245e7931bad6 419
mbed_official 75:245e7931bad6 420 tmp1 = __HAL_CAN_GET_FLAG(&CanHandle, CAN_FLAG_BOF);
mbed_official 75:245e7931bad6 421 tmp2 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_BOF);
mbed_official 75:245e7931bad6 422 tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
mbed_official 75:245e7931bad6 423 if(tmp1 && tmp2 && tmp3) {
mbed_official 75:245e7931bad6 424 irq_handler(can_irq_ids[id], IRQ_BUS);
mbed_official 75:245e7931bad6 425 }
mbed_official 75:245e7931bad6 426
mbed_official 75:245e7931bad6 427 tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
mbed_official 75:245e7931bad6 428 if(tmp1 && tmp2 && tmp3) {
mbed_official 75:245e7931bad6 429 irq_handler(can_irq_ids[id], IRQ_ERROR);
mbed_official 75:245e7931bad6 430 }
mbed_official 75:245e7931bad6 431 }
mbed_official 75:245e7931bad6 432
mbed_official 75:245e7931bad6 433 void CAN1_RX0_IRQHandler(void)
mbed_official 75:245e7931bad6 434 {
mbed_official 75:245e7931bad6 435 can_irq(CAN_1, 0);
mbed_official 75:245e7931bad6 436 }
mbed_official 75:245e7931bad6 437
mbed_official 75:245e7931bad6 438 void CAN1_TX_IRQHandler(void)
mbed_official 75:245e7931bad6 439 {
mbed_official 75:245e7931bad6 440 can_irq(CAN_1, 0);
mbed_official 75:245e7931bad6 441 }
mbed_official 75:245e7931bad6 442
mbed_official 75:245e7931bad6 443 void CAN1_SCE_IRQHandler(void)
mbed_official 75:245e7931bad6 444 {
mbed_official 75:245e7931bad6 445 can_irq(CAN_1, 0);
mbed_official 75:245e7931bad6 446 }
mbed_official 75:245e7931bad6 447
mbed_official 75:245e7931bad6 448 void CAN2_RX0_IRQHandler(void)
mbed_official 75:245e7931bad6 449 {
mbed_official 75:245e7931bad6 450 can_irq(CAN_2, 1);
mbed_official 75:245e7931bad6 451 }
mbed_official 75:245e7931bad6 452
mbed_official 75:245e7931bad6 453 void CAN2_TX_IRQHandler(void)
mbed_official 75:245e7931bad6 454 {
mbed_official 75:245e7931bad6 455 can_irq(CAN_2, 1);
mbed_official 75:245e7931bad6 456 }
mbed_official 75:245e7931bad6 457
mbed_official 75:245e7931bad6 458 void CAN2_SCE_IRQHandler(void)
mbed_official 75:245e7931bad6 459 {
mbed_official 75:245e7931bad6 460 can_irq(CAN_2, 1);
mbed_official 75:245e7931bad6 461 }
mbed_official 75:245e7931bad6 462
mbed_official 75:245e7931bad6 463 void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
mbed_official 75:245e7931bad6 464 {
mbed_official 75:245e7931bad6 465
mbed_official 75:245e7931bad6 466 CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
mbed_official 75:245e7931bad6 467 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 75:245e7931bad6 468 uint32_t vector = 0;
mbed_official 75:245e7931bad6 469 uint32_t ier;
mbed_official 75:245e7931bad6 470
mbed_official 75:245e7931bad6 471 if(obj->can == CAN_1) {
mbed_official 75:245e7931bad6 472 switch (type) {
mbed_official 75:245e7931bad6 473 case IRQ_RX:
mbed_official 75:245e7931bad6 474 ier = CAN_IT_FMP0;
mbed_official 75:245e7931bad6 475 irq_n = CAN1_RX0_IRQn;
mbed_official 75:245e7931bad6 476 vector = (uint32_t)&CAN1_RX0_IRQHandler;
mbed_official 75:245e7931bad6 477 break;
mbed_official 75:245e7931bad6 478 case IRQ_TX:
mbed_official 75:245e7931bad6 479 ier = CAN_IT_TME;
mbed_official 75:245e7931bad6 480 irq_n = CAN1_TX_IRQn;
mbed_official 75:245e7931bad6 481 vector = (uint32_t)&CAN1_TX_IRQHandler;
mbed_official 75:245e7931bad6 482 break;
mbed_official 75:245e7931bad6 483 case IRQ_ERROR:
mbed_official 75:245e7931bad6 484 ier = CAN_IT_ERR;
mbed_official 75:245e7931bad6 485 irq_n = CAN1_SCE_IRQn;
mbed_official 75:245e7931bad6 486 vector = (uint32_t)&CAN1_SCE_IRQHandler;
mbed_official 75:245e7931bad6 487 break;
mbed_official 75:245e7931bad6 488 case IRQ_PASSIVE:
mbed_official 75:245e7931bad6 489 ier = CAN_IT_EPV;
mbed_official 75:245e7931bad6 490 irq_n = CAN1_SCE_IRQn;
mbed_official 75:245e7931bad6 491 vector = (uint32_t)&CAN1_SCE_IRQHandler;
mbed_official 75:245e7931bad6 492 break;
mbed_official 75:245e7931bad6 493 case IRQ_BUS:
mbed_official 75:245e7931bad6 494 ier = CAN_IT_BOF;
mbed_official 75:245e7931bad6 495 irq_n = CAN1_SCE_IRQn;
mbed_official 75:245e7931bad6 496 vector = (uint32_t)&CAN1_SCE_IRQHandler;
mbed_official 75:245e7931bad6 497 break;
mbed_official 75:245e7931bad6 498 default: return;
mbed_official 75:245e7931bad6 499 }
mbed_official 75:245e7931bad6 500 } else {
mbed_official 75:245e7931bad6 501 switch (type) {
mbed_official 75:245e7931bad6 502 case IRQ_RX:
mbed_official 75:245e7931bad6 503 ier = CAN_IT_FMP0;
mbed_official 75:245e7931bad6 504 irq_n = CAN2_RX0_IRQn;
mbed_official 75:245e7931bad6 505 vector = (uint32_t)&CAN2_RX0_IRQHandler;
mbed_official 75:245e7931bad6 506 break;
mbed_official 75:245e7931bad6 507 case IRQ_TX:
mbed_official 75:245e7931bad6 508 ier = CAN_IT_TME;
mbed_official 75:245e7931bad6 509 irq_n = CAN2_TX_IRQn;
mbed_official 75:245e7931bad6 510 vector = (uint32_t)&CAN2_TX_IRQHandler;
mbed_official 75:245e7931bad6 511 break;
mbed_official 75:245e7931bad6 512 case IRQ_ERROR:
mbed_official 75:245e7931bad6 513 ier = CAN_IT_ERR;
mbed_official 75:245e7931bad6 514 irq_n = CAN2_SCE_IRQn;
mbed_official 75:245e7931bad6 515 vector = (uint32_t)&CAN2_SCE_IRQHandler;
mbed_official 75:245e7931bad6 516 break;
mbed_official 75:245e7931bad6 517 case IRQ_PASSIVE:
mbed_official 75:245e7931bad6 518 ier = CAN_IT_EPV;
mbed_official 75:245e7931bad6 519 irq_n = CAN2_SCE_IRQn;
mbed_official 75:245e7931bad6 520 vector = (uint32_t)&CAN2_SCE_IRQHandler;
mbed_official 75:245e7931bad6 521 break;
mbed_official 75:245e7931bad6 522 case IRQ_BUS:
mbed_official 75:245e7931bad6 523 ier = CAN_IT_BOF;
mbed_official 75:245e7931bad6 524 irq_n = CAN2_SCE_IRQn;
mbed_official 75:245e7931bad6 525 vector = (uint32_t)&CAN2_SCE_IRQHandler;
mbed_official 75:245e7931bad6 526 break;
mbed_official 75:245e7931bad6 527 default: return;
mbed_official 75:245e7931bad6 528 }
mbed_official 75:245e7931bad6 529 }
mbed_official 75:245e7931bad6 530
mbed_official 75:245e7931bad6 531 if(enable) {
mbed_official 75:245e7931bad6 532 can->IER |= ier;
mbed_official 75:245e7931bad6 533 } else {
mbed_official 75:245e7931bad6 534 can->IER &= ~ier;
mbed_official 75:245e7931bad6 535 }
mbed_official 75:245e7931bad6 536
mbed_official 75:245e7931bad6 537 NVIC_SetVector(irq_n, vector);
mbed_official 75:245e7931bad6 538 NVIC_EnableIRQ(irq_n);
mbed_official 75:245e7931bad6 539 }
mbed_official 75:245e7931bad6 540
mbed_official 75:245e7931bad6 541 #endif // DEVICE_CAN
mbed_official 75:245e7931bad6 542