Kevin Kadooka / mbed-dev

Fork of mbed-dev build 137, last build before FAT file system appears to be broken. Also reduced HSE timeout time in STM4XX HAL

Fork of mbed-dev by mbed official

targets/TARGET_Freescale/TARGET_KLXX/analogin_api.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_Freescale/TARGET_KLXX/analogin_api.c@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 17 #include "analogin_api.h"
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 20 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 21 #include "clk_freqs.h"
<> 144:ef7eb2e8f9f7 22 #include "PeripheralPins.h"
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 #define MAX_FADC 6000000
<> 144:ef7eb2e8f9f7 25 #define CHANNELS_A_SHIFT 5
<> 144:ef7eb2e8f9f7 26
<> 144:ef7eb2e8f9f7 27
<> 144:ef7eb2e8f9f7 28 void analogin_init(analogin_t *obj, PinName pin) {
<> 144:ef7eb2e8f9f7 29 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
<> 144:ef7eb2e8f9f7 30 MBED_ASSERT(obj->adc != (ADCName)NC);
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 SIM->SCGC6 |= SIM_SCGC6_ADC0_MASK;
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 uint32_t port = (uint32_t)pin >> PORT_SHIFT;
<> 144:ef7eb2e8f9f7 35 SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 uint32_t cfg2_muxsel = ADC_CFG2_MUXSEL_MASK;
<> 144:ef7eb2e8f9f7 38 if (obj->adc & (1 << CHANNELS_A_SHIFT)) {
<> 144:ef7eb2e8f9f7 39 cfg2_muxsel = 0;
<> 144:ef7eb2e8f9f7 40 }
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 // bus clk
<> 144:ef7eb2e8f9f7 43 uint32_t PCLK = bus_frequency();
<> 144:ef7eb2e8f9f7 44 uint32_t clkdiv;
<> 144:ef7eb2e8f9f7 45 for (clkdiv = 0; clkdiv < 4; clkdiv++) {
<> 144:ef7eb2e8f9f7 46 if ((PCLK >> clkdiv) <= MAX_FADC)
<> 144:ef7eb2e8f9f7 47 break;
<> 144:ef7eb2e8f9f7 48 }
<> 144:ef7eb2e8f9f7 49 if (clkdiv == 4) //Set max div
<> 144:ef7eb2e8f9f7 50 clkdiv = 0x7;
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 ADC0->CFG1 = ADC_CFG1_ADLPC_MASK // Low-Power Configuration
<> 144:ef7eb2e8f9f7 55 | ADC_CFG1_ADIV(clkdiv & 0x3) // Clock Divide Select: (Input Clock)/8
<> 144:ef7eb2e8f9f7 56 | ADC_CFG1_ADLSMP_MASK // Long Sample Time
<> 144:ef7eb2e8f9f7 57 | ADC_CFG1_MODE(3) // (16)bits Resolution
<> 144:ef7eb2e8f9f7 58 | ADC_CFG1_ADICLK(clkdiv >> 2); // Input Clock: (Bus Clock)/2
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 ADC0->CFG2 = cfg2_muxsel // ADxxb or ADxxa channels
<> 144:ef7eb2e8f9f7 61 | ADC_CFG2_ADHSC_MASK // High-Speed Configuration
<> 144:ef7eb2e8f9f7 62 | ADC_CFG2_ADLSTS(0); // Long Sample Time Select
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 ADC0->SC2 = ADC_SC2_REFSEL(0); // Default Voltage Reference
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 ADC0->SC3 = ADC_SC3_AVGE_MASK // Hardware Average Enable
<> 144:ef7eb2e8f9f7 67 | ADC_SC3_AVGS(0); // 4 Samples Averaged
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 pinmap_pinout(pin, PinMap_ADC);
<> 144:ef7eb2e8f9f7 70 }
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 uint16_t analogin_read_u16(analogin_t *obj) {
<> 144:ef7eb2e8f9f7 73 // start conversion
<> 144:ef7eb2e8f9f7 74 ADC0->SC1[0] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 // Wait Conversion Complete
<> 144:ef7eb2e8f9f7 77 while ((ADC0->SC1[0] & ADC_SC1_COCO_MASK) != ADC_SC1_COCO_MASK);
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 // Return value
<> 144:ef7eb2e8f9f7 80 return (uint16_t)ADC0->R[0];
<> 144:ef7eb2e8f9f7 81 }
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 float analogin_read(analogin_t *obj) {
<> 144:ef7eb2e8f9f7 84 uint16_t value = analogin_read_u16(obj);
<> 144:ef7eb2e8f9f7 85 return (float)value * (1.0f / (float)0xFFFF);
<> 144:ef7eb2e8f9f7 86 }
<> 144:ef7eb2e8f9f7 87