Kevin Kadooka / mbed-dev

Fork of mbed-dev build 137, last build before FAT file system appears to be broken. Also reduced HSE timeout time in STM4XX HAL

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32625/mxc/ioman.h@167:356ef919c855, 2017-06-20 (annotated)

Committer:
kkado
Date:
Tue Jun 20 11:06:37 2017 +0000
Revision:
167:356ef919c855
Parent:
150:02e0a0aed4ec 
Build 137 with reduced HSE timeout

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 150:02e0a0aed4ec 1 /*******************************************************************************
<> 150:02e0a0aed4ec 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 150:02e0a0aed4ec 3 *
<> 150:02e0a0aed4ec 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 150:02e0a0aed4ec 5 * copy of this software and associated documentation files (the "Software"),
<> 150:02e0a0aed4ec 6 * to deal in the Software without restriction, including without limitation
<> 150:02e0a0aed4ec 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 150:02e0a0aed4ec 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 150:02e0a0aed4ec 9 * Software is furnished to do so, subject to the following conditions:
<> 150:02e0a0aed4ec 10 *
<> 150:02e0a0aed4ec 11 * The above copyright notice and this permission notice shall be included
<> 150:02e0a0aed4ec 12 * in all copies or substantial portions of the Software.
<> 150:02e0a0aed4ec 13 *
<> 150:02e0a0aed4ec 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 150:02e0a0aed4ec 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 150:02e0a0aed4ec 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 150:02e0a0aed4ec 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 150:02e0a0aed4ec 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 150:02e0a0aed4ec 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 150:02e0a0aed4ec 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 150:02e0a0aed4ec 21 *
<> 150:02e0a0aed4ec 22 * Except as contained in this notice, the name of Maxim Integrated
<> 150:02e0a0aed4ec 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 150:02e0a0aed4ec 24 * Products, Inc. Branding Policy.
<> 150:02e0a0aed4ec 25 *
<> 150:02e0a0aed4ec 26 * The mere transfer of this software does not imply any licenses
<> 150:02e0a0aed4ec 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 150:02e0a0aed4ec 28 * trademarks, maskwork rights, or any other form of intellectual
<> 150:02e0a0aed4ec 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 150:02e0a0aed4ec 30 * ownership rights.
<> 150:02e0a0aed4ec 31 *
<> 150:02e0a0aed4ec 32 * $Date: 2016-06-14 15:52:19 -0500 (Tue, 14 Jun 2016) $
<> 150:02e0a0aed4ec 33 * $Revision: 23326 $
<> 150:02e0a0aed4ec 34 *
<> 150:02e0a0aed4ec 35 ******************************************************************************/
<> 150:02e0a0aed4ec 36
<> 150:02e0a0aed4ec 37 /**
<> 150:02e0a0aed4ec 38 * @file ioman.h
<> 150:02e0a0aed4ec 39 * @brief IOMAN provides IO Management to the device. The functions in this
<> 150:02e0a0aed4ec 40 * API enable requesting port pin assignment and release for all peripherals
<> 150:02e0a0aed4ec 41 * with external I/O. Port pin mapping support is included for peripherals
<> 150:02e0a0aed4ec 42 * that can support more than one pin mapping in a package.
<> 150:02e0a0aed4ec 43 */
<> 150:02e0a0aed4ec 44
<> 150:02e0a0aed4ec 45 #ifndef _IOMAN_H_
<> 150:02e0a0aed4ec 46 #define _IOMAN_H_
<> 150:02e0a0aed4ec 47
<> 150:02e0a0aed4ec 48 #include "mxc_config.h"
<> 150:02e0a0aed4ec 49 #include "ioman_regs.h"
<> 150:02e0a0aed4ec 50
<> 150:02e0a0aed4ec 51 #ifdef __cplusplus
<> 150:02e0a0aed4ec 52 extern "C" {
<> 150:02e0a0aed4ec 53 #endif
<> 150:02e0a0aed4ec 54
<> 150:02e0a0aed4ec 55 /***** Definitions *****/
<> 150:02e0a0aed4ec 56
<> 150:02e0a0aed4ec 57 /** @brief Aliases for IOMAN package mapping field values. Refer to the
<> 150:02e0a0aed4ec 58 * User's Guide for pinouts for each mapping.
<> 150:02e0a0aed4ec 59 */
<> 150:02e0a0aed4ec 60 typedef enum {
<> 150:02e0a0aed4ec 61 IOMAN_MAP_UNUSED = 0, /**< Pin is not used */
<> 150:02e0a0aed4ec 62 IOMAN_MAP_A = 0, /**< Pin Mapping A */
<> 150:02e0a0aed4ec 63 IOMAN_MAP_B = 1, /**< Pin Mapping B */
<> 150:02e0a0aed4ec 64 }
<> 150:02e0a0aed4ec 65 ioman_map_t;
<> 150:02e0a0aed4ec 66
<> 150:02e0a0aed4ec 67 /** @brief Typing of IOMAN Req and Ack register fields */
<> 150:02e0a0aed4ec 68 typedef union {
<> 150:02e0a0aed4ec 69 uint32_t value;
<> 150:02e0a0aed4ec 70 mxc_ioman_spix_req_t spix; /**< SPIX IOMAN configuration struct */
<> 150:02e0a0aed4ec 71 mxc_ioman_uart0_req_t uart; /**< UART IOMAN configuration struct, see mxc_ioman_uart0_req_t */
<> 150:02e0a0aed4ec 72 mxc_ioman_i2cm0_req_t i2cm; /**< I2C Master 0 IOMAN configuration struct, see mxc_ioman_i2cm0_req_t */
<> 150:02e0a0aed4ec 73 mxc_ioman_i2cs_req_t i2cs; /**< I2C Slave IOMAN configuration struct, see mxc_ioman_i2cs_req_t */
<> 150:02e0a0aed4ec 74 mxc_ioman_spim0_req_t spim0; /**< SPI Master 0 IOMAN configuration struct, see mxc_ioman_spim0_req_t */
<> 150:02e0a0aed4ec 75 mxc_ioman_spim1_req_t spim1; /**< SPI Master 1 IOMAN configuration struct, see mxc_ioman_spim1_req_t */
<> 150:02e0a0aed4ec 76 mxc_ioman_spim2_req_t spim2; /**< SPI Master 2 IOMAN configuration struct, see mxc_ioman_spim1_req_t */
<> 150:02e0a0aed4ec 77 mxc_ioman_spis_req_t spis; /**< SPI Slave IOMAN configuration struct, see mxc_ioman_spis_req_t */
<> 150:02e0a0aed4ec 78 mxc_ioman_owm_req_t owm; /**< 1-Wire Master IOMAN configuration struct, see mxc_ioman_owm_req_t */
<> 150:02e0a0aed4ec 79 } ioman_req_t;
<> 150:02e0a0aed4ec 80
<> 150:02e0a0aed4ec 81 /** @brief IOMAN configuration object */
<> 150:02e0a0aed4ec 82 typedef struct {
<> 150:02e0a0aed4ec 83 volatile uint32_t *req_reg; /** Pointer to an IOMAN request register */
<> 150:02e0a0aed4ec 84 volatile uint32_t *ack_reg; /** Pointer to an IOMAN acknowledge register */
<> 150:02e0a0aed4ec 85 ioman_req_t req_val; /** IOMAN request register value, see ioman_req_t */
<> 150:02e0a0aed4ec 86 } ioman_cfg_t;
<> 150:02e0a0aed4ec 87
<> 150:02e0a0aed4ec 88
<> 150:02e0a0aed4ec 89 /***** Function Prototypes *****/
<> 150:02e0a0aed4ec 90
<> 150:02e0a0aed4ec 91 /**
<> 150:02e0a0aed4ec 92 * @brief Configure the IO Manager using the specified configuration object.
<> 150:02e0a0aed4ec 93 * @param cfg IOMAN configuration object
<> 150:02e0a0aed4ec 94 * @returns E_NO_ERROR Configuration successful
<> 150:02e0a0aed4ec 95 */
<> 150:02e0a0aed4ec 96 int IOMAN_Config(const ioman_cfg_t *cfg);
<> 150:02e0a0aed4ec 97
<> 150:02e0a0aed4ec 98 /**
<> 150:02e0a0aed4ec 99 * @brief Create an IOMAN configuration object for the SPI XIP module. Call IOMAN_Config with this object.
<> 150:02e0a0aed4ec 100 * @param core Request (1) or release (0) SPIX core external pins
<> 150:02e0a0aed4ec 101 * @param ss0 Request (1) or release (0) slave select 0 active out
<> 150:02e0a0aed4ec 102 * @param ss1 Request (1) or release (0) slave select 1 active out
<> 150:02e0a0aed4ec 103 * @param ss2 Request (1) or release (0) slave select 2 active out
<> 150:02e0a0aed4ec 104 * @param quad Request (1) or release (0) quad IO
<> 150:02e0a0aed4ec 105 * @param fast Request (1) or release (0) fast mode
<> 150:02e0a0aed4ec 106 * @returns io_man_cfg_t IOMAN configuration object for the SPI XIP module.
<> 150:02e0a0aed4ec 107 */
<> 150:02e0a0aed4ec 108 ioman_cfg_t IOMAN_SPIX(int core, int ss0, int ss1, int ss2, int quad, int fast);
<> 150:02e0a0aed4ec 109
<> 150:02e0a0aed4ec 110 /**
<> 150:02e0a0aed4ec 111 * @brief Create an IOMAN configuration object for a UART module. Call IOMAN_Config with this object.
<> 150:02e0a0aed4ec 112 * @param idx Index of the UART module
<> 150:02e0a0aed4ec 113 * @param io_map Set the pin mapping for RX/TX pins, see ioman_map_t
<> 150:02e0a0aed4ec 114 * @param cts_map Set the pin mapping for CTS pin, see ioman_map_t
<> 150:02e0a0aed4ec 115 * @param rts_map Set the pin mapping for RTS pin, see ioman_map_t
<> 150:02e0a0aed4ec 116 * @param io_en Request (1) or release (0) RX and TX pins
<> 150:02e0a0aed4ec 117 * @param cts_en Request (1) or release (0) CTS pin
<> 150:02e0a0aed4ec 118 * @param rts_en Request (1) or release (0) RTS pin
<> 150:02e0a0aed4ec 119 * @returns ioman_cfg_t IOMAN configuration object for the UART module
<> 150:02e0a0aed4ec 120 */
<> 150:02e0a0aed4ec 121 ioman_cfg_t IOMAN_UART(int idx, ioman_map_t io_map, ioman_map_t cts_map, ioman_map_t rts_map, int io_en, int cts_en, int rts_en);
<> 150:02e0a0aed4ec 122
<> 150:02e0a0aed4ec 123 /**
<> 150:02e0a0aed4ec 124 * @brief Create an IOMAN configuration object for the I2CM module. Call IOMAN_Config with this object.
<> 150:02e0a0aed4ec 125 * @param idx Index of the I2CM module
<> 150:02e0a0aed4ec 126 * @param io_en Request (1) or release (0) the I/O for the I2CM0 module
<> 150:02e0a0aed4ec 127 * @param scl_mode Set SCL in Push/Pull mode (1) or open-drain (0).
<> 150:02e0a0aed4ec 128 * @returns ioman_cfg_t IOMAN configuration object for the I2CM0 module.
<> 150:02e0a0aed4ec 129 */
<> 150:02e0a0aed4ec 130 ioman_cfg_t IOMAN_I2CM(int idx, int io_en, int scl_mode);
<> 150:02e0a0aed4ec 131
<> 150:02e0a0aed4ec 132 /**
<> 150:02e0a0aed4ec 133 * @brief Create an IOMAN configuration object for an I2C slave module. Call IOMAN_Config with this object.
<> 150:02e0a0aed4ec 134 * @param map Select the pin mapping for all configured pins, see ioman_map_t
<> 150:02e0a0aed4ec 135 * @param io_en Request (1) or release (0) the I/O for this module
<> 150:02e0a0aed4ec 136 * @returns ioman_cfg_t IOMAN configuration object for the I2CS module
<> 150:02e0a0aed4ec 137 */
<> 150:02e0a0aed4ec 138 ioman_cfg_t IOMAN_I2CS(ioman_map_t map, int io_en);
<> 150:02e0a0aed4ec 139
<> 150:02e0a0aed4ec 140 /**
<> 150:02e0a0aed4ec 141 * @brief Create an IOMAN configuration object for a SPI Master (SPIM) module. Call IOMAN_Config with this object.
<> 150:02e0a0aed4ec 142 * @param io_en Request (1) or release (0) the core IO for the module
<> 150:02e0a0aed4ec 143 * @param ss0 Request (1) or release (0) slave select 0
<> 150:02e0a0aed4ec 144 * @param ss1 Request (1) or release (0) slave select 1
<> 150:02e0a0aed4ec 145 * @param ss2 Request (1) or release (0) slave select 2
<> 150:02e0a0aed4ec 146 * @param ss3 Request (1) or release (0) slave select 3
<> 150:02e0a0aed4ec 147 * @param ss4 Request (1) or release (0) slave select 4
<> 150:02e0a0aed4ec 148 * @param quad Request (1) or release (0) quad IO
<> 150:02e0a0aed4ec 149 * @param fast Request (1) or release (0) fast mode
<> 150:02e0a0aed4ec 150 * @returns ioman_cfg_t IOMAN configuration object for an SPIM0 module
<> 150:02e0a0aed4ec 151 */
<> 150:02e0a0aed4ec 152 ioman_cfg_t IOMAN_SPIM0(int io_en, int ss0, int ss1, int ss2, int ss3, int ss4, int quad, int fast);
<> 150:02e0a0aed4ec 153
<> 150:02e0a0aed4ec 154 /**
<> 150:02e0a0aed4ec 155 * @brief Create an IOMAN configuration object for a SPIM module. Call IOMAN_Config with this object.
<> 150:02e0a0aed4ec 156 * @param io_en Request (1) or release (0) the core IO for the module
<> 150:02e0a0aed4ec 157 * @param ss0 Request (1) or release (0) slave select 0
<> 150:02e0a0aed4ec 158 * @param ss1 Request (1) or release (0) slave select 1
<> 150:02e0a0aed4ec 159 * @param ss2 Request (1) or release (0) slave select 2
<> 150:02e0a0aed4ec 160 * @param quad Request (1) or release (0) quad IO
<> 150:02e0a0aed4ec 161 * @param fast Request (1) or release (0) fast mode
<> 150:02e0a0aed4ec 162 * @returns ioman_cfg_t IOMAN configuration object for the SPIM1 module.
<> 150:02e0a0aed4ec 163 */
<> 150:02e0a0aed4ec 164 ioman_cfg_t IOMAN_SPIM1(int io_en, int ss0, int ss1, int ss2, int quad, int fast);
<> 150:02e0a0aed4ec 165
<> 150:02e0a0aed4ec 166 /**
<> 150:02e0a0aed4ec 167 * @brief Create an IOMAN configuration object for a SPI module. Call IOMAN_Config with this object.
<> 150:02e0a0aed4ec 168 * @param io_en Request (1) or release (0) the core IO for the module
<> 150:02e0a0aed4ec 169 * @param ss0 Request (1) or release (0) slave select 0
<> 150:02e0a0aed4ec 170 * @param ss1 Request (1) or release (0) slave select 1
<> 150:02e0a0aed4ec 171 * @param ss2 Request (1) or release (0) slave select 2
<> 150:02e0a0aed4ec 172 * @param sr0 Request (1) or release (0) slave ready 0
<> 150:02e0a0aed4ec 173 * @param sr1 Request (1) or release (0) slave ready 1
<> 150:02e0a0aed4ec 174 * @param fast Request (1) or release (0) fast mode
<> 150:02e0a0aed4ec 175 * @returns ioman_cfg_t IOMAN configuration object for the SPIM2 module
<> 150:02e0a0aed4ec 176 */
<> 150:02e0a0aed4ec 177 ioman_cfg_t IOMAN_SPIM2(int io_en, int ss0, int ss1, int ss2, int sr0, int sr1, int quad, int fast);
<> 150:02e0a0aed4ec 178
<> 150:02e0a0aed4ec 179 /**
<> 150:02e0a0aed4ec 180 * @brief Create an IOMAN configuration object for a SPI module. Call IOMAN_Config with this object.
<> 150:02e0a0aed4ec 181 * @param io_en Request (1) or release (0) the core IO for the module
<> 150:02e0a0aed4ec 182 * @param quad Request (1) or release (0) quad IO
<> 150:02e0a0aed4ec 183 * @param fast Request (1) or release (0) fast mode
<> 150:02e0a0aed4ec 184 * @returns ioman_cfg_t IOMAN configuration object for the SPIM2 module
<> 150:02e0a0aed4ec 185 */
<> 150:02e0a0aed4ec 186 ioman_cfg_t IOMAN_SPIS(int io_en, int quad, int fast);
<> 150:02e0a0aed4ec 187
<> 150:02e0a0aed4ec 188 /**
<> 150:02e0a0aed4ec 189 * @brief Create an IOMAN configuration object for the 1-Wire Master module. Call IOMAN_Config with this object.
<> 150:02e0a0aed4ec 190 * @param io_en Request (1) or release (0) the core IO for the module
<> 150:02e0a0aed4ec 191 * @param epu Request (1) or release (0) external pullup
<> 150:02e0a0aed4ec 192 * @returns ioman_cfg_t IOMAN configuration object for the OWM module
<> 150:02e0a0aed4ec 193 */
<> 150:02e0a0aed4ec 194 ioman_cfg_t IOMAN_OWM(int io_en, int epu);
<> 150:02e0a0aed4ec 195
<> 150:02e0a0aed4ec 196 /**
<> 150:02e0a0aed4ec 197 * @}
<> 150:02e0a0aed4ec 198 */
<> 150:02e0a0aed4ec 199
<> 150:02e0a0aed4ec 200 /******************************************************************************/
<> 150:02e0a0aed4ec 201 /* All the function prototypes above are implemented as macros below. The
<> 150:02e0a0aed4ec 202 * above prototypes are for simplicity in doxygen.
<> 150:02e0a0aed4ec 203 */
<> 150:02e0a0aed4ec 204 #define IOMAN_SPIX(c, ss0, ss1, ss2, q, f) { \
<> 150:02e0a0aed4ec 205 .req_reg = &MXC_IOMAN->spix_req, \
<> 150:02e0a0aed4ec 206 .ack_reg = &MXC_IOMAN->spix_ack, \
<> 150:02e0a0aed4ec 207 .req_val.spix = { .core_io_req = c, \
<> 150:02e0a0aed4ec 208 .ss0_io_req = ss0, \
<> 150:02e0a0aed4ec 209 .ss1_io_req = ss1, \
<> 150:02e0a0aed4ec 210 .ss2_io_req = ss2, \
<> 150:02e0a0aed4ec 211 .quad_io_req = q, \
<> 150:02e0a0aed4ec 212 .fast_mode = f } }
<> 150:02e0a0aed4ec 213
<> 150:02e0a0aed4ec 214 #define IOMAN_UART(i, im, cm, rm, ien, cen, ren) { \
<> 150:02e0a0aed4ec 215 .req_reg = (uint32_t*)((unsigned int)(&MXC_IOMAN->uart0_req) + (i * 2*sizeof(uint32_t))), \
<> 150:02e0a0aed4ec 216 .ack_reg = (uint32_t*)((unsigned int)(&MXC_IOMAN->uart0_ack) + (i * 2*sizeof(uint32_t))), \
<> 150:02e0a0aed4ec 217 .req_val.uart = { .io_map = im, \
<> 150:02e0a0aed4ec 218 .cts_map = cm, \
<> 150:02e0a0aed4ec 219 .rts_map = rm, \
<> 150:02e0a0aed4ec 220 .io_req = ien, \
<> 150:02e0a0aed4ec 221 .cts_io_req = cen, \
<> 150:02e0a0aed4ec 222 .rts_io_req = ren } }
<> 150:02e0a0aed4ec 223
<> 150:02e0a0aed4ec 224 #define IOMAN_I2CM(i, ien, scl_mode) { \
<> 150:02e0a0aed4ec 225 .req_reg = (uint32_t*)((unsigned int)(&MXC_IOMAN->i2cm0_req) + (i * 2*sizeof(uint32_t))), \
<> 150:02e0a0aed4ec 226 .ack_reg = (uint32_t*)((unsigned int)(&MXC_IOMAN->i2cm0_ack) + (i * 2*sizeof(uint32_t))), \
<> 150:02e0a0aed4ec 227 .req_val.i2cm = { .mapping_req = ien, \
<> 150:02e0a0aed4ec 228 .scl_push_pull = scl_mode } }
<> 150:02e0a0aed4ec 229
<> 150:02e0a0aed4ec 230 #define IOMAN_I2CS(m, ien) { \
<> 150:02e0a0aed4ec 231 .req_reg = &MXC_IOMAN->i2cs_req, \
<> 150:02e0a0aed4ec 232 .ack_reg = &MXC_IOMAN->i2cs_ack, \
<> 150:02e0a0aed4ec 233 .req_val.i2cs = { .io_sel = m, \
<> 150:02e0a0aed4ec 234 .mapping_req = ien } }
<> 150:02e0a0aed4ec 235
<> 150:02e0a0aed4ec 236 #define IOMAN_SPIM0(io, ss0, ss1, ss2, ss3, ss4, q, f) { \
<> 150:02e0a0aed4ec 237 .req_reg = &MXC_IOMAN->spim0_req, \
<> 150:02e0a0aed4ec 238 .ack_reg = &MXC_IOMAN->spim0_ack, \
<> 150:02e0a0aed4ec 239 .req_val.spim0 = { .core_io_req = io, \
<> 150:02e0a0aed4ec 240 .ss0_io_req = ss0, \
<> 150:02e0a0aed4ec 241 .ss1_io_req = ss1, \
<> 150:02e0a0aed4ec 242 .ss2_io_req = ss2, \
<> 150:02e0a0aed4ec 243 .ss3_io_req = ss3, \
<> 150:02e0a0aed4ec 244 .ss4_io_req = ss4, \
<> 150:02e0a0aed4ec 245 .quad_io_req = q, \
<> 150:02e0a0aed4ec 246 .fast_mode = f } }
<> 150:02e0a0aed4ec 247
<> 150:02e0a0aed4ec 248 #define IOMAN_SPIM1(io, ss0, ss1, ss2, q, f) { \
<> 150:02e0a0aed4ec 249 .req_reg = &MXC_IOMAN->spim1_req, \
<> 150:02e0a0aed4ec 250 .ack_reg = &MXC_IOMAN->spim1_ack, \
<> 150:02e0a0aed4ec 251 .req_val.spim1 = { .core_io_req = io, \
<> 150:02e0a0aed4ec 252 .ss0_io_req = ss0, \
<> 150:02e0a0aed4ec 253 .ss1_io_req = ss1, \
<> 150:02e0a0aed4ec 254 .ss2_io_req = ss2, \
<> 150:02e0a0aed4ec 255 .quad_io_req = q, \
<> 150:02e0a0aed4ec 256 .fast_mode = f } }
<> 150:02e0a0aed4ec 257
<> 150:02e0a0aed4ec 258 #define IOMAN_SPIM2(io, ss0, ss1, ss2, sr0, sr1, q, f) { \
<> 150:02e0a0aed4ec 259 .req_reg = &MXC_IOMAN->spim2_req, \
<> 150:02e0a0aed4ec 260 .ack_reg = &MXC_IOMAN->spim2_ack, \
<> 150:02e0a0aed4ec 261 .req_val.spim2 = { .mapping_req = 0, \
<> 150:02e0a0aed4ec 262 .core_io_req = io, \
<> 150:02e0a0aed4ec 263 .ss0_io_req = ss0, \
<> 150:02e0a0aed4ec 264 .ss1_io_req = ss1, \
<> 150:02e0a0aed4ec 265 .ss2_io_req = ss2, \
<> 150:02e0a0aed4ec 266 .sr0_io_req = sr0, \
<> 150:02e0a0aed4ec 267 .sr1_io_req = sr1, \
<> 150:02e0a0aed4ec 268 .quad_io_req = q, \
<> 150:02e0a0aed4ec 269 .fast_mode = f } }
<> 150:02e0a0aed4ec 270
<> 150:02e0a0aed4ec 271 #define IOMAN_SPIS(io, q, f) { \
<> 150:02e0a0aed4ec 272 .req_reg = &MXC_IOMAN->spis_req, \
<> 150:02e0a0aed4ec 273 .ack_reg = &MXC_IOMAN->spis_ack, \
<> 150:02e0a0aed4ec 274 .req_val.spis = { .core_io_req = io, \
<> 150:02e0a0aed4ec 275 .quad_io_req = q, \
<> 150:02e0a0aed4ec 276 .fast_mode = f } }
<> 150:02e0a0aed4ec 277
<> 150:02e0a0aed4ec 278 #define IOMAN_OWM(io, p) { \
<> 150:02e0a0aed4ec 279 .req_reg = &MXC_IOMAN->owm_req, \
<> 150:02e0a0aed4ec 280 .ack_reg = &MXC_IOMAN->owm_ack, \
<> 150:02e0a0aed4ec 281 .req_val.owm = { .mapping_req = io, \
<> 150:02e0a0aed4ec 282 .epu_io_req = p } }
<> 150:02e0a0aed4ec 283
<> 150:02e0a0aed4ec 284 #ifdef __cplusplus
<> 150:02e0a0aed4ec 285 }
<> 150:02e0a0aed4ec 286 #endif
<> 150:02e0a0aed4ec 287
<> 150:02e0a0aed4ec 288 #endif /* _IOMAN_H_ */