Fork of mbed-dev build 137, last build before FAT file system appears to be broken. Also reduced HSE timeout time in STM4XX HAL

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Child:
156:95d6b41a828b
This updates the lib to the mbed lib v128

NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 *******************************************************************************
<> 149:156823d33999 3 * Copyright (c) 2015, STMicroelectronics
<> 149:156823d33999 4 * All rights reserved.
<> 149:156823d33999 5 *
<> 149:156823d33999 6 * Redistribution and use in source and binary forms, with or without
<> 149:156823d33999 7 * modification, are permitted provided that the following conditions are met:
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 10 * this list of conditions and the following disclaimer.
<> 149:156823d33999 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 12 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 13 * and/or other materials provided with the distribution.
<> 149:156823d33999 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 15 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 16 * without specific prior written permission.
<> 149:156823d33999 17 *
<> 149:156823d33999 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 28 *******************************************************************************
<> 149:156823d33999 29 */
<> 149:156823d33999 30 #include "mbed_assert.h"
<> 149:156823d33999 31 #include "serial_api.h"
<> 149:156823d33999 32
<> 149:156823d33999 33 #if DEVICE_SERIAL
<> 149:156823d33999 34
<> 149:156823d33999 35 #include "cmsis.h"
<> 149:156823d33999 36 #include "pinmap.h"
<> 149:156823d33999 37 #include <string.h>
<> 149:156823d33999 38 #include "PeripheralPins.h"
<> 149:156823d33999 39 #include "mbed_error.h"
<> 149:156823d33999 40
<> 149:156823d33999 41 #if defined (TARGET_STM32F091RC)
<> 149:156823d33999 42 #define UART_NUM (8)
<> 149:156823d33999 43 #elif defined (TARGET_STM32F030R8) || defined (TARGET_STM32F051R8) || defined (TARGET_STM32F042K6)
<> 149:156823d33999 44 #define UART_NUM (2)
<> 149:156823d33999 45 #elif defined (TARGET_STM32F031K6)
<> 149:156823d33999 46 #define UART_NUM (1)
<> 149:156823d33999 47 #else
<> 149:156823d33999 48 #define UART_NUM (4)
<> 149:156823d33999 49 #endif
<> 149:156823d33999 50
<> 149:156823d33999 51 static uint32_t serial_irq_ids[UART_NUM] = {0};
<> 149:156823d33999 52 static UART_HandleTypeDef uart_handlers[UART_NUM];
<> 149:156823d33999 53
<> 149:156823d33999 54 static uart_irq_handler irq_handler;
<> 149:156823d33999 55
<> 149:156823d33999 56 int stdio_uart_inited = 0;
<> 149:156823d33999 57 serial_t stdio_uart;
<> 149:156823d33999 58
<> 149:156823d33999 59 #if DEVICE_SERIAL_ASYNCH
<> 149:156823d33999 60 #define SERIAL_S(obj) (&((obj)->serial))
<> 149:156823d33999 61 #else
<> 149:156823d33999 62 #define SERIAL_S(obj) (obj)
<> 149:156823d33999 63 #endif
<> 149:156823d33999 64
<> 149:156823d33999 65 static void init_uart(serial_t *obj)
<> 149:156823d33999 66 {
<> 149:156823d33999 67 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 68 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 69 huart->Instance = (USART_TypeDef *)(obj_s->uart);
<> 149:156823d33999 70
<> 149:156823d33999 71 huart->Init.BaudRate = obj_s->baudrate;
<> 149:156823d33999 72 huart->Init.WordLength = obj_s->databits;
<> 149:156823d33999 73 huart->Init.StopBits = obj_s->stopbits;
<> 149:156823d33999 74 huart->Init.Parity = obj_s->parity;
<> 149:156823d33999 75 #if DEVICE_SERIAL_FC
<> 149:156823d33999 76 huart->Init.HwFlowCtl = obj_s->hw_flow_ctl;
<> 149:156823d33999 77 #else
<> 149:156823d33999 78 huart->Init.HwFlowCtl = UART_HWCONTROL_NONE;
<> 149:156823d33999 79 #endif
<> 149:156823d33999 80 huart->TxXferCount = 0;
<> 149:156823d33999 81 huart->TxXferSize = 0;
<> 149:156823d33999 82 huart->RxXferCount = 0;
<> 149:156823d33999 83 huart->RxXferSize = 0;
<> 149:156823d33999 84
<> 149:156823d33999 85 if (obj_s->pin_rx == NC) {
<> 149:156823d33999 86 huart->Init.Mode = UART_MODE_TX;
<> 149:156823d33999 87 } else if (obj_s->pin_tx == NC) {
<> 149:156823d33999 88 huart->Init.Mode = UART_MODE_RX;
<> 149:156823d33999 89 } else {
<> 149:156823d33999 90 huart->Init.Mode = UART_MODE_TX_RX;
<> 149:156823d33999 91 }
<> 149:156823d33999 92
<> 149:156823d33999 93 if (HAL_UART_Init(huart) != HAL_OK) {
<> 149:156823d33999 94 error("Cannot initialize UART\n");
<> 149:156823d33999 95 }
<> 149:156823d33999 96 }
<> 149:156823d33999 97
<> 149:156823d33999 98 void serial_init(serial_t *obj, PinName tx, PinName rx)
<> 149:156823d33999 99 {
<> 149:156823d33999 100 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 101
<> 149:156823d33999 102 // Determine the UART to use (UART_1, UART_2, ...)
<> 149:156823d33999 103 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
<> 149:156823d33999 104 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
<> 149:156823d33999 105
<> 149:156823d33999 106 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
<> 149:156823d33999 107 obj_s->uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
<> 149:156823d33999 108 MBED_ASSERT(obj_s->uart != (UARTName)NC);
<> 149:156823d33999 109
<> 149:156823d33999 110 // Enable USART clock
<> 149:156823d33999 111 if (obj_s->uart == UART_1) {
<> 149:156823d33999 112 __HAL_RCC_USART1_FORCE_RESET();
<> 149:156823d33999 113 __HAL_RCC_USART1_RELEASE_RESET();
<> 149:156823d33999 114 __HAL_RCC_USART1_CLK_ENABLE();
<> 149:156823d33999 115 obj_s->index = 0;
<> 149:156823d33999 116 }
<> 149:156823d33999 117
<> 149:156823d33999 118 #if defined USART2_BASE
<> 149:156823d33999 119 if (obj_s->uart == UART_2) {
<> 149:156823d33999 120 __HAL_RCC_USART2_FORCE_RESET();
<> 149:156823d33999 121 __HAL_RCC_USART2_RELEASE_RESET();
<> 149:156823d33999 122 __HAL_RCC_USART2_CLK_ENABLE();
<> 149:156823d33999 123 obj_s->index = 1;
<> 149:156823d33999 124 }
<> 149:156823d33999 125 #endif
<> 149:156823d33999 126
<> 149:156823d33999 127 #if defined USART3_BASE
<> 149:156823d33999 128 if (obj_s->uart == UART_3) {
<> 149:156823d33999 129 __HAL_RCC_USART3_FORCE_RESET();
<> 149:156823d33999 130 __HAL_RCC_USART3_RELEASE_RESET();
<> 149:156823d33999 131 __HAL_RCC_USART3_CLK_ENABLE();
<> 149:156823d33999 132 obj_s->index = 2;
<> 149:156823d33999 133 }
<> 149:156823d33999 134 #endif
<> 149:156823d33999 135
<> 149:156823d33999 136 #if defined USART4_BASE
<> 149:156823d33999 137 if (obj_s->uart == UART_4) {
<> 149:156823d33999 138 __HAL_RCC_USART4_FORCE_RESET();
<> 149:156823d33999 139 __HAL_RCC_USART4_RELEASE_RESET();
<> 149:156823d33999 140 __HAL_RCC_USART4_CLK_ENABLE();
<> 149:156823d33999 141 obj_s->index = 3;
<> 149:156823d33999 142 }
<> 149:156823d33999 143 #endif
<> 149:156823d33999 144
<> 149:156823d33999 145 #if defined USART5_BASE
<> 149:156823d33999 146 if (obj_s->uart == UART_5) {
<> 149:156823d33999 147 __HAL_RCC_USART5_FORCE_RESET();
<> 149:156823d33999 148 __HAL_RCC_USART5_RELEASE_RESET();
<> 149:156823d33999 149 __HAL_RCC_USART5_CLK_ENABLE();
<> 149:156823d33999 150 obj_s->index = 4;
<> 149:156823d33999 151 }
<> 149:156823d33999 152 #endif
<> 149:156823d33999 153
<> 149:156823d33999 154 #if defined USART6_BASE
<> 149:156823d33999 155 if (obj_s->uart == UART_6) {
<> 149:156823d33999 156 __HAL_RCC_USART6_FORCE_RESET();
<> 149:156823d33999 157 __HAL_RCC_USART6_RELEASE_RESET();
<> 149:156823d33999 158 __HAL_RCC_USART6_CLK_ENABLE();
<> 149:156823d33999 159 obj_s->index = 5;
<> 149:156823d33999 160 }
<> 149:156823d33999 161 #endif
<> 149:156823d33999 162
<> 149:156823d33999 163 #if defined USART7_BASE
<> 149:156823d33999 164 if (obj_s->uart == UART_7) {
<> 149:156823d33999 165 __HAL_RCC_USART7_FORCE_RESET();
<> 149:156823d33999 166 __HAL_RCC_USART7_RELEASE_RESET();
<> 149:156823d33999 167 __HAL_RCC_USART7_CLK_ENABLE();
<> 149:156823d33999 168 obj_s->index = 6;
<> 149:156823d33999 169 }
<> 149:156823d33999 170 #endif
<> 149:156823d33999 171
<> 149:156823d33999 172 #if defined USART8_BASE
<> 149:156823d33999 173 if (obj_s->uart == UART_8) {
<> 149:156823d33999 174 __HAL_RCC_USART8_FORCE_RESET();
<> 149:156823d33999 175 __HAL_RCC_USART8_RELEASE_RESET();
<> 149:156823d33999 176 __HAL_RCC_USART8_CLK_ENABLE();
<> 149:156823d33999 177 obj_s->index = 7;
<> 149:156823d33999 178 }
<> 149:156823d33999 179 #endif
<> 149:156823d33999 180
<> 149:156823d33999 181 // Configure the UART pins
<> 149:156823d33999 182 pinmap_pinout(tx, PinMap_UART_TX);
<> 149:156823d33999 183 pinmap_pinout(rx, PinMap_UART_RX);
<> 149:156823d33999 184
<> 149:156823d33999 185 if (tx != NC) {
<> 149:156823d33999 186 pin_mode(tx, PullUp);
<> 149:156823d33999 187 }
<> 149:156823d33999 188 if (rx != NC) {
<> 149:156823d33999 189 pin_mode(rx, PullUp);
<> 149:156823d33999 190 }
<> 149:156823d33999 191
<> 149:156823d33999 192 // Configure UART
<> 149:156823d33999 193 obj_s->baudrate = 9600;
<> 149:156823d33999 194 obj_s->databits = UART_WORDLENGTH_8B;
<> 149:156823d33999 195 obj_s->stopbits = UART_STOPBITS_1;
<> 149:156823d33999 196 obj_s->parity = UART_PARITY_NONE;
<> 149:156823d33999 197
<> 149:156823d33999 198 #if DEVICE_SERIAL_FC
<> 149:156823d33999 199 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
<> 149:156823d33999 200 #endif
<> 149:156823d33999 201
<> 149:156823d33999 202 obj_s->pin_tx = tx;
<> 149:156823d33999 203 obj_s->pin_rx = rx;
<> 149:156823d33999 204
<> 149:156823d33999 205 init_uart(obj);
<> 149:156823d33999 206
<> 149:156823d33999 207 // For stdio management
<> 149:156823d33999 208 if (obj_s->uart == STDIO_UART) {
<> 149:156823d33999 209 stdio_uart_inited = 1;
<> 149:156823d33999 210 memcpy(&stdio_uart, obj, sizeof(serial_t));
<> 149:156823d33999 211 }
<> 149:156823d33999 212 }
<> 149:156823d33999 213
<> 149:156823d33999 214 void serial_free(serial_t *obj)
<> 149:156823d33999 215 {
<> 149:156823d33999 216 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 217
<> 149:156823d33999 218 // Reset UART and disable clock
<> 149:156823d33999 219 if (obj_s->uart == UART_1) {
<> 149:156823d33999 220 __USART1_FORCE_RESET();
<> 149:156823d33999 221 __USART1_RELEASE_RESET();
<> 149:156823d33999 222 __USART1_CLK_DISABLE();
<> 149:156823d33999 223 }
<> 149:156823d33999 224
<> 149:156823d33999 225 #if defined(USART2_BASE)
<> 149:156823d33999 226 if (obj_s->uart == UART_2) {
<> 149:156823d33999 227 __USART2_FORCE_RESET();
<> 149:156823d33999 228 __USART2_RELEASE_RESET();
<> 149:156823d33999 229 __USART2_CLK_DISABLE();
<> 149:156823d33999 230 }
<> 149:156823d33999 231 #endif
<> 149:156823d33999 232
<> 149:156823d33999 233 #if defined USART3_BASE
<> 149:156823d33999 234 if (obj_s->uart == UART_3) {
<> 149:156823d33999 235 __USART3_FORCE_RESET();
<> 149:156823d33999 236 __USART3_RELEASE_RESET();
<> 149:156823d33999 237 __USART3_CLK_DISABLE();
<> 149:156823d33999 238 }
<> 149:156823d33999 239 #endif
<> 149:156823d33999 240
<> 149:156823d33999 241 #if defined USART4_BASE
<> 149:156823d33999 242 if (obj_s->uart == UART_4) {
<> 149:156823d33999 243 __USART4_FORCE_RESET();
<> 149:156823d33999 244 __USART4_RELEASE_RESET();
<> 149:156823d33999 245 __USART4_CLK_DISABLE();
<> 149:156823d33999 246 }
<> 149:156823d33999 247 #endif
<> 149:156823d33999 248
<> 149:156823d33999 249 #if defined USART5_BASE
<> 149:156823d33999 250 if (obj_s->uart == UART_5) {
<> 149:156823d33999 251 __USART5_FORCE_RESET();
<> 149:156823d33999 252 __USART5_RELEASE_RESET();
<> 149:156823d33999 253 __USART5_CLK_DISABLE();
<> 149:156823d33999 254 }
<> 149:156823d33999 255 #endif
<> 149:156823d33999 256
<> 149:156823d33999 257 #if defined USART6_BASE
<> 149:156823d33999 258 if (obj_s->uart == UART_6) {
<> 149:156823d33999 259 __USART6_FORCE_RESET();
<> 149:156823d33999 260 __USART6_RELEASE_RESET();
<> 149:156823d33999 261 __USART6_CLK_DISABLE();
<> 149:156823d33999 262 }
<> 149:156823d33999 263 #endif
<> 149:156823d33999 264
<> 149:156823d33999 265 #if defined USART7_BASE
<> 149:156823d33999 266 if (obj_s->uart == UART_7) {
<> 149:156823d33999 267 __USART7_FORCE_RESET();
<> 149:156823d33999 268 __USART7_RELEASE_RESET();
<> 149:156823d33999 269 __USART7_CLK_DISABLE();
<> 149:156823d33999 270 }
<> 149:156823d33999 271 #endif
<> 149:156823d33999 272
<> 149:156823d33999 273 #if defined USART8_BASE
<> 149:156823d33999 274 if (obj_s->uart == UART_8) {
<> 149:156823d33999 275 __USART8_FORCE_RESET();
<> 149:156823d33999 276 __USART8_RELEASE_RESET();
<> 149:156823d33999 277 __USART8_CLK_DISABLE();
<> 149:156823d33999 278 }
<> 149:156823d33999 279 #endif
<> 149:156823d33999 280
<> 149:156823d33999 281 // Configure GPIOs
<> 149:156823d33999 282 pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 149:156823d33999 283 pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 149:156823d33999 284
<> 149:156823d33999 285 serial_irq_ids[obj_s->index] = 0;
<> 149:156823d33999 286 }
<> 149:156823d33999 287
<> 149:156823d33999 288 void serial_baud(serial_t *obj, int baudrate)
<> 149:156823d33999 289 {
<> 149:156823d33999 290 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 291
<> 149:156823d33999 292 obj_s->baudrate = baudrate;
<> 149:156823d33999 293 init_uart(obj);
<> 149:156823d33999 294 }
<> 149:156823d33999 295
<> 149:156823d33999 296 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
<> 149:156823d33999 297 {
<> 149:156823d33999 298 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 299
<> 149:156823d33999 300 if (data_bits == 9) {
<> 149:156823d33999 301 obj_s->databits = UART_WORDLENGTH_9B;
<> 149:156823d33999 302 } else {
<> 149:156823d33999 303 obj_s->databits = UART_WORDLENGTH_8B;
<> 149:156823d33999 304 }
<> 149:156823d33999 305
<> 149:156823d33999 306 switch (parity) {
<> 149:156823d33999 307 case ParityOdd:
<> 149:156823d33999 308 obj_s->parity = UART_PARITY_ODD;
<> 149:156823d33999 309 break;
<> 149:156823d33999 310 case ParityEven:
<> 149:156823d33999 311 obj_s->parity = UART_PARITY_EVEN;
<> 149:156823d33999 312 break;
<> 149:156823d33999 313 default: // ParityNone
<> 149:156823d33999 314 case ParityForced0: // unsupported!
<> 149:156823d33999 315 case ParityForced1: // unsupported!
<> 149:156823d33999 316 obj_s->parity = UART_PARITY_NONE;
<> 149:156823d33999 317 break;
<> 149:156823d33999 318 }
<> 149:156823d33999 319
<> 149:156823d33999 320 if (stop_bits == 2) {
<> 149:156823d33999 321 obj_s->stopbits = UART_STOPBITS_2;
<> 149:156823d33999 322 } else {
<> 149:156823d33999 323 obj_s->stopbits = UART_STOPBITS_1;
<> 149:156823d33999 324 }
<> 149:156823d33999 325
<> 149:156823d33999 326 init_uart(obj);
<> 149:156823d33999 327 }
<> 149:156823d33999 328
<> 149:156823d33999 329 /******************************************************************************
<> 149:156823d33999 330 * INTERRUPTS HANDLING
<> 149:156823d33999 331 ******************************************************************************/
<> 149:156823d33999 332
<> 149:156823d33999 333 static void uart_irq(int id)
<> 149:156823d33999 334 {
<> 149:156823d33999 335 UART_HandleTypeDef * huart = &uart_handlers[id];
<> 149:156823d33999 336
<> 149:156823d33999 337 if (serial_irq_ids[id] != 0) {
<> 149:156823d33999 338 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
<> 149:156823d33999 339 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
<> 149:156823d33999 340 irq_handler(serial_irq_ids[id], TxIrq);
<> 149:156823d33999 341 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
<> 149:156823d33999 342 }
<> 149:156823d33999 343 }
<> 149:156823d33999 344 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) {
<> 149:156823d33999 345 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET) {
<> 149:156823d33999 346 irq_handler(serial_irq_ids[id], RxIrq);
<> 149:156823d33999 347 volatile uint32_t tmpval = huart->Instance->RDR; // Clear RXNE flag
<> 149:156823d33999 348 }
<> 149:156823d33999 349 }
<> 149:156823d33999 350 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
<> 149:156823d33999 351 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ORE) != RESET) {
<> 149:156823d33999 352 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
<> 149:156823d33999 353 }
<> 149:156823d33999 354 }
<> 149:156823d33999 355 }
<> 149:156823d33999 356 }
<> 149:156823d33999 357
<> 149:156823d33999 358 static void uart1_irq(void)
<> 149:156823d33999 359 {
<> 149:156823d33999 360 uart_irq(0);
<> 149:156823d33999 361 }
<> 149:156823d33999 362
<> 149:156823d33999 363 #if defined(USART2_BASE)
<> 149:156823d33999 364 static void uart2_irq(void)
<> 149:156823d33999 365 {
<> 149:156823d33999 366 uart_irq(1);
<> 149:156823d33999 367 }
<> 149:156823d33999 368 #endif
<> 149:156823d33999 369
<> 149:156823d33999 370 #if defined USART3_BASE
<> 149:156823d33999 371 static void uart3_irq(void)
<> 149:156823d33999 372 {
<> 149:156823d33999 373 uart_irq(2);
<> 149:156823d33999 374 }
<> 149:156823d33999 375 #endif
<> 149:156823d33999 376
<> 149:156823d33999 377 #if defined USART4_BASE
<> 149:156823d33999 378 static void uart4_irq(void)
<> 149:156823d33999 379 {
<> 149:156823d33999 380 uart_irq(3);
<> 149:156823d33999 381 }
<> 149:156823d33999 382 #endif
<> 149:156823d33999 383
<> 149:156823d33999 384 #if defined USART5_BASE
<> 149:156823d33999 385 static void uart5_irq(void)
<> 149:156823d33999 386 {
<> 149:156823d33999 387 uart_irq(4);
<> 149:156823d33999 388 }
<> 149:156823d33999 389 #endif
<> 149:156823d33999 390
<> 149:156823d33999 391 #if defined USART6_BASE
<> 149:156823d33999 392 static void uart6_irq(void)
<> 149:156823d33999 393 {
<> 149:156823d33999 394 uart_irq(5);
<> 149:156823d33999 395 }
<> 149:156823d33999 396 #endif
<> 149:156823d33999 397
<> 149:156823d33999 398 #if defined USART7_BASE
<> 149:156823d33999 399 static void uart7_irq(void)
<> 149:156823d33999 400 {
<> 149:156823d33999 401 uart_irq(6);
<> 149:156823d33999 402 }
<> 149:156823d33999 403 #endif
<> 149:156823d33999 404
<> 149:156823d33999 405 #if defined USART8_BASE
<> 149:156823d33999 406 static void uart8_irq(void)
<> 149:156823d33999 407 {
<> 149:156823d33999 408 uart_irq(7);
<> 149:156823d33999 409 }
<> 149:156823d33999 410 #endif
<> 149:156823d33999 411
<> 149:156823d33999 412 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
<> 149:156823d33999 413 {
<> 149:156823d33999 414 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 415
<> 149:156823d33999 416 irq_handler = handler;
<> 149:156823d33999 417 serial_irq_ids[obj_s->index] = id;
<> 149:156823d33999 418 }
<> 149:156823d33999 419
<> 149:156823d33999 420 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
<> 149:156823d33999 421 {
<> 149:156823d33999 422 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 423 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 424 IRQn_Type irq_n = (IRQn_Type)0;
<> 149:156823d33999 425 uint32_t vector = 0;
<> 149:156823d33999 426
<> 149:156823d33999 427 if (obj_s->uart == UART_1) {
<> 149:156823d33999 428 irq_n = USART1_IRQn;
<> 149:156823d33999 429 vector = (uint32_t)&uart1_irq;
<> 149:156823d33999 430 }
<> 149:156823d33999 431
<> 149:156823d33999 432 #if defined(USART2_BASE)
<> 149:156823d33999 433 if (obj_s->uart == UART_2) {
<> 149:156823d33999 434 irq_n = USART2_IRQn;
<> 149:156823d33999 435 vector = (uint32_t)&uart2_irq;
<> 149:156823d33999 436 }
<> 149:156823d33999 437 #endif
<> 149:156823d33999 438
<> 149:156823d33999 439 #if defined (TARGET_STM32F091RC)
<> 149:156823d33999 440 if (obj_s->uart == UART_3) {
<> 149:156823d33999 441 irq_n = USART3_8_IRQn;
<> 149:156823d33999 442 vector = (uint32_t)&uart3_irq;
<> 149:156823d33999 443 }
<> 149:156823d33999 444
<> 149:156823d33999 445 if (obj_s->uart == UART_4) {
<> 149:156823d33999 446 irq_n = USART3_8_IRQn;
<> 149:156823d33999 447 vector = (uint32_t)&uart4_irq;
<> 149:156823d33999 448 }
<> 149:156823d33999 449
<> 149:156823d33999 450 if (obj_s->uart == UART_5) {
<> 149:156823d33999 451 irq_n = USART3_8_IRQn;
<> 149:156823d33999 452 vector = (uint32_t)&uart5_irq;
<> 149:156823d33999 453 }
<> 149:156823d33999 454
<> 149:156823d33999 455 if (obj_s->uart == UART_6) {
<> 149:156823d33999 456 irq_n = USART3_8_IRQn;
<> 149:156823d33999 457 vector = (uint32_t)&uart6_irq;
<> 149:156823d33999 458 }
<> 149:156823d33999 459
<> 149:156823d33999 460 if (obj_s->uart == UART_7) {
<> 149:156823d33999 461 irq_n = USART3_8_IRQn;
<> 149:156823d33999 462 vector = (uint32_t)&uart7_irq;
<> 149:156823d33999 463 }
<> 149:156823d33999 464
<> 149:156823d33999 465 if (obj_s->uart == UART_8) {
<> 149:156823d33999 466 irq_n = USART3_8_IRQn;
<> 149:156823d33999 467 vector = (uint32_t)&uart8_irq;
<> 149:156823d33999 468 }
<> 149:156823d33999 469
<> 149:156823d33999 470 #elif defined (TARGET_STM32F030R8) || defined (TARGET_STM32F051R8)
<> 149:156823d33999 471
<> 149:156823d33999 472 #else
<> 149:156823d33999 473 #if defined(USART3_BASE)
<> 149:156823d33999 474 if (obj_s->uart == UART_3) {
<> 149:156823d33999 475 irq_n = USART3_4_IRQn;
<> 149:156823d33999 476 vector = (uint32_t)&uart3_irq;
<> 149:156823d33999 477 }
<> 149:156823d33999 478 #endif
<> 149:156823d33999 479
<> 149:156823d33999 480 #if defined(USART4_BASE)
<> 149:156823d33999 481 if (obj_s->uart == UART_4) {
<> 149:156823d33999 482 irq_n = USART3_4_IRQn;
<> 149:156823d33999 483 vector = (uint32_t)&uart4_irq;
<> 149:156823d33999 484 }
<> 149:156823d33999 485 #endif
<> 149:156823d33999 486 #endif
<> 149:156823d33999 487
<> 149:156823d33999 488 if (enable) {
<> 149:156823d33999 489 if (irq == RxIrq) {
<> 149:156823d33999 490 __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
<> 149:156823d33999 491 } else { // TxIrq
<> 149:156823d33999 492 __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
<> 149:156823d33999 493 }
<> 149:156823d33999 494 NVIC_SetVector(irq_n, vector);
<> 149:156823d33999 495 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 496
<> 149:156823d33999 497 } else { // disable
<> 149:156823d33999 498 int all_disabled = 0;
<> 149:156823d33999 499 if (irq == RxIrq) {
<> 149:156823d33999 500 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 149:156823d33999 501 // Check if TxIrq is disabled too
<> 149:156823d33999 502 if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) {
<> 149:156823d33999 503 all_disabled = 1;
<> 149:156823d33999 504 }
<> 149:156823d33999 505 } else { // TxIrq
<> 149:156823d33999 506 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
<> 149:156823d33999 507 // Check if RxIrq is disabled too
<> 149:156823d33999 508 if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) {
<> 149:156823d33999 509 all_disabled = 1;
<> 149:156823d33999 510 }
<> 149:156823d33999 511 }
<> 149:156823d33999 512
<> 149:156823d33999 513 if (all_disabled) {
<> 149:156823d33999 514 NVIC_DisableIRQ(irq_n);
<> 149:156823d33999 515 }
<> 149:156823d33999 516 }
<> 149:156823d33999 517 }
<> 149:156823d33999 518
<> 149:156823d33999 519 /******************************************************************************
<> 149:156823d33999 520 * READ/WRITE
<> 149:156823d33999 521 ******************************************************************************/
<> 149:156823d33999 522
<> 149:156823d33999 523 int serial_getc(serial_t *obj)
<> 149:156823d33999 524 {
<> 149:156823d33999 525 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 526 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 527
<> 149:156823d33999 528 while (!serial_readable(obj));
<> 149:156823d33999 529 return (int)(huart->Instance->RDR & (uint16_t)0xFF);
<> 149:156823d33999 530 }
<> 149:156823d33999 531
<> 149:156823d33999 532 void serial_putc(serial_t *obj, int c)
<> 149:156823d33999 533 {
<> 149:156823d33999 534 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 535 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 536
<> 149:156823d33999 537 while (!serial_writable(obj));
<> 149:156823d33999 538 huart->Instance->TDR = (uint32_t)(c & (uint16_t)0xFF);
<> 149:156823d33999 539 }
<> 149:156823d33999 540
<> 149:156823d33999 541 int serial_readable(serial_t *obj)
<> 149:156823d33999 542 {
<> 149:156823d33999 543 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 544 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 545
<> 149:156823d33999 546 // Check if data is received
<> 149:156823d33999 547 return (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) ? 1 : 0;
<> 149:156823d33999 548 }
<> 149:156823d33999 549
<> 149:156823d33999 550 int serial_writable(serial_t *obj)
<> 149:156823d33999 551 {
<> 149:156823d33999 552 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 553 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 554
<> 149:156823d33999 555 // Check if data is transmitted
<> 149:156823d33999 556 return (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) ? 1 : 0;
<> 149:156823d33999 557 }
<> 149:156823d33999 558
<> 149:156823d33999 559 void serial_clear(serial_t *obj)
<> 149:156823d33999 560 {
<> 149:156823d33999 561 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 562 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 563
<> 149:156823d33999 564 huart->TxXferCount = 0;
<> 149:156823d33999 565 huart->RxXferCount = 0;
<> 149:156823d33999 566 }
<> 149:156823d33999 567
<> 149:156823d33999 568 void serial_pinout_tx(PinName tx)
<> 149:156823d33999 569 {
<> 149:156823d33999 570 pinmap_pinout(tx, PinMap_UART_TX);
<> 149:156823d33999 571 }
<> 149:156823d33999 572
<> 149:156823d33999 573 void serial_break_set(serial_t *obj)
<> 149:156823d33999 574 {
<> 149:156823d33999 575 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 576 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 577
<> 149:156823d33999 578 //HAL_LIN_SendBreak(huart);
<> 149:156823d33999 579 }
<> 149:156823d33999 580
<> 149:156823d33999 581 void serial_break_clear(serial_t *obj)
<> 149:156823d33999 582 {
<> 149:156823d33999 583 (void)obj;
<> 149:156823d33999 584 }
<> 149:156823d33999 585
<> 149:156823d33999 586 #if DEVICE_SERIAL_ASYNCH
<> 149:156823d33999 587
<> 149:156823d33999 588 /******************************************************************************
<> 149:156823d33999 589 * LOCAL HELPER FUNCTIONS
<> 149:156823d33999 590 ******************************************************************************/
<> 149:156823d33999 591
<> 149:156823d33999 592 /**
<> 149:156823d33999 593 * Configure the TX buffer for an asynchronous write serial transaction
<> 149:156823d33999 594 *
<> 149:156823d33999 595 * @param obj The serial object.
<> 149:156823d33999 596 * @param tx The buffer for sending.
<> 149:156823d33999 597 * @param tx_length The number of words to transmit.
<> 149:156823d33999 598 */
<> 149:156823d33999 599 static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width)
<> 149:156823d33999 600 {
<> 149:156823d33999 601 (void)width;
<> 149:156823d33999 602
<> 149:156823d33999 603 // Exit if a transmit is already on-going
<> 149:156823d33999 604 if (serial_tx_active(obj)) {
<> 149:156823d33999 605 return;
<> 149:156823d33999 606 }
<> 149:156823d33999 607
<> 149:156823d33999 608 obj->tx_buff.buffer = tx;
<> 149:156823d33999 609 obj->tx_buff.length = tx_length;
<> 149:156823d33999 610 obj->tx_buff.pos = 0;
<> 149:156823d33999 611 }
<> 149:156823d33999 612
<> 149:156823d33999 613 /**
<> 149:156823d33999 614 * Configure the RX buffer for an asynchronous write serial transaction
<> 149:156823d33999 615 *
<> 149:156823d33999 616 * @param obj The serial object.
<> 149:156823d33999 617 * @param tx The buffer for sending.
<> 149:156823d33999 618 * @param tx_length The number of words to transmit.
<> 149:156823d33999 619 */
<> 149:156823d33999 620 static void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width)
<> 149:156823d33999 621 {
<> 149:156823d33999 622 (void)width;
<> 149:156823d33999 623
<> 149:156823d33999 624 // Exit if a reception is already on-going
<> 149:156823d33999 625 if (serial_rx_active(obj)) {
<> 149:156823d33999 626 return;
<> 149:156823d33999 627 }
<> 149:156823d33999 628
<> 149:156823d33999 629 obj->rx_buff.buffer = rx;
<> 149:156823d33999 630 obj->rx_buff.length = rx_length;
<> 149:156823d33999 631 obj->rx_buff.pos = 0;
<> 149:156823d33999 632 }
<> 149:156823d33999 633
<> 149:156823d33999 634 /**
<> 149:156823d33999 635 * Configure events
<> 149:156823d33999 636 *
<> 149:156823d33999 637 * @param obj The serial object
<> 149:156823d33999 638 * @param event The logical OR of the events to configure
<> 149:156823d33999 639 * @param enable Set to non-zero to enable events, or zero to disable them
<> 149:156823d33999 640 */
<> 149:156823d33999 641 static void serial_enable_event(serial_t *obj, int event, uint8_t enable)
<> 149:156823d33999 642 {
<> 149:156823d33999 643 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 644
<> 149:156823d33999 645 // Shouldn't have to enable interrupt here, just need to keep track of the requested events.
<> 149:156823d33999 646 if (enable) {
<> 149:156823d33999 647 obj_s->events |= event;
<> 149:156823d33999 648 } else {
<> 149:156823d33999 649 obj_s->events &= ~event;
<> 149:156823d33999 650 }
<> 149:156823d33999 651 }
<> 149:156823d33999 652
<> 149:156823d33999 653
<> 149:156823d33999 654 /**
<> 149:156823d33999 655 * Get index of serial object TX IRQ, relating it to the physical peripheral.
<> 149:156823d33999 656 *
<> 149:156823d33999 657 * @param obj pointer to serial object
<> 149:156823d33999 658 * @return internal NVIC TX IRQ index of U(S)ART peripheral
<> 149:156823d33999 659 */
<> 149:156823d33999 660 static IRQn_Type serial_get_irq_n(serial_t *obj)
<> 149:156823d33999 661 {
<> 149:156823d33999 662 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 663 IRQn_Type irq_n;
<> 149:156823d33999 664
<> 149:156823d33999 665 switch (obj_s->index) {
<> 149:156823d33999 666 #if defined(USART1_BASE)
<> 149:156823d33999 667 case 0:
<> 149:156823d33999 668 irq_n = USART1_IRQn;
<> 149:156823d33999 669 break;
<> 149:156823d33999 670 #endif
<> 149:156823d33999 671 #if defined(USART2_BASE)
<> 149:156823d33999 672 case 1:
<> 149:156823d33999 673 irq_n = USART2_IRQn;
<> 149:156823d33999 674 break;
<> 149:156823d33999 675 #endif
<> 149:156823d33999 676 #if defined (TARGET_STM32F091RC)
<> 149:156823d33999 677 case 2:
<> 149:156823d33999 678 case 3:
<> 149:156823d33999 679 case 4:
<> 149:156823d33999 680 case 5:
<> 149:156823d33999 681 case 6:
<> 149:156823d33999 682 case 7:
<> 149:156823d33999 683 irq_n = USART3_8_IRQn;
<> 149:156823d33999 684 break;
<> 149:156823d33999 685 #elif !defined (TARGET_STM32F030R8) && !defined (TARGET_STM32F051R8)
<> 149:156823d33999 686 case 2:
<> 149:156823d33999 687 case 3:
<> 149:156823d33999 688 irq_n = USART3_4_IRQn;
<> 149:156823d33999 689 break;
<> 149:156823d33999 690 #endif
<> 149:156823d33999 691 default:
<> 149:156823d33999 692 irq_n = (IRQn_Type)0;
<> 149:156823d33999 693 }
<> 149:156823d33999 694
<> 149:156823d33999 695 return irq_n;
<> 149:156823d33999 696 }
<> 149:156823d33999 697
<> 149:156823d33999 698
<> 149:156823d33999 699 /******************************************************************************
<> 149:156823d33999 700 * MBED API FUNCTIONS
<> 149:156823d33999 701 ******************************************************************************/
<> 149:156823d33999 702
<> 149:156823d33999 703 /**
<> 149:156823d33999 704 * Begin asynchronous TX transfer. The used buffer is specified in the serial
<> 149:156823d33999 705 * object, tx_buff
<> 149:156823d33999 706 *
<> 149:156823d33999 707 * @param obj The serial object
<> 149:156823d33999 708 * @param tx The buffer for sending
<> 149:156823d33999 709 * @param tx_length The number of words to transmit
<> 149:156823d33999 710 * @param tx_width The bit width of buffer word
<> 149:156823d33999 711 * @param handler The serial handler
<> 149:156823d33999 712 * @param event The logical OR of events to be registered
<> 149:156823d33999 713 * @param hint A suggestion for how to use DMA with this transfer
<> 149:156823d33999 714 * @return Returns number of data transfered, or 0 otherwise
<> 149:156823d33999 715 */
<> 149:156823d33999 716 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
<> 149:156823d33999 717 {
<> 149:156823d33999 718 // TODO: DMA usage is currently ignored
<> 149:156823d33999 719 (void) hint;
<> 149:156823d33999 720
<> 149:156823d33999 721 // Check buffer is ok
<> 149:156823d33999 722 MBED_ASSERT(tx != (void*)0);
<> 149:156823d33999 723 MBED_ASSERT(tx_width == 8); // support only 8b width
<> 149:156823d33999 724
<> 149:156823d33999 725 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 726 UART_HandleTypeDef * huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 727
<> 149:156823d33999 728 if (tx_length == 0) {
<> 149:156823d33999 729 return 0;
<> 149:156823d33999 730 }
<> 149:156823d33999 731
<> 149:156823d33999 732 // Set up buffer
<> 149:156823d33999 733 serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width);
<> 149:156823d33999 734
<> 149:156823d33999 735 // Set up events
<> 149:156823d33999 736 serial_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events
<> 149:156823d33999 737 serial_enable_event(obj, event, 1); // Set only the wanted events
<> 149:156823d33999 738
<> 149:156823d33999 739 // Enable interrupt
<> 149:156823d33999 740 IRQn_Type irq_n = serial_get_irq_n(obj);
<> 149:156823d33999 741 NVIC_ClearPendingIRQ(irq_n);
<> 149:156823d33999 742 NVIC_DisableIRQ(irq_n);
<> 149:156823d33999 743 NVIC_SetPriority(irq_n, 1);
<> 149:156823d33999 744 NVIC_SetVector(irq_n, (uint32_t)handler);
<> 149:156823d33999 745 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 746
<> 149:156823d33999 747 // the following function will enable UART_IT_TXE and error interrupts
<> 149:156823d33999 748 if (HAL_UART_Transmit_IT(huart, (uint8_t*)tx, tx_length) != HAL_OK) {
<> 149:156823d33999 749 return 0;
<> 149:156823d33999 750 }
<> 149:156823d33999 751
<> 149:156823d33999 752 return tx_length;
<> 149:156823d33999 753 }
<> 149:156823d33999 754
<> 149:156823d33999 755 /**
<> 149:156823d33999 756 * Begin asynchronous RX transfer (enable interrupt for data collecting)
<> 149:156823d33999 757 * The used buffer is specified in the serial object, rx_buff
<> 149:156823d33999 758 *
<> 149:156823d33999 759 * @param obj The serial object
<> 149:156823d33999 760 * @param rx The buffer for sending
<> 149:156823d33999 761 * @param rx_length The number of words to transmit
<> 149:156823d33999 762 * @param rx_width The bit width of buffer word
<> 149:156823d33999 763 * @param handler The serial handler
<> 149:156823d33999 764 * @param event The logical OR of events to be registered
<> 149:156823d33999 765 * @param handler The serial handler
<> 149:156823d33999 766 * @param char_match A character in range 0-254 to be matched
<> 149:156823d33999 767 * @param hint A suggestion for how to use DMA with this transfer
<> 149:156823d33999 768 */
<> 149:156823d33999 769 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
<> 149:156823d33999 770 {
<> 149:156823d33999 771 // TODO: DMA usage is currently ignored
<> 149:156823d33999 772 (void) hint;
<> 149:156823d33999 773
<> 149:156823d33999 774 /* Sanity check arguments */
<> 149:156823d33999 775 MBED_ASSERT(obj);
<> 149:156823d33999 776 MBED_ASSERT(rx != (void*)0);
<> 149:156823d33999 777 MBED_ASSERT(rx_width == 8); // support only 8b width
<> 149:156823d33999 778
<> 149:156823d33999 779 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 780 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 781
<> 149:156823d33999 782 serial_enable_event(obj, SERIAL_EVENT_RX_ALL, 0);
<> 149:156823d33999 783 serial_enable_event(obj, event, 1);
<> 149:156823d33999 784
<> 149:156823d33999 785 // set CharMatch
<> 149:156823d33999 786 obj->char_match = char_match;
<> 149:156823d33999 787
<> 149:156823d33999 788 serial_rx_buffer_set(obj, rx, rx_length, rx_width);
<> 149:156823d33999 789
<> 149:156823d33999 790 IRQn_Type irq_n = serial_get_irq_n(obj);
<> 149:156823d33999 791 NVIC_ClearPendingIRQ(irq_n);
<> 149:156823d33999 792 NVIC_DisableIRQ(irq_n);
<> 149:156823d33999 793 NVIC_SetPriority(irq_n, 0);
<> 149:156823d33999 794 NVIC_SetVector(irq_n, (uint32_t)handler);
<> 149:156823d33999 795 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 796
<> 149:156823d33999 797 // following HAL function will enable the RXNE interrupt + error interrupts
<> 149:156823d33999 798 HAL_UART_Receive_IT(huart, (uint8_t*)rx, rx_length);
<> 149:156823d33999 799 }
<> 149:156823d33999 800
<> 149:156823d33999 801 /**
<> 149:156823d33999 802 * Attempts to determine if the serial peripheral is already in use for TX
<> 149:156823d33999 803 *
<> 149:156823d33999 804 * @param obj The serial object
<> 149:156823d33999 805 * @return Non-zero if the TX transaction is ongoing, 0 otherwise
<> 149:156823d33999 806 */
<> 149:156823d33999 807 uint8_t serial_tx_active(serial_t *obj)
<> 149:156823d33999 808 {
<> 149:156823d33999 809 MBED_ASSERT(obj);
<> 149:156823d33999 810
<> 149:156823d33999 811 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 812 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 813
<> 149:156823d33999 814 return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_TX) ? 1 : 0);
<> 149:156823d33999 815 }
<> 149:156823d33999 816
<> 149:156823d33999 817 /**
<> 149:156823d33999 818 * Attempts to determine if the serial peripheral is already in use for RX
<> 149:156823d33999 819 *
<> 149:156823d33999 820 * @param obj The serial object
<> 149:156823d33999 821 * @return Non-zero if the RX transaction is ongoing, 0 otherwise
<> 149:156823d33999 822 */
<> 149:156823d33999 823 uint8_t serial_rx_active(serial_t *obj)
<> 149:156823d33999 824 {
<> 149:156823d33999 825 MBED_ASSERT(obj);
<> 149:156823d33999 826
<> 149:156823d33999 827 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 828 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 829
<> 149:156823d33999 830 return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_RX) ? 1 : 0);
<> 149:156823d33999 831 }
<> 149:156823d33999 832
<> 149:156823d33999 833 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
<> 149:156823d33999 834 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
<> 149:156823d33999 835 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
<> 149:156823d33999 836 }
<> 149:156823d33999 837 }
<> 149:156823d33999 838
<> 149:156823d33999 839 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) {
<> 149:156823d33999 840 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
<> 149:156823d33999 841 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
<> 149:156823d33999 842 }
<> 149:156823d33999 843 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
<> 149:156823d33999 844 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
<> 149:156823d33999 845 }
<> 149:156823d33999 846 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE) != RESET) {
<> 149:156823d33999 847 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
<> 149:156823d33999 848 }
<> 149:156823d33999 849 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
<> 149:156823d33999 850 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
<> 149:156823d33999 851 }
<> 149:156823d33999 852 }
<> 149:156823d33999 853
<> 149:156823d33999 854 /**
<> 149:156823d33999 855 * The asynchronous TX and RX handler.
<> 149:156823d33999 856 *
<> 149:156823d33999 857 * @param obj The serial object
<> 149:156823d33999 858 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
<> 149:156823d33999 859 */
<> 149:156823d33999 860 int serial_irq_handler_asynch(serial_t *obj)
<> 149:156823d33999 861 {
<> 149:156823d33999 862 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 863 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 864
<> 149:156823d33999 865 volatile int return_event = 0;
<> 149:156823d33999 866 uint8_t *buf = (uint8_t*)(obj->rx_buff.buffer);
<> 149:156823d33999 867 uint8_t i = 0;
<> 149:156823d33999 868
<> 149:156823d33999 869 // TX PART:
<> 149:156823d33999 870 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
<> 149:156823d33999 871 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
<> 149:156823d33999 872 // Return event SERIAL_EVENT_TX_COMPLETE if requested
<> 149:156823d33999 873 if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE ) != 0) {
<> 149:156823d33999 874 return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events);
<> 149:156823d33999 875 }
<> 149:156823d33999 876 }
<> 149:156823d33999 877 }
<> 149:156823d33999 878
<> 149:156823d33999 879 // Handle error events
<> 149:156823d33999 880 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
<> 149:156823d33999 881 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 882 return_event |= (SERIAL_EVENT_RX_PARITY_ERROR & obj_s->events);
<> 149:156823d33999 883 }
<> 149:156823d33999 884 }
<> 149:156823d33999 885
<> 149:156823d33999 886 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
<> 149:156823d33999 887 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 888 return_event |= (SERIAL_EVENT_RX_FRAMING_ERROR & obj_s->events);
<> 149:156823d33999 889 }
<> 149:156823d33999 890 }
<> 149:156823d33999 891
<> 149:156823d33999 892 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
<> 149:156823d33999 893 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
<> 149:156823d33999 894 return_event |= (SERIAL_EVENT_RX_OVERRUN_ERROR & obj_s->events);
<> 149:156823d33999 895 }
<> 149:156823d33999 896 }
<> 149:156823d33999 897
<> 149:156823d33999 898 HAL_UART_IRQHandler(huart);
<> 149:156823d33999 899
<> 149:156823d33999 900 // Abort if an error occurs
<> 149:156823d33999 901 if (return_event & SERIAL_EVENT_RX_PARITY_ERROR ||
<> 149:156823d33999 902 return_event & SERIAL_EVENT_RX_FRAMING_ERROR ||
<> 149:156823d33999 903 return_event & SERIAL_EVENT_RX_OVERRUN_ERROR) {
<> 149:156823d33999 904 return return_event;
<> 149:156823d33999 905 }
<> 149:156823d33999 906
<> 149:156823d33999 907 //RX PART
<> 149:156823d33999 908 if (huart->RxXferSize != 0) {
<> 149:156823d33999 909 obj->rx_buff.pos = huart->RxXferSize - huart->RxXferCount;
<> 149:156823d33999 910 }
<> 149:156823d33999 911 if ((huart->RxXferCount == 0) && (obj->rx_buff.pos >= (obj->rx_buff.length - 1))) {
<> 149:156823d33999 912 return_event |= (SERIAL_EVENT_RX_COMPLETE & obj_s->events);
<> 149:156823d33999 913 }
<> 149:156823d33999 914
<> 149:156823d33999 915 // Check if char_match is present
<> 149:156823d33999 916 if (obj_s->events & SERIAL_EVENT_RX_CHARACTER_MATCH) {
<> 149:156823d33999 917 if (buf != NULL) {
<> 149:156823d33999 918 for (i = 0; i < obj->rx_buff.pos; i++) {
<> 149:156823d33999 919 if (buf[i] == obj->char_match) {
<> 149:156823d33999 920 obj->rx_buff.pos = i;
<> 149:156823d33999 921 return_event |= (SERIAL_EVENT_RX_CHARACTER_MATCH & obj_s->events);
<> 149:156823d33999 922 serial_rx_abort_asynch(obj);
<> 149:156823d33999 923 break;
<> 149:156823d33999 924 }
<> 149:156823d33999 925 }
<> 149:156823d33999 926 }
<> 149:156823d33999 927 }
<> 149:156823d33999 928
<> 149:156823d33999 929 return return_event;
<> 149:156823d33999 930 }
<> 149:156823d33999 931
<> 149:156823d33999 932 /**
<> 149:156823d33999 933 * Abort the ongoing TX transaction. It disables the enabled interupt for TX and
<> 149:156823d33999 934 * flush TX hardware buffer if TX FIFO is used
<> 149:156823d33999 935 *
<> 149:156823d33999 936 * @param obj The serial object
<> 149:156823d33999 937 */
<> 149:156823d33999 938 void serial_tx_abort_asynch(serial_t *obj)
<> 149:156823d33999 939 {
<> 149:156823d33999 940 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 941 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 942
<> 149:156823d33999 943 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
<> 149:156823d33999 944 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
<> 149:156823d33999 945
<> 149:156823d33999 946 // clear flags
<> 149:156823d33999 947 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
<> 149:156823d33999 948
<> 149:156823d33999 949 // reset states
<> 149:156823d33999 950 huart->TxXferCount = 0;
<> 149:156823d33999 951 // update handle state
<> 149:156823d33999 952 if(huart->gState == HAL_UART_STATE_BUSY_TX_RX) {
<> 149:156823d33999 953 huart->gState = HAL_UART_STATE_BUSY_RX;
<> 149:156823d33999 954 } else {
<> 149:156823d33999 955 huart->gState = HAL_UART_STATE_READY;
<> 149:156823d33999 956 }
<> 149:156823d33999 957 }
<> 149:156823d33999 958
<> 149:156823d33999 959 /**
<> 149:156823d33999 960 * Abort the ongoing RX transaction It disables the enabled interrupt for RX and
<> 149:156823d33999 961 * flush RX hardware buffer if RX FIFO is used
<> 149:156823d33999 962 *
<> 149:156823d33999 963 * @param obj The serial object
<> 149:156823d33999 964 */
<> 149:156823d33999 965 void serial_rx_abort_asynch(serial_t *obj)
<> 149:156823d33999 966 {
<> 149:156823d33999 967 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 968 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
<> 149:156823d33999 969
<> 149:156823d33999 970 // disable interrupts
<> 149:156823d33999 971 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 149:156823d33999 972 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
<> 149:156823d33999 973 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
<> 149:156823d33999 974
<> 149:156823d33999 975 // clear flags
<> 149:156823d33999 976 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF | UART_CLEAR_FEF | UART_CLEAR_OREF);
<> 149:156823d33999 977 volatile uint32_t tmpval = huart->Instance->RDR; // Clear RXNE flag
<> 149:156823d33999 978
<> 149:156823d33999 979 // reset states
<> 149:156823d33999 980 huart->RxXferCount = 0;
<> 149:156823d33999 981 // update handle state
<> 149:156823d33999 982 if(huart->RxState == HAL_UART_STATE_BUSY_TX_RX) {
<> 149:156823d33999 983 huart->RxState = HAL_UART_STATE_BUSY_TX;
<> 149:156823d33999 984 } else {
<> 149:156823d33999 985 huart->RxState = HAL_UART_STATE_READY;
<> 149:156823d33999 986 }
<> 149:156823d33999 987 }
<> 149:156823d33999 988
<> 149:156823d33999 989 #endif
<> 149:156823d33999 990
<> 149:156823d33999 991 #if DEVICE_SERIAL_FC
<> 149:156823d33999 992
<> 149:156823d33999 993 /**
<> 149:156823d33999 994 * Set HW Control Flow
<> 149:156823d33999 995 * @param obj The serial object
<> 149:156823d33999 996 * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS)
<> 149:156823d33999 997 * @param rxflow Pin for the rxflow
<> 149:156823d33999 998 * @param txflow Pin for the txflow
<> 149:156823d33999 999 */
<> 149:156823d33999 1000 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
<> 149:156823d33999 1001 {
<> 149:156823d33999 1002 struct serial_s *obj_s = SERIAL_S(obj);
<> 149:156823d33999 1003
<> 149:156823d33999 1004 // Determine the UART to use (UART_1, UART_2, ...)
<> 149:156823d33999 1005 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
<> 149:156823d33999 1006 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
<> 149:156823d33999 1007
<> 149:156823d33999 1008 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
<> 149:156823d33999 1009 obj_s->uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
<> 149:156823d33999 1010 MBED_ASSERT(obj_s->uart != (UARTName)NC);
<> 149:156823d33999 1011
<> 149:156823d33999 1012 if(type == FlowControlNone) {
<> 149:156823d33999 1013 // Disable hardware flow control
<> 149:156823d33999 1014 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
<> 149:156823d33999 1015 }
<> 149:156823d33999 1016 if (type == FlowControlRTS) {
<> 149:156823d33999 1017 // Enable RTS
<> 149:156823d33999 1018 MBED_ASSERT(uart_rts != (UARTName)NC);
<> 149:156823d33999 1019 obj_s->hw_flow_ctl = UART_HWCONTROL_RTS;
<> 149:156823d33999 1020 obj_s->pin_rts = rxflow;
<> 149:156823d33999 1021 // Enable the pin for RTS function
<> 149:156823d33999 1022 pinmap_pinout(rxflow, PinMap_UART_RTS);
<> 149:156823d33999 1023 }
<> 149:156823d33999 1024 if (type == FlowControlCTS) {
<> 149:156823d33999 1025 // Enable CTS
<> 149:156823d33999 1026 MBED_ASSERT(uart_cts != (UARTName)NC);
<> 149:156823d33999 1027 obj_s->hw_flow_ctl = UART_HWCONTROL_CTS;
<> 149:156823d33999 1028 obj_s->pin_cts = txflow;
<> 149:156823d33999 1029 // Enable the pin for CTS function
<> 149:156823d33999 1030 pinmap_pinout(txflow, PinMap_UART_CTS);
<> 149:156823d33999 1031 }
<> 149:156823d33999 1032 if (type == FlowControlRTSCTS) {
<> 149:156823d33999 1033 // Enable CTS & RTS
<> 149:156823d33999 1034 MBED_ASSERT(uart_rts != (UARTName)NC);
<> 149:156823d33999 1035 MBED_ASSERT(uart_cts != (UARTName)NC);
<> 149:156823d33999 1036 obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS;
<> 149:156823d33999 1037 obj_s->pin_rts = rxflow;
<> 149:156823d33999 1038 obj_s->pin_cts = txflow;
<> 149:156823d33999 1039 // Enable the pin for CTS function
<> 149:156823d33999 1040 pinmap_pinout(txflow, PinMap_UART_CTS);
<> 149:156823d33999 1041 // Enable the pin for RTS function
<> 149:156823d33999 1042 pinmap_pinout(rxflow, PinMap_UART_RTS);
<> 149:156823d33999 1043 }
<> 149:156823d33999 1044
<> 149:156823d33999 1045 init_uart(obj);
<> 149:156823d33999 1046 }
<> 149:156823d33999 1047
<> 149:156823d33999 1048 #endif
<> 149:156823d33999 1049
<> 149:156823d33999 1050 #endif