Fork of mbed-dev build 137, last build before FAT file system appears to be broken. Also reduced HSE timeout time in STM4XX HAL
Fork of mbed-dev by
targets/TARGET_Maxim/TARGET_MAX32625/mxc/uart.h@150:02e0a0aed4ec, 2016-11-08 (annotated)
- Committer:
- <>
- Date:
- Tue Nov 08 17:45:16 2016 +0000
- Revision:
- 150:02e0a0aed4ec
This updates the lib to the mbed lib v129
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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<> | 150:02e0a0aed4ec | 1 | /******************************************************************************* |
<> | 150:02e0a0aed4ec | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
<> | 150:02e0a0aed4ec | 3 | * |
<> | 150:02e0a0aed4ec | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
<> | 150:02e0a0aed4ec | 5 | * copy of this software and associated documentation files (the "Software"), |
<> | 150:02e0a0aed4ec | 6 | * to deal in the Software without restriction, including without limitation |
<> | 150:02e0a0aed4ec | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
<> | 150:02e0a0aed4ec | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
<> | 150:02e0a0aed4ec | 9 | * Software is furnished to do so, subject to the following conditions: |
<> | 150:02e0a0aed4ec | 10 | * |
<> | 150:02e0a0aed4ec | 11 | * The above copyright notice and this permission notice shall be included |
<> | 150:02e0a0aed4ec | 12 | * in all copies or substantial portions of the Software. |
<> | 150:02e0a0aed4ec | 13 | * |
<> | 150:02e0a0aed4ec | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
<> | 150:02e0a0aed4ec | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
<> | 150:02e0a0aed4ec | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
<> | 150:02e0a0aed4ec | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
<> | 150:02e0a0aed4ec | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
<> | 150:02e0a0aed4ec | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
<> | 150:02e0a0aed4ec | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
<> | 150:02e0a0aed4ec | 21 | * |
<> | 150:02e0a0aed4ec | 22 | * Except as contained in this notice, the name of Maxim Integrated |
<> | 150:02e0a0aed4ec | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
<> | 150:02e0a0aed4ec | 24 | * Products, Inc. Branding Policy. |
<> | 150:02e0a0aed4ec | 25 | * |
<> | 150:02e0a0aed4ec | 26 | * The mere transfer of this software does not imply any licenses |
<> | 150:02e0a0aed4ec | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
<> | 150:02e0a0aed4ec | 28 | * trademarks, maskwork rights, or any other form of intellectual |
<> | 150:02e0a0aed4ec | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
<> | 150:02e0a0aed4ec | 30 | * ownership rights. |
<> | 150:02e0a0aed4ec | 31 | * |
<> | 150:02e0a0aed4ec | 32 | * $Date: 2016-06-21 16:16:33 -0500 (Tue, 21 Jun 2016) $ |
<> | 150:02e0a0aed4ec | 33 | * $Revision: 23447 $ |
<> | 150:02e0a0aed4ec | 34 | * |
<> | 150:02e0a0aed4ec | 35 | ******************************************************************************/ |
<> | 150:02e0a0aed4ec | 36 | |
<> | 150:02e0a0aed4ec | 37 | /** |
<> | 150:02e0a0aed4ec | 38 | * @file uart.h |
<> | 150:02e0a0aed4ec | 39 | * @brief UART driver header file. |
<> | 150:02e0a0aed4ec | 40 | */ |
<> | 150:02e0a0aed4ec | 41 | |
<> | 150:02e0a0aed4ec | 42 | #include "mxc_config.h" |
<> | 150:02e0a0aed4ec | 43 | #include "mxc_sys.h" |
<> | 150:02e0a0aed4ec | 44 | #include "uart_regs.h" |
<> | 150:02e0a0aed4ec | 45 | |
<> | 150:02e0a0aed4ec | 46 | #ifndef _UART_H_ |
<> | 150:02e0a0aed4ec | 47 | #define _UART_H_ |
<> | 150:02e0a0aed4ec | 48 | |
<> | 150:02e0a0aed4ec | 49 | #ifdef __cplusplus |
<> | 150:02e0a0aed4ec | 50 | extern "C" { |
<> | 150:02e0a0aed4ec | 51 | #endif |
<> | 150:02e0a0aed4ec | 52 | |
<> | 150:02e0a0aed4ec | 53 | /***** Definitions *****/ |
<> | 150:02e0a0aed4ec | 54 | |
<> | 150:02e0a0aed4ec | 55 | /// @brief Defines number of data bits per transmission/reception |
<> | 150:02e0a0aed4ec | 56 | typedef enum { |
<> | 150:02e0a0aed4ec | 57 | UART_DATA_SIZE_5_BITS = MXC_V_UART_CTRL_DATA_SIZE_5_BITS, |
<> | 150:02e0a0aed4ec | 58 | UART_DATA_SIZE_6_BITS = MXC_V_UART_CTRL_DATA_SIZE_6_BITS, |
<> | 150:02e0a0aed4ec | 59 | UART_DATA_SIZE_7_BITS = MXC_V_UART_CTRL_DATA_SIZE_7_BITS, |
<> | 150:02e0a0aed4ec | 60 | UART_DATA_SIZE_8_BITS = MXC_V_UART_CTRL_DATA_SIZE_8_BITS |
<> | 150:02e0a0aed4ec | 61 | } |
<> | 150:02e0a0aed4ec | 62 | uart_data_size_t; |
<> | 150:02e0a0aed4ec | 63 | |
<> | 150:02e0a0aed4ec | 64 | /// @brief Defines number of data bits per transmission/reception |
<> | 150:02e0a0aed4ec | 65 | typedef enum { |
<> | 150:02e0a0aed4ec | 66 | UART_PARITY_DISABLE = MXC_V_UART_CTRL_PARITY_DISABLE, |
<> | 150:02e0a0aed4ec | 67 | UART_PARITY_ODD = MXC_V_UART_CTRL_PARITY_ODD, |
<> | 150:02e0a0aed4ec | 68 | UART_PARITY_EVEN = MXC_V_UART_CTRL_PARITY_EVEN, |
<> | 150:02e0a0aed4ec | 69 | UART_PARITY_MARK = MXC_V_UART_CTRL_PARITY_MARK |
<> | 150:02e0a0aed4ec | 70 | } uart_parity_t; |
<> | 150:02e0a0aed4ec | 71 | |
<> | 150:02e0a0aed4ec | 72 | /// @brief UART configuration type. |
<> | 150:02e0a0aed4ec | 73 | typedef struct { |
<> | 150:02e0a0aed4ec | 74 | uint8_t extra_stop; ///< 0 for one stop bit, 1 for two stop bits. |
<> | 150:02e0a0aed4ec | 75 | uint8_t cts; ///< 1 to enable CTS. |
<> | 150:02e0a0aed4ec | 76 | uint8_t rts; ///< 1 to enable RTS. |
<> | 150:02e0a0aed4ec | 77 | uint32_t baud; ///< Baud rate in Hz. |
<> | 150:02e0a0aed4ec | 78 | uart_data_size_t size; ///< Number of bits in each character. |
<> | 150:02e0a0aed4ec | 79 | uart_parity_t parity; ///< Even or odd parity. |
<> | 150:02e0a0aed4ec | 80 | } uart_cfg_t; |
<> | 150:02e0a0aed4ec | 81 | |
<> | 150:02e0a0aed4ec | 82 | /** |
<> | 150:02e0a0aed4ec | 83 | * @brief Type alias for UART request structure |
<> | 150:02e0a0aed4ec | 84 | */ |
<> | 150:02e0a0aed4ec | 85 | typedef struct uart_req uart_req_t; |
<> | 150:02e0a0aed4ec | 86 | |
<> | 150:02e0a0aed4ec | 87 | /** |
<> | 150:02e0a0aed4ec | 88 | * @brief Type alias \c uart_async_callback for function signature: \code void callback)(uart_req_t* , int error_code) \endcode |
<> | 150:02e0a0aed4ec | 89 | * @param uart_req_t* Pointer to the transaction request. |
<> | 150:02e0a0aed4ec | 90 | * @param error_code Return code for the UART request. @see mxc_errors.h. |
<> | 150:02e0a0aed4ec | 91 | */ |
<> | 150:02e0a0aed4ec | 92 | typedef void (*uart_async_callback)(uart_req_t*, int); |
<> | 150:02e0a0aed4ec | 93 | |
<> | 150:02e0a0aed4ec | 94 | /// @brief UART Transaction request, must remain allocated until callback has completed. |
<> | 150:02e0a0aed4ec | 95 | struct uart_req { |
<> | 150:02e0a0aed4ec | 96 | uint8_t *data; ///< Data buffer for characters. |
<> | 150:02e0a0aed4ec | 97 | unsigned len; ///< Length of characters in data to send or receive. |
<> | 150:02e0a0aed4ec | 98 | unsigned num; ///< Number of characters actually sent or received. |
<> | 150:02e0a0aed4ec | 99 | uart_async_callback callback; ///< A callback function pointer with alias signature \c uart_async_callback |
<> | 150:02e0a0aed4ec | 100 | }; |
<> | 150:02e0a0aed4ec | 101 | |
<> | 150:02e0a0aed4ec | 102 | |
<> | 150:02e0a0aed4ec | 103 | /***** Globals *****/ |
<> | 150:02e0a0aed4ec | 104 | |
<> | 150:02e0a0aed4ec | 105 | /***** Function Prototypes *****/ |
<> | 150:02e0a0aed4ec | 106 | |
<> | 150:02e0a0aed4ec | 107 | /** |
<> | 150:02e0a0aed4ec | 108 | * @brief Initialize and enable UART module. |
<> | 150:02e0a0aed4ec | 109 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 110 | * @param cfg Pointer to UART configuration. |
<> | 150:02e0a0aed4ec | 111 | * @param sys_cfg Pointer to system configuration object |
<> | 150:02e0a0aed4ec | 112 | * @returns #E_NO_ERROR if everything is successful |
<> | 150:02e0a0aed4ec | 113 | */ |
<> | 150:02e0a0aed4ec | 114 | int UART_Init(mxc_uart_regs_t *uart, const uart_cfg_t *cfg, const sys_cfg_uart_t *sys_cfg); |
<> | 150:02e0a0aed4ec | 115 | |
<> | 150:02e0a0aed4ec | 116 | /** |
<> | 150:02e0a0aed4ec | 117 | * @brief Shutdown UART module. |
<> | 150:02e0a0aed4ec | 118 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 119 | * @returns #E_NO_ERROR if everything is successful |
<> | 150:02e0a0aed4ec | 120 | */ |
<> | 150:02e0a0aed4ec | 121 | int UART_Shutdown(mxc_uart_regs_t *uart); |
<> | 150:02e0a0aed4ec | 122 | |
<> | 150:02e0a0aed4ec | 123 | /** |
<> | 150:02e0a0aed4ec | 124 | * @brief Write UART data. Will block until transaction is complete. |
<> | 150:02e0a0aed4ec | 125 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 126 | * @param data Pointer to buffer for write data. |
<> | 150:02e0a0aed4ec | 127 | * @param len Number of bytes to write. |
<> | 150:02e0a0aed4ec | 128 | * @note Will return once data has been put into FIFO, not necessarily transmitted. |
<> | 150:02e0a0aed4ec | 129 | * @returns Number of bytes written if successful, error if unsuccessful. |
<> | 150:02e0a0aed4ec | 130 | */ |
<> | 150:02e0a0aed4ec | 131 | int UART_Write(mxc_uart_regs_t *uart, uint8_t* data, int len); |
<> | 150:02e0a0aed4ec | 132 | |
<> | 150:02e0a0aed4ec | 133 | /** |
<> | 150:02e0a0aed4ec | 134 | * @brief Read UART data. Will block until transaction is complete. |
<> | 150:02e0a0aed4ec | 135 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 136 | * @param data Pointer to buffer for read data. |
<> | 150:02e0a0aed4ec | 137 | * @param len Number of bytes to read. |
<> | 150:02e0a0aed4ec | 138 | * @param num Optional pointer to number of bytes actually read. |
<> | 150:02e0a0aed4ec | 139 | * Pass NULL if undesired. |
<> | 150:02e0a0aed4ec | 140 | * @returns Number of bytes read is successful, error if unsuccessful. |
<> | 150:02e0a0aed4ec | 141 | */ |
<> | 150:02e0a0aed4ec | 142 | int UART_Read(mxc_uart_regs_t *uart, uint8_t* data, int len, int *num); |
<> | 150:02e0a0aed4ec | 143 | |
<> | 150:02e0a0aed4ec | 144 | /** |
<> | 150:02e0a0aed4ec | 145 | * @brief Asynchronously Write UART data. |
<> | 150:02e0a0aed4ec | 146 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 147 | * @param req Request for a UART transaction. |
<> | 150:02e0a0aed4ec | 148 | * @note Request struct must remain allocated until callback. |
<> | 150:02e0a0aed4ec | 149 | * @returns #E_NO_ERROR if everything is successful, error if unsuccessful. |
<> | 150:02e0a0aed4ec | 150 | */ |
<> | 150:02e0a0aed4ec | 151 | int UART_WriteAsync(mxc_uart_regs_t *uart, uart_req_t *req); |
<> | 150:02e0a0aed4ec | 152 | |
<> | 150:02e0a0aed4ec | 153 | /** |
<> | 150:02e0a0aed4ec | 154 | * @brief Asynchronously Read UART data. |
<> | 150:02e0a0aed4ec | 155 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 156 | * @param req Pointer to request for a UART transaction. |
<> | 150:02e0a0aed4ec | 157 | * @note Request struct must remain allocated until callback. |
<> | 150:02e0a0aed4ec | 158 | * @returns #E_NO_ERROR if everything is successful, error if unsuccessful. |
<> | 150:02e0a0aed4ec | 159 | */ |
<> | 150:02e0a0aed4ec | 160 | int UART_ReadAsync(mxc_uart_regs_t *uart, uart_req_t *req); |
<> | 150:02e0a0aed4ec | 161 | |
<> | 150:02e0a0aed4ec | 162 | /** |
<> | 150:02e0a0aed4ec | 163 | * @brief Abort asynchronous request. |
<> | 150:02e0a0aed4ec | 164 | * @param req Pointer to request for a UART transaction. |
<> | 150:02e0a0aed4ec | 165 | * @returns #E_NO_ERROR if request aborted, error if unsuccessful. |
<> | 150:02e0a0aed4ec | 166 | */ |
<> | 150:02e0a0aed4ec | 167 | int UART_AbortAsync(uart_req_t *req); |
<> | 150:02e0a0aed4ec | 168 | |
<> | 150:02e0a0aed4ec | 169 | /** |
<> | 150:02e0a0aed4ec | 170 | * @brief UART interrupt handler. |
<> | 150:02e0a0aed4ec | 171 | * @details This function should be called by the application from the interrupt |
<> | 150:02e0a0aed4ec | 172 | * handler if UART interrupts are enabled. Alternately, this function |
<> | 150:02e0a0aed4ec | 173 | * can be periodically called by the application if UART interrupts are |
<> | 150:02e0a0aed4ec | 174 | * disabled. Only necessary to call this when using asynchronous functions. |
<> | 150:02e0a0aed4ec | 175 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 176 | */ |
<> | 150:02e0a0aed4ec | 177 | void UART_Handler(mxc_uart_regs_t *uart); |
<> | 150:02e0a0aed4ec | 178 | |
<> | 150:02e0a0aed4ec | 179 | /** |
<> | 150:02e0a0aed4ec | 180 | * @brief Check to see if the UART is busy. |
<> | 150:02e0a0aed4ec | 181 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 182 | * @returns #E_NO_ERROR if idle, #E_BUSY if in use. |
<> | 150:02e0a0aed4ec | 183 | */ |
<> | 150:02e0a0aed4ec | 184 | int UART_Busy(mxc_uart_regs_t *uart); |
<> | 150:02e0a0aed4ec | 185 | |
<> | 150:02e0a0aed4ec | 186 | /** |
<> | 150:02e0a0aed4ec | 187 | * @brief Attempt to prepare the UART for sleep. |
<> | 150:02e0a0aed4ec | 188 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 189 | * @details Checks for any ongoing transactions. Disables interrupts if the I2CM |
<> | 150:02e0a0aed4ec | 190 | is idle. |
<> | 150:02e0a0aed4ec | 191 | * @returns #E_NO_ERROR if ready to sleep, #E_BUSY if not ready for sleep. |
<> | 150:02e0a0aed4ec | 192 | */ |
<> | 150:02e0a0aed4ec | 193 | int UART_PrepForSleep(mxc_uart_regs_t *uart); |
<> | 150:02e0a0aed4ec | 194 | |
<> | 150:02e0a0aed4ec | 195 | /** |
<> | 150:02e0a0aed4ec | 196 | * @brief Enables the UART without overwriting existing configuration. |
<> | 150:02e0a0aed4ec | 197 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 198 | */ |
<> | 150:02e0a0aed4ec | 199 | __STATIC_INLINE void UART_Enable(mxc_uart_regs_t *uart) |
<> | 150:02e0a0aed4ec | 200 | { |
<> | 150:02e0a0aed4ec | 201 | uart->ctrl |= (MXC_F_UART_CTRL_UART_EN | MXC_F_UART_CTRL_TX_FIFO_EN | |
<> | 150:02e0a0aed4ec | 202 | MXC_F_UART_CTRL_RX_FIFO_EN); |
<> | 150:02e0a0aed4ec | 203 | } |
<> | 150:02e0a0aed4ec | 204 | |
<> | 150:02e0a0aed4ec | 205 | /** |
<> | 150:02e0a0aed4ec | 206 | * @brief Drain all of the data in the RXFIFO. |
<> | 150:02e0a0aed4ec | 207 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 208 | */ |
<> | 150:02e0a0aed4ec | 209 | __STATIC_INLINE void UART_DrainRX(mxc_uart_regs_t *uart) |
<> | 150:02e0a0aed4ec | 210 | { |
<> | 150:02e0a0aed4ec | 211 | uint32_t ctrl_save = uart->ctrl; |
<> | 150:02e0a0aed4ec | 212 | uart->ctrl = (ctrl_save & ~MXC_F_UART_CTRL_RX_FIFO_EN); |
<> | 150:02e0a0aed4ec | 213 | uart->ctrl = ctrl_save; |
<> | 150:02e0a0aed4ec | 214 | } |
<> | 150:02e0a0aed4ec | 215 | |
<> | 150:02e0a0aed4ec | 216 | /** |
<> | 150:02e0a0aed4ec | 217 | * @brief Drain all of the data in the TXFIFO. |
<> | 150:02e0a0aed4ec | 218 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 219 | */ |
<> | 150:02e0a0aed4ec | 220 | __STATIC_INLINE void UART_DrainTX(mxc_uart_regs_t *uart) |
<> | 150:02e0a0aed4ec | 221 | { |
<> | 150:02e0a0aed4ec | 222 | uint32_t ctrl_save = uart->ctrl; |
<> | 150:02e0a0aed4ec | 223 | uart->ctrl = (ctrl_save & ~MXC_F_UART_CTRL_TX_FIFO_EN); |
<> | 150:02e0a0aed4ec | 224 | uart->ctrl = ctrl_save; |
<> | 150:02e0a0aed4ec | 225 | } |
<> | 150:02e0a0aed4ec | 226 | |
<> | 150:02e0a0aed4ec | 227 | /** |
<> | 150:02e0a0aed4ec | 228 | * @brief Write FIFO availability. |
<> | 150:02e0a0aed4ec | 229 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 230 | * @returns Number of empty bytes available in write FIFO. |
<> | 150:02e0a0aed4ec | 231 | */ |
<> | 150:02e0a0aed4ec | 232 | __STATIC_INLINE unsigned UART_NumWriteAvail(mxc_uart_regs_t *uart) |
<> | 150:02e0a0aed4ec | 233 | { |
<> | 150:02e0a0aed4ec | 234 | return (MXC_UART_FIFO_DEPTH - (uart->tx_fifo_ctrl & MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY)); |
<> | 150:02e0a0aed4ec | 235 | } |
<> | 150:02e0a0aed4ec | 236 | |
<> | 150:02e0a0aed4ec | 237 | /** |
<> | 150:02e0a0aed4ec | 238 | * @brief Read FIFO availability. |
<> | 150:02e0a0aed4ec | 239 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 240 | * @returns Number of bytes in read FIFO. |
<> | 150:02e0a0aed4ec | 241 | */ |
<> | 150:02e0a0aed4ec | 242 | __STATIC_INLINE unsigned UART_NumReadAvail(mxc_uart_regs_t *uart) |
<> | 150:02e0a0aed4ec | 243 | { |
<> | 150:02e0a0aed4ec | 244 | return (uart->rx_fifo_ctrl & MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY); |
<> | 150:02e0a0aed4ec | 245 | } |
<> | 150:02e0a0aed4ec | 246 | |
<> | 150:02e0a0aed4ec | 247 | /** |
<> | 150:02e0a0aed4ec | 248 | * @brief Clear interrupt flags. |
<> | 150:02e0a0aed4ec | 249 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 250 | * @param mask Mask of interrupts to clear. |
<> | 150:02e0a0aed4ec | 251 | */ |
<> | 150:02e0a0aed4ec | 252 | __STATIC_INLINE void UART_ClearFlags(mxc_uart_regs_t *uart, uint32_t mask) |
<> | 150:02e0a0aed4ec | 253 | { |
<> | 150:02e0a0aed4ec | 254 | uart->intfl = mask; |
<> | 150:02e0a0aed4ec | 255 | } |
<> | 150:02e0a0aed4ec | 256 | |
<> | 150:02e0a0aed4ec | 257 | /** |
<> | 150:02e0a0aed4ec | 258 | * @brief Get interrupt flags. |
<> | 150:02e0a0aed4ec | 259 | * @param uart Pointer to UART regs. |
<> | 150:02e0a0aed4ec | 260 | * @returns Mask of active flags. |
<> | 150:02e0a0aed4ec | 261 | */ |
<> | 150:02e0a0aed4ec | 262 | __STATIC_INLINE unsigned UART_GetFlags(mxc_uart_regs_t *uart) |
<> | 150:02e0a0aed4ec | 263 | { |
<> | 150:02e0a0aed4ec | 264 | return (uart->intfl); |
<> | 150:02e0a0aed4ec | 265 | } |
<> | 150:02e0a0aed4ec | 266 | |
<> | 150:02e0a0aed4ec | 267 | #ifdef __cplusplus |
<> | 150:02e0a0aed4ec | 268 | } |
<> | 150:02e0a0aed4ec | 269 | #endif |
<> | 150:02e0a0aed4ec | 270 | |
<> | 150:02e0a0aed4ec | 271 | #endif /* _UART_H_ */ |