
Benedikt Kicin, vytah semestralka
Diff: MMA8451Q.cpp
- Revision:
- 0:2574b54351ed
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/MMA8451Q.cpp Wed Jan 24 07:55:50 2018 +0000 @@ -0,0 +1,265 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#include "MMA8451Q.h" + +#define REG_STATUS 0x00 +#define REG_WHO_AM_I 0x0D +#define REG_CTRL_REG_1 0x2A +#define REG_CTRL_REG_2 0x2B +#define REG_CTRL_REG_4 0x2D +#define REG_CTRL_REG_5 0x2E +#define REG_INT_SRC 0x0C +#define REG_FF_MT_CFG 0x15 +#define REG_FF_MT_SRC 0x16 +#define REG_FF_MT_THS 0x17 +#define REG_FF_MT_CNT 0x18 +#define REG_DBCNTM 0x11 +#define REG_DBNCE 0x12 +#define REG_BKFR 0x13 +#define REG_P_L_THS 0x14 +#define REG_PL_STATUS 0x10 + +// +#define REG_OUT_X_MSB 0x01 +#define REG_OUT_Y_MSB 0x03 +#define REG_OUT_Z_MSB 0x05 + +#define UINT14_MAX 16383 + +// +#define ZYXDR 0x08 +#define ZDR 0x04 +#define YDR 0x02 +#define XDR 0x01 + +/** +*Interrupt schema +*/ +void (*MMA8451Q_usr2_fptr)(void); // Pointers to user function called after +void (*MMA8451Q_usr1_fptr)(void); // IRQ assertion. + +// +InterruptIn MMA8451Q_Int1( PTC5); // INTERRUPT1 +InterruptIn MMA8451Q_Int2( PTD1); // INTERRUPT2 + +// Constructor with features +MMA8451Q::MMA8451Q(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr) { + + MMA8451Q_Int1.fall( NULL); + MMA8451Q_Int2.fall( NULL); + MMA8451Q_usr2_fptr = NULL; + MMA8451Q_usr1_fptr = NULL; + + Reset(); + Active(); +} + +// Constructor +MMA8451Q::~MMA8451Q() +{ + MMA8451Q_Int1.fall( NULL); + MMA8451Q_Int2.fall( NULL); + MMA8451Q_usr2_fptr = NULL; + MMA8451Q_usr1_fptr = NULL; +} + +void MMA8451Q::Reset( void) +{ + // Soft reset + uint8_t data[2] = {REG_CTRL_REG_2, 0x40}; + writeRegs(data, 2); + wait( 0.1); +} + +void MMA8451Q::MotionDetection( void(*fptr)(void)) +{ + Reset(); + + // Step 1: + unsigned char data[2] = {REG_CTRL_REG_1, 0x18}; + writeRegs(data, 2); + + // Step 2: + data[0] = REG_FF_MT_CFG; + data[1] = 0xD8; + writeRegs(data, 2); + + // Step 3: + data[0] = REG_FF_MT_THS; + data[1] = 0x10; + writeRegs(data, 2); + + // Step 4: + data[0] = REG_FF_MT_CNT; + data[1] = 0x0A; + writeRegs(data, 2); + + // Step 5: + data[0] = REG_CTRL_REG_4; + data[1] = 0x04; + writeRegs(data, 2); + + // Step 6: + data[0] = REG_CTRL_REG_5; + data[1] = 0x00; + writeRegs(data, 2); + + // Step 7: + data[0] = REG_CTRL_REG_1; + data[1] = 0x19; + writeRegs(data, 2); + + MMA8451Q_usr2_fptr = fptr; + MMA8451Q_Int2.fall( this, &MMA8451Q::Motion_IRQ); + +} + +void MMA8451Q::Motion_IRQ( void) +{ + unsigned char t; + + // Determine source of the interrupt by first reading the system interrupt + readRegs( REG_INT_SRC, &t, 1); + // + if ( (t & 0x04) == 0x04) { + // Read the Motion/Freefall Function to clear the interrupt + readRegs( REG_FF_MT_SRC, &t, 1); + // Run the user supplied function + MMA8451Q_usr2_fptr(); + } +} + + +void MMA8451Q::Active( void) +{ + unsigned char t; + + // Activate the peripheral + readRegs(REG_CTRL_REG_1, &t, 1); + unsigned char data[2] = {REG_CTRL_REG_1, t|0x01}; + writeRegs(data, 2); +} + +void MMA8451Q::Standby( void) +{ + unsigned char t; + + // Standby + readRegs(REG_CTRL_REG_1, &t, 1); + unsigned char data[2] = {REG_CTRL_REG_1, t&0xFE}; + writeRegs(data, 2); +} + +uint8_t MMA8451Q::getWhoAmI() { + uint8_t who_am_i = 0; + readRegs(REG_WHO_AM_I, &who_am_i, 1); + return who_am_i; +} + +float MMA8451Q::getAccX() { + return (float(getAccAxis(REG_OUT_X_MSB))/4096.0); +} + +float MMA8451Q::getAccY() { + return (float(getAccAxis(REG_OUT_Y_MSB))/4096.0); +} + +float MMA8451Q::getAccZ() { + return (float(getAccAxis(REG_OUT_Z_MSB))/4096.0); +} + +void MMA8451Q::getAccAllAxis(float * res) { + res[0] = getAccX(); + res[1] = getAccY(); + res[2] = getAccZ(); +} + +int16_t MMA8451Q::getAccAxis(uint8_t addr) { + int16_t acc; + uint8_t res[2]; + readRegs(addr, res, 2); + + acc = (res[0] << 6) | (res[1] >> 2); + if (acc > UINT14_MAX/2) + acc -= UINT14_MAX; + + return acc; +} + +unsigned int MMA8451Q::getAccRawAllAxis( int16_t * res) +{ + if ( isDataAvailable() & ZYXDR) + { + getAccRawX( &res[0]); + getAccRawY( &res[1]); + getAccRawZ( &res[2]); + return 1; + } else + return 0; +} + +int16_t MMA8451Q::getAccRawX( int16_t * res) +{ + if ( isDataAvailable() & XDR) + { + *res = getAccAxis(REG_OUT_X_MSB); + return 1; + } else + return 0; +} + +int16_t MMA8451Q::getAccRawY( int16_t * res) +{ + if ( isDataAvailable() & YDR) + { + *res = getAccAxis(REG_OUT_Y_MSB); + return 1; + } else + return 0; +} + +int16_t MMA8451Q::getAccRawZ( int16_t * res) +{ + if ( isDataAvailable() & ZDR) + { + *res = getAccAxis(REG_OUT_Z_MSB); + return 1; + } else + return 0; +} + +unsigned int MMA8451Q::isDataAvailable( void) +{ + unsigned char status; + + readRegs( REG_STATUS, &status, 1); + + return (status); + +} + +void MMA8451Q::readRegs(int addr, uint8_t * data, int len) { + char t[1] = {addr}; + m_i2c.write(m_addr, t, 1, true); + m_i2c.read(m_addr, (char *)data, len); +} + +void MMA8451Q::writeRegs(uint8_t * data, int len) { + m_i2c.write(m_addr, (char *)data, len); +}