Kyle Goins
Blinks LED cube along with music
Dependencies: mbed mbed-rtos MCP23S17
ADC/adc.cpp@0:b6451e68016a, 2011-02-28 (annotated)
- Committer:
- gth646f
- Date:
- Mon Feb 28 03:26:53 2011 +0000
- Revision:
- 0:b6451e68016a
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| gth646f | 0:b6451e68016a | 1 | /* mbed Library - ADC |
| gth646f | 0:b6451e68016a | 2 | * Copyright (c) 2010, sblandford |
| gth646f | 0:b6451e68016a | 3 | * released under MIT license http://mbed.org/licence/mit |
| gth646f | 0:b6451e68016a | 4 | */ |
| gth646f | 0:b6451e68016a | 5 | #include "mbed.h" |
| gth646f | 0:b6451e68016a | 6 | #include "adc.h" |
| gth646f | 0:b6451e68016a | 7 | |
| gth646f | 0:b6451e68016a | 8 | |
| gth646f | 0:b6451e68016a | 9 | ADC *ADC::instance; |
| gth646f | 0:b6451e68016a | 10 | |
| gth646f | 0:b6451e68016a | 11 | ADC::ADC(int sample_rate, int cclk_div) |
| gth646f | 0:b6451e68016a | 12 | { |
| gth646f | 0:b6451e68016a | 13 | |
| gth646f | 0:b6451e68016a | 14 | int i, adc_clk_freq, pclk, clock_div, max_div=1; |
| gth646f | 0:b6451e68016a | 15 | |
| gth646f | 0:b6451e68016a | 16 | //Work out CCLK |
| gth646f | 0:b6451e68016a | 17 | adc_clk_freq=CLKS_PER_SAMPLE*sample_rate; |
| gth646f | 0:b6451e68016a | 18 | int m = (LPC_SC->PLL0CFG & 0xFFFF) + 1; |
| gth646f | 0:b6451e68016a | 19 | int n = (LPC_SC->PLL0CFG >> 16) + 1; |
| gth646f | 0:b6451e68016a | 20 | int cclkdiv = LPC_SC->CCLKCFG + 1; |
| gth646f | 0:b6451e68016a | 21 | int Fcco = (2 * m * XTAL_FREQ) / n; |
| gth646f | 0:b6451e68016a | 22 | int cclk = Fcco / cclkdiv; |
| gth646f | 0:b6451e68016a | 23 | |
| gth646f | 0:b6451e68016a | 24 | //Power up the ADC |
| gth646f | 0:b6451e68016a | 25 | LPC_SC->PCONP |= (1 << 12); |
| gth646f | 0:b6451e68016a | 26 | //Set clock at cclk / 1. |
| gth646f | 0:b6451e68016a | 27 | LPC_SC->PCLKSEL0 &= ~(0x3 << 24); |
| gth646f | 0:b6451e68016a | 28 | switch (cclk_div) { |
| gth646f | 0:b6451e68016a | 29 | case 1: |
| gth646f | 0:b6451e68016a | 30 | LPC_SC->PCLKSEL0 |= 0x1 << 24; |
| gth646f | 0:b6451e68016a | 31 | break; |
| gth646f | 0:b6451e68016a | 32 | case 2: |
| gth646f | 0:b6451e68016a | 33 | LPC_SC->PCLKSEL0 |= 0x2 << 24; |
| gth646f | 0:b6451e68016a | 34 | break; |
| gth646f | 0:b6451e68016a | 35 | case 4: |
| gth646f | 0:b6451e68016a | 36 | LPC_SC->PCLKSEL0 |= 0x0 << 24; |
| gth646f | 0:b6451e68016a | 37 | break; |
| gth646f | 0:b6451e68016a | 38 | case 8: |
| gth646f | 0:b6451e68016a | 39 | LPC_SC->PCLKSEL0 |= 0x3 << 24; |
| gth646f | 0:b6451e68016a | 40 | break; |
| gth646f | 0:b6451e68016a | 41 | default: |
| gth646f | 0:b6451e68016a | 42 | fprintf(stderr, "Warning: ADC CCLK clock divider must be 1, 2, 4 or 8. %u supplied.\n", |
| gth646f | 0:b6451e68016a | 43 | cclk_div); |
| gth646f | 0:b6451e68016a | 44 | fprintf(stderr, "Defaulting to 1.\n"); |
| gth646f | 0:b6451e68016a | 45 | LPC_SC->PCLKSEL0 |= 0x1 << 24; |
| gth646f | 0:b6451e68016a | 46 | break; |
| gth646f | 0:b6451e68016a | 47 | } |
| gth646f | 0:b6451e68016a | 48 | pclk = cclk / cclk_div; |
| gth646f | 0:b6451e68016a | 49 | clock_div=pclk / adc_clk_freq; |
| gth646f | 0:b6451e68016a | 50 | |
| gth646f | 0:b6451e68016a | 51 | if (clock_div > 0xFF) { |
| gth646f | 0:b6451e68016a | 52 | fprintf(stderr, "Warning: Clock division is %u which is above 255 limit. Re-Setting at limit.\n", |
| gth646f | 0:b6451e68016a | 53 | clock_div); |
| gth646f | 0:b6451e68016a | 54 | clock_div=0xFF; |
| gth646f | 0:b6451e68016a | 55 | } |
| gth646f | 0:b6451e68016a | 56 | if (clock_div == 0) { |
| gth646f | 0:b6451e68016a | 57 | fprintf(stderr, "Warning: Clock division is 0. Re-Setting to 1.\n"); |
| gth646f | 0:b6451e68016a | 58 | clock_div=1; |
| gth646f | 0:b6451e68016a | 59 | } |
| gth646f | 0:b6451e68016a | 60 | |
| gth646f | 0:b6451e68016a | 61 | _adc_clk_freq=pclk / clock_div; |
| gth646f | 0:b6451e68016a | 62 | if (_adc_clk_freq > MAX_ADC_CLOCK) { |
| gth646f | 0:b6451e68016a | 63 | fprintf(stderr, "Warning: Actual ADC sample rate of %u which is above %u limit\n", |
| gth646f | 0:b6451e68016a | 64 | _adc_clk_freq / CLKS_PER_SAMPLE, MAX_ADC_CLOCK / CLKS_PER_SAMPLE); |
| gth646f | 0:b6451e68016a | 65 | while ((pclk / max_div) > MAX_ADC_CLOCK) max_div++; |
| gth646f | 0:b6451e68016a | 66 | fprintf(stderr, "Maximum recommended sample rate is %u\n", (pclk / max_div) / CLKS_PER_SAMPLE); |
| gth646f | 0:b6451e68016a | 67 | } |
| gth646f | 0:b6451e68016a | 68 | |
| gth646f | 0:b6451e68016a | 69 | LPC_ADC->ADCR = |
| gth646f | 0:b6451e68016a | 70 | ((clock_div - 1 ) << 8 ) | //Clkdiv |
| gth646f | 0:b6451e68016a | 71 | ( 1 << 21 ); //A/D operational |
| gth646f | 0:b6451e68016a | 72 | |
| gth646f | 0:b6451e68016a | 73 | //Default no channels enabled |
| gth646f | 0:b6451e68016a | 74 | LPC_ADC->ADCR &= ~0xFF; |
| gth646f | 0:b6451e68016a | 75 | //Default NULL global custom isr |
| gth646f | 0:b6451e68016a | 76 | _adc_g_isr = NULL; |
| gth646f | 0:b6451e68016a | 77 | //Initialize arrays |
| gth646f | 0:b6451e68016a | 78 | for (i=7; i>=0; i--) { |
| gth646f | 0:b6451e68016a | 79 | _adc_data[i] = 0; |
| gth646f | 0:b6451e68016a | 80 | _adc_isr[i] = NULL; |
| gth646f | 0:b6451e68016a | 81 | } |
| gth646f | 0:b6451e68016a | 82 | |
| gth646f | 0:b6451e68016a | 83 | |
| gth646f | 0:b6451e68016a | 84 | //* Attach IRQ |
| gth646f | 0:b6451e68016a | 85 | instance = this; |
| gth646f | 0:b6451e68016a | 86 | NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr); |
| gth646f | 0:b6451e68016a | 87 | |
| gth646f | 0:b6451e68016a | 88 | //Disable global interrupt |
| gth646f | 0:b6451e68016a | 89 | LPC_ADC->ADINTEN &= ~0x100; |
| gth646f | 0:b6451e68016a | 90 | |
| gth646f | 0:b6451e68016a | 91 | }; |
| gth646f | 0:b6451e68016a | 92 | |
| gth646f | 0:b6451e68016a | 93 | void ADC::_adcisr(void) |
| gth646f | 0:b6451e68016a | 94 | { |
| gth646f | 0:b6451e68016a | 95 | instance->adcisr(); |
| gth646f | 0:b6451e68016a | 96 | } |
| gth646f | 0:b6451e68016a | 97 | |
| gth646f | 0:b6451e68016a | 98 | |
| gth646f | 0:b6451e68016a | 99 | void ADC::adcisr(void) |
| gth646f | 0:b6451e68016a | 100 | { |
| gth646f | 0:b6451e68016a | 101 | uint32_t stat; |
| gth646f | 0:b6451e68016a | 102 | int chan; |
| gth646f | 0:b6451e68016a | 103 | |
| gth646f | 0:b6451e68016a | 104 | // Read status |
| gth646f | 0:b6451e68016a | 105 | stat = LPC_ADC->ADSTAT; |
| gth646f | 0:b6451e68016a | 106 | //Scan channels for over-run or done and update array |
| gth646f | 0:b6451e68016a | 107 | if (stat & 0x0101) _adc_data[0] = LPC_ADC->ADDR0; |
| gth646f | 0:b6451e68016a | 108 | if (stat & 0x0202) _adc_data[1] = LPC_ADC->ADDR1; |
| gth646f | 0:b6451e68016a | 109 | if (stat & 0x0404) _adc_data[2] = LPC_ADC->ADDR2; |
| gth646f | 0:b6451e68016a | 110 | if (stat & 0x0808) _adc_data[3] = LPC_ADC->ADDR3; |
| gth646f | 0:b6451e68016a | 111 | if (stat & 0x1010) _adc_data[4] = LPC_ADC->ADDR4; |
| gth646f | 0:b6451e68016a | 112 | if (stat & 0x2020) _adc_data[5] = LPC_ADC->ADDR5; |
| gth646f | 0:b6451e68016a | 113 | if (stat & 0x4040) _adc_data[6] = LPC_ADC->ADDR6; |
| gth646f | 0:b6451e68016a | 114 | if (stat & 0x8080) _adc_data[7] = LPC_ADC->ADDR7; |
| gth646f | 0:b6451e68016a | 115 | |
| gth646f | 0:b6451e68016a | 116 | // Channel that triggered interrupt |
| gth646f | 0:b6451e68016a | 117 | chan = (LPC_ADC->ADGDR >> 24) & 0x07; |
| gth646f | 0:b6451e68016a | 118 | //User defined interrupt handlers |
| gth646f | 0:b6451e68016a | 119 | if (_adc_isr[chan] != NULL) |
| gth646f | 0:b6451e68016a | 120 | _adc_isr[chan](_adc_data[chan]); |
| gth646f | 0:b6451e68016a | 121 | if (_adc_g_isr != NULL) |
| gth646f | 0:b6451e68016a | 122 | _adc_g_isr(chan, _adc_data[chan]); |
| gth646f | 0:b6451e68016a | 123 | return; |
| gth646f | 0:b6451e68016a | 124 | } |
| gth646f | 0:b6451e68016a | 125 | |
| gth646f | 0:b6451e68016a | 126 | int ADC::_pin_to_channel(PinName pin) { |
| gth646f | 0:b6451e68016a | 127 | int chan; |
| gth646f | 0:b6451e68016a | 128 | switch (pin) { |
| gth646f | 0:b6451e68016a | 129 | case p15://=p0.23 of LPC1768 |
| gth646f | 0:b6451e68016a | 130 | default: |
| gth646f | 0:b6451e68016a | 131 | chan=0; |
| gth646f | 0:b6451e68016a | 132 | break; |
| gth646f | 0:b6451e68016a | 133 | case p16://=p0.24 of LPC1768 |
| gth646f | 0:b6451e68016a | 134 | chan=1; |
| gth646f | 0:b6451e68016a | 135 | break; |
| gth646f | 0:b6451e68016a | 136 | case p17://=p0.25 of LPC1768 |
| gth646f | 0:b6451e68016a | 137 | chan=2; |
| gth646f | 0:b6451e68016a | 138 | break; |
| gth646f | 0:b6451e68016a | 139 | case p18://=p0.26 of LPC1768 |
| gth646f | 0:b6451e68016a | 140 | chan=3; |
| gth646f | 0:b6451e68016a | 141 | break; |
| gth646f | 0:b6451e68016a | 142 | case p19://=p1.30 of LPC1768 |
| gth646f | 0:b6451e68016a | 143 | chan=4; |
| gth646f | 0:b6451e68016a | 144 | break; |
| gth646f | 0:b6451e68016a | 145 | case p20://=p1.31 of LPC1768 |
| gth646f | 0:b6451e68016a | 146 | chan=5; |
| gth646f | 0:b6451e68016a | 147 | break; |
| gth646f | 0:b6451e68016a | 148 | } |
| gth646f | 0:b6451e68016a | 149 | return(chan); |
| gth646f | 0:b6451e68016a | 150 | } |
| gth646f | 0:b6451e68016a | 151 | |
| gth646f | 0:b6451e68016a | 152 | PinName ADC::channel_to_pin(int chan) { |
| gth646f | 0:b6451e68016a | 153 | const PinName pin[8]={p15, p16, p17, p18, p19, p20, p15, p15}; |
| gth646f | 0:b6451e68016a | 154 | |
| gth646f | 0:b6451e68016a | 155 | if ((chan < 0) || (chan > 5)) |
| gth646f | 0:b6451e68016a | 156 | fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan); |
| gth646f | 0:b6451e68016a | 157 | return(pin[chan & 0x07]); |
| gth646f | 0:b6451e68016a | 158 | } |
| gth646f | 0:b6451e68016a | 159 | |
| gth646f | 0:b6451e68016a | 160 | |
| gth646f | 0:b6451e68016a | 161 | int ADC::channel_to_pin_number(int chan) { |
| gth646f | 0:b6451e68016a | 162 | const int pin[8]={15, 16, 17, 18, 19, 20, 0, 0}; |
| gth646f | 0:b6451e68016a | 163 | |
| gth646f | 0:b6451e68016a | 164 | if ((chan < 0) || (chan > 5)) |
| gth646f | 0:b6451e68016a | 165 | fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan); |
| gth646f | 0:b6451e68016a | 166 | return(pin[chan & 0x07]); |
| gth646f | 0:b6451e68016a | 167 | } |
| gth646f | 0:b6451e68016a | 168 | |
| gth646f | 0:b6451e68016a | 169 | |
| gth646f | 0:b6451e68016a | 170 | uint32_t ADC::_data_of_pin(PinName pin) { |
| gth646f | 0:b6451e68016a | 171 | //If in burst mode and at least one interrupt enabled then |
| gth646f | 0:b6451e68016a | 172 | //take all values from _adc_data |
| gth646f | 0:b6451e68016a | 173 | if (burst() && (LPC_ADC->ADINTEN & 0x3F)) { |
| gth646f | 0:b6451e68016a | 174 | return(_adc_data[_pin_to_channel(pin)]); |
| gth646f | 0:b6451e68016a | 175 | } else { |
| gth646f | 0:b6451e68016a | 176 | //Return current register value or last value from interrupt |
| gth646f | 0:b6451e68016a | 177 | switch (pin) { |
| gth646f | 0:b6451e68016a | 178 | case p15://=p0.23 of LPC1768 |
| gth646f | 0:b6451e68016a | 179 | default: |
| gth646f | 0:b6451e68016a | 180 | return(LPC_ADC->ADINTEN & 0x01?_adc_data[0]:LPC_ADC->ADDR0); |
| gth646f | 0:b6451e68016a | 181 | case p16://=p0.24 of LPC1768 |
| gth646f | 0:b6451e68016a | 182 | return(LPC_ADC->ADINTEN & 0x02?_adc_data[1]:LPC_ADC->ADDR1); |
| gth646f | 0:b6451e68016a | 183 | case p17://=p0.25 of LPC1768 |
| gth646f | 0:b6451e68016a | 184 | return(LPC_ADC->ADINTEN & 0x04?_adc_data[2]:LPC_ADC->ADDR2); |
| gth646f | 0:b6451e68016a | 185 | case p18://=p0.26 of LPC1768: |
| gth646f | 0:b6451e68016a | 186 | return(LPC_ADC->ADINTEN & 0x08?_adc_data[3]:LPC_ADC->ADDR3); |
| gth646f | 0:b6451e68016a | 187 | case p19://=p1.30 of LPC1768 |
| gth646f | 0:b6451e68016a | 188 | return(LPC_ADC->ADINTEN & 0x10?_adc_data[4]:LPC_ADC->ADDR4); |
| gth646f | 0:b6451e68016a | 189 | case p20://=p1.31 of LPC1768 |
| gth646f | 0:b6451e68016a | 190 | return(LPC_ADC->ADINTEN & 0x20?_adc_data[5]:LPC_ADC->ADDR5); |
| gth646f | 0:b6451e68016a | 191 | } |
| gth646f | 0:b6451e68016a | 192 | } |
| gth646f | 0:b6451e68016a | 193 | } |
| gth646f | 0:b6451e68016a | 194 | |
| gth646f | 0:b6451e68016a | 195 | //Enable or disable an ADC pin |
| gth646f | 0:b6451e68016a | 196 | void ADC::setup(PinName pin, int state) { |
| gth646f | 0:b6451e68016a | 197 | int chan; |
| gth646f | 0:b6451e68016a | 198 | chan=_pin_to_channel(pin); |
| gth646f | 0:b6451e68016a | 199 | if ((state & 1) == 1) { |
| gth646f | 0:b6451e68016a | 200 | switch(pin) { |
| gth646f | 0:b6451e68016a | 201 | case p15://=p0.23 of LPC1768 |
| gth646f | 0:b6451e68016a | 202 | default: |
| gth646f | 0:b6451e68016a | 203 | LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14); |
| gth646f | 0:b6451e68016a | 204 | LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 14; |
| gth646f | 0:b6451e68016a | 205 | LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14); |
| gth646f | 0:b6451e68016a | 206 | LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 14; |
| gth646f | 0:b6451e68016a | 207 | break; |
| gth646f | 0:b6451e68016a | 208 | case p16://=p0.24 of LPC1768 |
| gth646f | 0:b6451e68016a | 209 | LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16); |
| gth646f | 0:b6451e68016a | 210 | LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 16; |
| gth646f | 0:b6451e68016a | 211 | LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16); |
| gth646f | 0:b6451e68016a | 212 | LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 16; |
| gth646f | 0:b6451e68016a | 213 | break; |
| gth646f | 0:b6451e68016a | 214 | case p17://=p0.25 of LPC1768 |
| gth646f | 0:b6451e68016a | 215 | LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18); |
| gth646f | 0:b6451e68016a | 216 | LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 18; |
| gth646f | 0:b6451e68016a | 217 | LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18); |
| gth646f | 0:b6451e68016a | 218 | LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 18; |
| gth646f | 0:b6451e68016a | 219 | break; |
| gth646f | 0:b6451e68016a | 220 | case p18://=p0.26 of LPC1768: |
| gth646f | 0:b6451e68016a | 221 | LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20); |
| gth646f | 0:b6451e68016a | 222 | LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 20; |
| gth646f | 0:b6451e68016a | 223 | LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20); |
| gth646f | 0:b6451e68016a | 224 | LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 20; |
| gth646f | 0:b6451e68016a | 225 | break; |
| gth646f | 0:b6451e68016a | 226 | case p19://=p1.30 of LPC1768 |
| gth646f | 0:b6451e68016a | 227 | LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28); |
| gth646f | 0:b6451e68016a | 228 | LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 28; |
| gth646f | 0:b6451e68016a | 229 | LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28); |
| gth646f | 0:b6451e68016a | 230 | LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 28; |
| gth646f | 0:b6451e68016a | 231 | break; |
| gth646f | 0:b6451e68016a | 232 | case p20://=p1.31 of LPC1768 |
| gth646f | 0:b6451e68016a | 233 | LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30); |
| gth646f | 0:b6451e68016a | 234 | LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 30; |
| gth646f | 0:b6451e68016a | 235 | LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30); |
| gth646f | 0:b6451e68016a | 236 | LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 30; |
| gth646f | 0:b6451e68016a | 237 | break; |
| gth646f | 0:b6451e68016a | 238 | } |
| gth646f | 0:b6451e68016a | 239 | //Only one channel can be selected at a time if not in burst mode |
| gth646f | 0:b6451e68016a | 240 | if (!burst()) LPC_ADC->ADCR &= ~0xFF; |
| gth646f | 0:b6451e68016a | 241 | //Select channel |
| gth646f | 0:b6451e68016a | 242 | LPC_ADC->ADCR |= (1 << chan); |
| gth646f | 0:b6451e68016a | 243 | } |
| gth646f | 0:b6451e68016a | 244 | else { |
| gth646f | 0:b6451e68016a | 245 | switch(pin) { |
| gth646f | 0:b6451e68016a | 246 | case p15://=p0.23 of LPC1768 |
| gth646f | 0:b6451e68016a | 247 | default: |
| gth646f | 0:b6451e68016a | 248 | LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14); |
| gth646f | 0:b6451e68016a | 249 | LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14); |
| gth646f | 0:b6451e68016a | 250 | break; |
| gth646f | 0:b6451e68016a | 251 | case p16://=p0.24 of LPC1768 |
| gth646f | 0:b6451e68016a | 252 | LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16); |
| gth646f | 0:b6451e68016a | 253 | LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16); |
| gth646f | 0:b6451e68016a | 254 | break; |
| gth646f | 0:b6451e68016a | 255 | case p17://=p0.25 of LPC1768 |
| gth646f | 0:b6451e68016a | 256 | LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18); |
| gth646f | 0:b6451e68016a | 257 | LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18); |
| gth646f | 0:b6451e68016a | 258 | break; |
| gth646f | 0:b6451e68016a | 259 | case p18://=p0.26 of LPC1768: |
| gth646f | 0:b6451e68016a | 260 | LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20); |
| gth646f | 0:b6451e68016a | 261 | LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20); |
| gth646f | 0:b6451e68016a | 262 | break; |
| gth646f | 0:b6451e68016a | 263 | case p19://=p1.30 of LPC1768 |
| gth646f | 0:b6451e68016a | 264 | LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28); |
| gth646f | 0:b6451e68016a | 265 | LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28); |
| gth646f | 0:b6451e68016a | 266 | break; |
| gth646f | 0:b6451e68016a | 267 | case p20://=p1.31 of LPC1768 |
| gth646f | 0:b6451e68016a | 268 | LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30); |
| gth646f | 0:b6451e68016a | 269 | LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30); |
| gth646f | 0:b6451e68016a | 270 | break; |
| gth646f | 0:b6451e68016a | 271 | } |
| gth646f | 0:b6451e68016a | 272 | LPC_ADC->ADCR &= ~(1 << chan); |
| gth646f | 0:b6451e68016a | 273 | } |
| gth646f | 0:b6451e68016a | 274 | } |
| gth646f | 0:b6451e68016a | 275 | //Return channel enabled/disabled state |
| gth646f | 0:b6451e68016a | 276 | int ADC::setup(PinName pin) { |
| gth646f | 0:b6451e68016a | 277 | int chan; |
| gth646f | 0:b6451e68016a | 278 | |
| gth646f | 0:b6451e68016a | 279 | chan = _pin_to_channel(pin); |
| gth646f | 0:b6451e68016a | 280 | return((LPC_ADC->ADCR & (1 << chan)) >> chan); |
| gth646f | 0:b6451e68016a | 281 | } |
| gth646f | 0:b6451e68016a | 282 | |
| gth646f | 0:b6451e68016a | 283 | //Select channel already setup |
| gth646f | 0:b6451e68016a | 284 | void ADC::select(PinName pin) { |
| gth646f | 0:b6451e68016a | 285 | int chan; |
| gth646f | 0:b6451e68016a | 286 | |
| gth646f | 0:b6451e68016a | 287 | //Only one channel can be selected at a time if not in burst mode |
| gth646f | 0:b6451e68016a | 288 | if (!burst()) LPC_ADC->ADCR &= ~0xFF; |
| gth646f | 0:b6451e68016a | 289 | //Select channel |
| gth646f | 0:b6451e68016a | 290 | chan = _pin_to_channel(pin); |
| gth646f | 0:b6451e68016a | 291 | LPC_ADC->ADCR |= (1 << chan); |
| gth646f | 0:b6451e68016a | 292 | } |
| gth646f | 0:b6451e68016a | 293 | |
| gth646f | 0:b6451e68016a | 294 | //Enable or disable burst mode |
| gth646f | 0:b6451e68016a | 295 | void ADC::burst(int state) { |
| gth646f | 0:b6451e68016a | 296 | if ((state & 1) == 1) { |
| gth646f | 0:b6451e68016a | 297 | if (startmode(0) != 0) |
| gth646f | 0:b6451e68016a | 298 | fprintf(stderr, "Warning. startmode is %u. Must be 0 for burst mode.\n", startmode(0)); |
| gth646f | 0:b6451e68016a | 299 | LPC_ADC->ADCR |= (1 << 16); |
| gth646f | 0:b6451e68016a | 300 | } |
| gth646f | 0:b6451e68016a | 301 | else |
| gth646f | 0:b6451e68016a | 302 | LPC_ADC->ADCR &= ~(1 << 16); |
| gth646f | 0:b6451e68016a | 303 | } |
| gth646f | 0:b6451e68016a | 304 | //Return burst mode state |
| gth646f | 0:b6451e68016a | 305 | int ADC::burst(void) { |
| gth646f | 0:b6451e68016a | 306 | return((LPC_ADC->ADCR & (1 << 16)) >> 16); |
| gth646f | 0:b6451e68016a | 307 | } |
| gth646f | 0:b6451e68016a | 308 | |
| gth646f | 0:b6451e68016a | 309 | //Set startmode and edge |
| gth646f | 0:b6451e68016a | 310 | void ADC::startmode(int mode, int edge) { |
| gth646f | 0:b6451e68016a | 311 | int lpc_adc_temp; |
| gth646f | 0:b6451e68016a | 312 | |
| gth646f | 0:b6451e68016a | 313 | //Reset start mode and edge bit, |
| gth646f | 0:b6451e68016a | 314 | lpc_adc_temp = LPC_ADC->ADCR & ~(0x0F << 24); |
| gth646f | 0:b6451e68016a | 315 | //Write with new values |
| gth646f | 0:b6451e68016a | 316 | lpc_adc_temp |= ((mode & 7) << 24) | ((edge & 1) << 27); |
| gth646f | 0:b6451e68016a | 317 | LPC_ADC->ADCR = lpc_adc_temp; |
| gth646f | 0:b6451e68016a | 318 | } |
| gth646f | 0:b6451e68016a | 319 | |
| gth646f | 0:b6451e68016a | 320 | //Return startmode state according to mode_edge=0: mode and mode_edge=1: edge |
| gth646f | 0:b6451e68016a | 321 | int ADC::startmode(int mode_edge){ |
| gth646f | 0:b6451e68016a | 322 | switch (mode_edge) { |
| gth646f | 0:b6451e68016a | 323 | case 0: |
| gth646f | 0:b6451e68016a | 324 | default: |
| gth646f | 0:b6451e68016a | 325 | return((LPC_ADC->ADCR >> 24) & 0x07); |
| gth646f | 0:b6451e68016a | 326 | case 1: |
| gth646f | 0:b6451e68016a | 327 | return((LPC_ADC->ADCR >> 27) & 0x01); |
| gth646f | 0:b6451e68016a | 328 | } |
| gth646f | 0:b6451e68016a | 329 | } |
| gth646f | 0:b6451e68016a | 330 | |
| gth646f | 0:b6451e68016a | 331 | //Start ADC conversion |
| gth646f | 0:b6451e68016a | 332 | void ADC::start(void) { |
| gth646f | 0:b6451e68016a | 333 | startmode(1,0); |
| gth646f | 0:b6451e68016a | 334 | } |
| gth646f | 0:b6451e68016a | 335 | |
| gth646f | 0:b6451e68016a | 336 | |
| gth646f | 0:b6451e68016a | 337 | //Set interrupt enable/disable for pin to state |
| gth646f | 0:b6451e68016a | 338 | void ADC::interrupt_state(PinName pin, int state) { |
| gth646f | 0:b6451e68016a | 339 | int chan; |
| gth646f | 0:b6451e68016a | 340 | |
| gth646f | 0:b6451e68016a | 341 | chan = _pin_to_channel(pin); |
| gth646f | 0:b6451e68016a | 342 | if (state == 1) { |
| gth646f | 0:b6451e68016a | 343 | LPC_ADC->ADINTEN &= ~0x100; |
| gth646f | 0:b6451e68016a | 344 | LPC_ADC->ADINTEN |= 1 << chan; |
| gth646f | 0:b6451e68016a | 345 | /* Enable the ADC Interrupt */ |
| gth646f | 0:b6451e68016a | 346 | NVIC_EnableIRQ(ADC_IRQn); |
| gth646f | 0:b6451e68016a | 347 | } else { |
| gth646f | 0:b6451e68016a | 348 | LPC_ADC->ADINTEN &= ~( 1 << chan ); |
| gth646f | 0:b6451e68016a | 349 | //Disable interrrupt if no active pins left |
| gth646f | 0:b6451e68016a | 350 | if ((LPC_ADC->ADINTEN & 0xFF) == 0) |
| gth646f | 0:b6451e68016a | 351 | NVIC_DisableIRQ(ADC_IRQn); |
| gth646f | 0:b6451e68016a | 352 | } |
| gth646f | 0:b6451e68016a | 353 | } |
| gth646f | 0:b6451e68016a | 354 | |
| gth646f | 0:b6451e68016a | 355 | //Return enable/disable state of interrupt for pin |
| gth646f | 0:b6451e68016a | 356 | int ADC::interrupt_state(PinName pin) { |
| gth646f | 0:b6451e68016a | 357 | int chan; |
| gth646f | 0:b6451e68016a | 358 | |
| gth646f | 0:b6451e68016a | 359 | chan = _pin_to_channel(pin); |
| gth646f | 0:b6451e68016a | 360 | return((LPC_ADC->ADINTEN >> chan) & 0x01); |
| gth646f | 0:b6451e68016a | 361 | } |
| gth646f | 0:b6451e68016a | 362 | |
| gth646f | 0:b6451e68016a | 363 | |
| gth646f | 0:b6451e68016a | 364 | //Attach custom interrupt handler replacing default |
| gth646f | 0:b6451e68016a | 365 | void ADC::attach(void(*fptr)(void)) { |
| gth646f | 0:b6451e68016a | 366 | //* Attach IRQ |
| gth646f | 0:b6451e68016a | 367 | NVIC_SetVector(ADC_IRQn, (uint32_t)fptr); |
| gth646f | 0:b6451e68016a | 368 | } |
| gth646f | 0:b6451e68016a | 369 | |
| gth646f | 0:b6451e68016a | 370 | //Restore default interrupt handler |
| gth646f | 0:b6451e68016a | 371 | void ADC::detach(void) { |
| gth646f | 0:b6451e68016a | 372 | //* Attach IRQ |
| gth646f | 0:b6451e68016a | 373 | instance = this; |
| gth646f | 0:b6451e68016a | 374 | NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr); |
| gth646f | 0:b6451e68016a | 375 | } |
| gth646f | 0:b6451e68016a | 376 | |
| gth646f | 0:b6451e68016a | 377 | |
| gth646f | 0:b6451e68016a | 378 | //Append interrupt handler for pin to function isr |
| gth646f | 0:b6451e68016a | 379 | void ADC::append(PinName pin, void(*fptr)(uint32_t value)) { |
| gth646f | 0:b6451e68016a | 380 | int chan; |
| gth646f | 0:b6451e68016a | 381 | |
| gth646f | 0:b6451e68016a | 382 | chan = _pin_to_channel(pin); |
| gth646f | 0:b6451e68016a | 383 | _adc_isr[chan] = fptr; |
| gth646f | 0:b6451e68016a | 384 | } |
| gth646f | 0:b6451e68016a | 385 | |
| gth646f | 0:b6451e68016a | 386 | //Append interrupt handler for pin to function isr |
| gth646f | 0:b6451e68016a | 387 | void ADC::unappend(PinName pin) { |
| gth646f | 0:b6451e68016a | 388 | int chan; |
| gth646f | 0:b6451e68016a | 389 | |
| gth646f | 0:b6451e68016a | 390 | chan = _pin_to_channel(pin); |
| gth646f | 0:b6451e68016a | 391 | _adc_isr[chan] = NULL; |
| gth646f | 0:b6451e68016a | 392 | } |
| gth646f | 0:b6451e68016a | 393 | |
| gth646f | 0:b6451e68016a | 394 | //Unappend global interrupt handler to function isr |
| gth646f | 0:b6451e68016a | 395 | void ADC::append(void(*fptr)(int chan, uint32_t value)) { |
| gth646f | 0:b6451e68016a | 396 | _adc_g_isr = fptr; |
| gth646f | 0:b6451e68016a | 397 | } |
| gth646f | 0:b6451e68016a | 398 | |
| gth646f | 0:b6451e68016a | 399 | //Detach global interrupt handler to function isr |
| gth646f | 0:b6451e68016a | 400 | void ADC::unappend() { |
| gth646f | 0:b6451e68016a | 401 | _adc_g_isr = NULL; |
| gth646f | 0:b6451e68016a | 402 | } |
| gth646f | 0:b6451e68016a | 403 | |
| gth646f | 0:b6451e68016a | 404 | //Set ADC offset |
| gth646f | 0:b6451e68016a | 405 | void offset(int offset) { |
| gth646f | 0:b6451e68016a | 406 | LPC_ADC->ADTRM &= ~(0x07 << 4); |
| gth646f | 0:b6451e68016a | 407 | LPC_ADC->ADTRM |= (offset & 0x07) << 4; |
| gth646f | 0:b6451e68016a | 408 | } |
| gth646f | 0:b6451e68016a | 409 | |
| gth646f | 0:b6451e68016a | 410 | //Return current ADC offset |
| gth646f | 0:b6451e68016a | 411 | int offset(void) { |
| gth646f | 0:b6451e68016a | 412 | return((LPC_ADC->ADTRM >> 4) & 0x07); |
| gth646f | 0:b6451e68016a | 413 | } |
| gth646f | 0:b6451e68016a | 414 | |
| gth646f | 0:b6451e68016a | 415 | //Return value of ADC on pin |
| gth646f | 0:b6451e68016a | 416 | int ADC::read(PinName pin) { |
| gth646f | 0:b6451e68016a | 417 | //Reset DONE and OVERRUN flags of interrupt handled ADC data |
| gth646f | 0:b6451e68016a | 418 | _adc_data[_pin_to_channel(pin)] &= ~(((uint32_t)0x01 << 31) | ((uint32_t)0x01 << 30)); |
| gth646f | 0:b6451e68016a | 419 | //Return value |
| gth646f | 0:b6451e68016a | 420 | return((_data_of_pin(pin) >> 4) & 0xFFF); |
| gth646f | 0:b6451e68016a | 421 | } |
| gth646f | 0:b6451e68016a | 422 | |
| gth646f | 0:b6451e68016a | 423 | //Return DONE flag of ADC on pin |
| gth646f | 0:b6451e68016a | 424 | int ADC::done(PinName pin) { |
| gth646f | 0:b6451e68016a | 425 | return((_data_of_pin(pin) >> 31) & 0x01); |
| gth646f | 0:b6451e68016a | 426 | } |
| gth646f | 0:b6451e68016a | 427 | |
| gth646f | 0:b6451e68016a | 428 | //Return OVERRUN flag of ADC on pin |
| gth646f | 0:b6451e68016a | 429 | int ADC::overrun(PinName pin) { |
| gth646f | 0:b6451e68016a | 430 | return((_data_of_pin(pin) >> 30) & 0x01); |
| gth646f | 0:b6451e68016a | 431 | } |
| gth646f | 0:b6451e68016a | 432 | |
| gth646f | 0:b6451e68016a | 433 | int ADC::actual_adc_clock(void) { |
| gth646f | 0:b6451e68016a | 434 | return(_adc_clk_freq); |
| gth646f | 0:b6451e68016a | 435 | } |
| gth646f | 0:b6451e68016a | 436 | |
| gth646f | 0:b6451e68016a | 437 | int ADC::actual_sample_rate(void) { |
| gth646f | 0:b6451e68016a | 438 | return(_adc_clk_freq / CLKS_PER_SAMPLE); |
| gth646f | 0:b6451e68016a | 439 | } |