Kev Mann / mbed-dev-OS5_10_4

RTC auf true

hal/mbed_itm_api.c@0:38ceb79fef03, 2018-11-28 (annotated)

Committer:
kevman
Date:
Wed Nov 28 15:10:15 2018 +0000
Revision:
0:38ceb79fef03
RTC modified

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kevman 0:38ceb79fef03 1 /* mbed Microcontroller Library
kevman 0:38ceb79fef03 2 * Copyright (c) 2017 ARM Limited
kevman 0:38ceb79fef03 3 *
kevman 0:38ceb79fef03 4 * Licensed under the Apache License, Version 2.0 (the "License");
kevman 0:38ceb79fef03 5 * you may not use this file except in compliance with the License.
kevman 0:38ceb79fef03 6 * You may obtain a copy of the License at
kevman 0:38ceb79fef03 7 *
kevman 0:38ceb79fef03 8 * http://www.apache.org/licenses/LICENSE-2.0
kevman 0:38ceb79fef03 9 *
kevman 0:38ceb79fef03 10 * Unless required by applicable law or agreed to in writing, software
kevman 0:38ceb79fef03 11 * distributed under the License is distributed on an "AS IS" BASIS,
kevman 0:38ceb79fef03 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kevman 0:38ceb79fef03 13 * See the License for the specific language governing permissions and
kevman 0:38ceb79fef03 14 * limitations under the License.
kevman 0:38ceb79fef03 15 */
kevman 0:38ceb79fef03 16
kevman 0:38ceb79fef03 17 #if defined(DEVICE_ITM)
kevman 0:38ceb79fef03 18
kevman 0:38ceb79fef03 19 #include "hal/itm_api.h"
kevman 0:38ceb79fef03 20 #include "cmsis.h"
kevman 0:38ceb79fef03 21
kevman 0:38ceb79fef03 22 #include <stdbool.h>
kevman 0:38ceb79fef03 23
kevman 0:38ceb79fef03 24 #ifndef ITM_STIM_FIFOREADY_Msk
kevman 0:38ceb79fef03 25 #define ITM_STIM_FIFOREADY_Msk 1
kevman 0:38ceb79fef03 26 #endif
kevman 0:38ceb79fef03 27
kevman 0:38ceb79fef03 28 #define ITM_ENABLE_WRITE 0xC5ACCE55
kevman 0:38ceb79fef03 29
kevman 0:38ceb79fef03 30 #define SWO_NRZ 0x02
kevman 0:38ceb79fef03 31 #define SWO_STIMULUS_PORT 0x01
kevman 0:38ceb79fef03 32
kevman 0:38ceb79fef03 33 void mbed_itm_init(void)
kevman 0:38ceb79fef03 34 {
kevman 0:38ceb79fef03 35 static bool do_init = true;
kevman 0:38ceb79fef03 36
kevman 0:38ceb79fef03 37 if (do_init) {
kevman 0:38ceb79fef03 38 do_init = false;
kevman 0:38ceb79fef03 39
kevman 0:38ceb79fef03 40 itm_init();
kevman 0:38ceb79fef03 41
kevman 0:38ceb79fef03 42 /* Enable write access to ITM registers. */
kevman 0:38ceb79fef03 43 ITM->LAR = ITM_ENABLE_WRITE;
kevman 0:38ceb79fef03 44
kevman 0:38ceb79fef03 45 /* Trace Port Interface Selected Pin Protocol Register. */
kevman 0:38ceb79fef03 46 TPI->SPPR = (SWO_NRZ << TPI_SPPR_TXMODE_Pos);
kevman 0:38ceb79fef03 47
kevman 0:38ceb79fef03 48 /* Trace Port Interface Formatter and Flush Control Register */
kevman 0:38ceb79fef03 49 TPI->FFCR = (1 << TPI_FFCR_TrigIn_Pos);
kevman 0:38ceb79fef03 50
kevman 0:38ceb79fef03 51 /* Data Watchpoint and Trace Control Register */
kevman 0:38ceb79fef03 52 DWT->CTRL = (1 << DWT_CTRL_CYCTAP_Pos) |
kevman 0:38ceb79fef03 53 (0xF << DWT_CTRL_POSTINIT_Pos) |
kevman 0:38ceb79fef03 54 (0xF << DWT_CTRL_POSTPRESET_Pos) |
kevman 0:38ceb79fef03 55 (1 << DWT_CTRL_CYCCNTENA_Pos);
kevman 0:38ceb79fef03 56
kevman 0:38ceb79fef03 57 /* Trace Privilege Register.
kevman 0:38ceb79fef03 58 * Disable access to trace channel configuration from non-privileged mode.
kevman 0:38ceb79fef03 59 */
kevman 0:38ceb79fef03 60 ITM->TPR = 0x0;
kevman 0:38ceb79fef03 61
kevman 0:38ceb79fef03 62 /* Trace Control Register */
kevman 0:38ceb79fef03 63 ITM->TCR = (1 << ITM_TCR_TraceBusID_Pos) |
kevman 0:38ceb79fef03 64 (1 << ITM_TCR_DWTENA_Pos) |
kevman 0:38ceb79fef03 65 (1 << ITM_TCR_SYNCENA_Pos) |
kevman 0:38ceb79fef03 66 (1 << ITM_TCR_ITMENA_Pos);
kevman 0:38ceb79fef03 67
kevman 0:38ceb79fef03 68 /* Trace Enable Register */
kevman 0:38ceb79fef03 69 ITM->TER = SWO_STIMULUS_PORT;
kevman 0:38ceb79fef03 70 }
kevman 0:38ceb79fef03 71 }
kevman 0:38ceb79fef03 72
kevman 0:38ceb79fef03 73 static void itm_out8(uint32_t port, uint8_t data)
kevman 0:38ceb79fef03 74 {
kevman 0:38ceb79fef03 75 /* Wait until port is available */
kevman 0:38ceb79fef03 76 while ((ITM->PORT[port].u32 & ITM_STIM_FIFOREADY_Msk) == 0) {
kevman 0:38ceb79fef03 77 __NOP();
kevman 0:38ceb79fef03 78 }
kevman 0:38ceb79fef03 79
kevman 0:38ceb79fef03 80 /* write data to port */
kevman 0:38ceb79fef03 81 ITM->PORT[port].u8 = data;
kevman 0:38ceb79fef03 82 }
kevman 0:38ceb79fef03 83
kevman 0:38ceb79fef03 84 static void itm_out32(uint32_t port, uint32_t data)
kevman 0:38ceb79fef03 85 {
kevman 0:38ceb79fef03 86 /* Wait until port is available */
kevman 0:38ceb79fef03 87 while ((ITM->PORT[port].u32 & ITM_STIM_FIFOREADY_Msk) == 0) {
kevman 0:38ceb79fef03 88 __NOP();
kevman 0:38ceb79fef03 89 }
kevman 0:38ceb79fef03 90
kevman 0:38ceb79fef03 91 /* write data to port */
kevman 0:38ceb79fef03 92 ITM->PORT[port].u32 = data;
kevman 0:38ceb79fef03 93 }
kevman 0:38ceb79fef03 94
kevman 0:38ceb79fef03 95 uint32_t mbed_itm_send(uint32_t port, uint32_t data)
kevman 0:38ceb79fef03 96 {
kevman 0:38ceb79fef03 97 /* Check if ITM and port is enabled */
kevman 0:38ceb79fef03 98 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
kevman 0:38ceb79fef03 99 ((ITM->TER & (1UL << port)) != 0UL)) { /* ITM Port enabled */
kevman 0:38ceb79fef03 100 itm_out32(port, data);
kevman 0:38ceb79fef03 101 }
kevman 0:38ceb79fef03 102
kevman 0:38ceb79fef03 103 return data;
kevman 0:38ceb79fef03 104 }
kevman 0:38ceb79fef03 105
kevman 0:38ceb79fef03 106 void mbed_itm_send_block(uint32_t port, const void *data, size_t len)
kevman 0:38ceb79fef03 107 {
kevman 0:38ceb79fef03 108 const char *ptr = data;
kevman 0:38ceb79fef03 109
kevman 0:38ceb79fef03 110 /* Check if ITM and port is enabled */
kevman 0:38ceb79fef03 111 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
kevman 0:38ceb79fef03 112 ((ITM->TER & (1UL << port)) != 0UL)) { /* ITM Port enabled */
kevman 0:38ceb79fef03 113 /* Output single byte at a time until data is aligned */
kevman 0:38ceb79fef03 114 while ((((uintptr_t) ptr) & 3) && len != 0) {
kevman 0:38ceb79fef03 115 itm_out8(port, *ptr++);
kevman 0:38ceb79fef03 116 len--;
kevman 0:38ceb79fef03 117 }
kevman 0:38ceb79fef03 118
kevman 0:38ceb79fef03 119 /* Output bulk of data one word at a time */
kevman 0:38ceb79fef03 120 while (len >= 4) {
kevman 0:38ceb79fef03 121 itm_out32(port, *(const uint32_t *) ptr);
kevman 0:38ceb79fef03 122 ptr += 4;
kevman 0:38ceb79fef03 123 len -= 4;
kevman 0:38ceb79fef03 124 }
kevman 0:38ceb79fef03 125
kevman 0:38ceb79fef03 126 /* Output any trailing bytes */
kevman 0:38ceb79fef03 127 while (len != 0) {
kevman 0:38ceb79fef03 128 itm_out8(port, *ptr++);
kevman 0:38ceb79fef03 129 len--;
kevman 0:38ceb79fef03 130 }
kevman 0:38ceb79fef03 131 }
kevman 0:38ceb79fef03 132 }
kevman 0:38ceb79fef03 133 #endif // defined(DEVICE_ITM)