Kev Mann / mbed-dev-OS5_10_4

RTC auf true

components/802_15_4_RF/atmel-rf-driver/source/AT86RFReg.h@2:7aab896b1a3b, 2019-03-13 (annotated)

Committer:
kevman
Date:
Wed Mar 13 11:03:24 2019 +0000
Revision:
2:7aab896b1a3b
2019-03-13

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kevman 2:7aab896b1a3b 1 /*
kevman 2:7aab896b1a3b 2 * Copyright (c) 2014-2015 ARM Limited. All rights reserved.
kevman 2:7aab896b1a3b 3 * SPDX-License-Identifier: Apache-2.0
kevman 2:7aab896b1a3b 4 * Licensed under the Apache License, Version 2.0 (the License); you may
kevman 2:7aab896b1a3b 5 * not use this file except in compliance with the License.
kevman 2:7aab896b1a3b 6 * You may obtain a copy of the License at
kevman 2:7aab896b1a3b 7 *
kevman 2:7aab896b1a3b 8 * http://www.apache.org/licenses/LICENSE-2.0
kevman 2:7aab896b1a3b 9 *
kevman 2:7aab896b1a3b 10 * Unless required by applicable law or agreed to in writing, software
kevman 2:7aab896b1a3b 11 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
kevman 2:7aab896b1a3b 12 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kevman 2:7aab896b1a3b 13 * See the License for the specific language governing permissions and
kevman 2:7aab896b1a3b 14 * limitations under the License.
kevman 2:7aab896b1a3b 15 */
kevman 2:7aab896b1a3b 16
kevman 2:7aab896b1a3b 17 #ifndef AT86RFREG_H_
kevman 2:7aab896b1a3b 18 #define AT86RFREG_H_
kevman 2:7aab896b1a3b 19 #ifdef __cplusplus
kevman 2:7aab896b1a3b 20 extern "C" {
kevman 2:7aab896b1a3b 21 #endif
kevman 2:7aab896b1a3b 22
kevman 2:7aab896b1a3b 23 /*AT86RF212 PHY Modes*/
kevman 2:7aab896b1a3b 24 #define BPSK_20 0x00
kevman 2:7aab896b1a3b 25 #define BPSK_40 0x04
kevman 2:7aab896b1a3b 26 #define BPSK_40_ALT 0x14
kevman 2:7aab896b1a3b 27 #define OQPSK_SIN_RC_100 0x08
kevman 2:7aab896b1a3b 28 #define OQPSK_SIN_RC_200 0x09
kevman 2:7aab896b1a3b 29 #define OQPSK_RC_100 0x18
kevman 2:7aab896b1a3b 30 #define OQPSK_RC_200 0x19
kevman 2:7aab896b1a3b 31 #define OQPSK_SIN_250 0x0c
kevman 2:7aab896b1a3b 32 #define OQPSK_SIN_500 0x0d
kevman 2:7aab896b1a3b 33 #define OQPSK_SIN_500_ALT 0x0f
kevman 2:7aab896b1a3b 34 #define OQPSK_RC_250 0x1c
kevman 2:7aab896b1a3b 35 #define OQPSK_RC_500 0x1d
kevman 2:7aab896b1a3b 36 #define OQPSK_RC_500_ALT 0x1f
kevman 2:7aab896b1a3b 37 #define OQPSK_SIN_RC_400_SCR_ON 0x2A
kevman 2:7aab896b1a3b 38 #define OQPSK_SIN_RC_400_SCR_OFF 0x0A
kevman 2:7aab896b1a3b 39 #define OQPSK_RC_400_SCR_ON 0x3A
kevman 2:7aab896b1a3b 40 #define OQPSK_RC_400_SCR_OFF 0x1A
kevman 2:7aab896b1a3b 41 #define OQPSK_SIN_1000_SCR_ON 0x2E
kevman 2:7aab896b1a3b 42 #define OQPSK_SIN_1000_SCR_OFF 0x0E
kevman 2:7aab896b1a3b 43 #define OQPSK_RC_1000_SCR_ON 0x3E
kevman 2:7aab896b1a3b 44 #define OQPSK_RC_1000_SCR_OFF 0x1E
kevman 2:7aab896b1a3b 45
kevman 2:7aab896b1a3b 46 /*Supported transceivers*/
kevman 2:7aab896b1a3b 47 #define PART_AT86RF231 0x03
kevman 2:7aab896b1a3b 48 #define PART_AT86RF212 0x07
kevman 2:7aab896b1a3b 49 #define PART_AT86RF233 0x0B
kevman 2:7aab896b1a3b 50 #define VERSION_AT86RF212 0x01
kevman 2:7aab896b1a3b 51 #define VERSION_AT86RF212B 0x03
kevman 2:7aab896b1a3b 52
kevman 2:7aab896b1a3b 53 /*RF Configuration Registers*/
kevman 2:7aab896b1a3b 54 #define TRX_STATUS 0x01
kevman 2:7aab896b1a3b 55 #define TRX_STATE 0x02
kevman 2:7aab896b1a3b 56 #define TRX_CTRL_0 0x03
kevman 2:7aab896b1a3b 57 #define TRX_CTRL_1 0x04
kevman 2:7aab896b1a3b 58 #define PHY_TX_PWR 0x05
kevman 2:7aab896b1a3b 59 #define PHY_RSSI 0x06
kevman 2:7aab896b1a3b 60 #define PHY_ED_LEVEL 0x07
kevman 2:7aab896b1a3b 61 #define PHY_CC_CCA 0x08
kevman 2:7aab896b1a3b 62 #define RX_CTRL 0x0A
kevman 2:7aab896b1a3b 63 #define SFD_VALUE 0x0B
kevman 2:7aab896b1a3b 64 #define TRX_CTRL_2 0x0C
kevman 2:7aab896b1a3b 65 #define ANT_DIV 0x0D
kevman 2:7aab896b1a3b 66 #define IRQ_MASK 0x0E
kevman 2:7aab896b1a3b 67 #define IRQ_STATUS 0x0F
kevman 2:7aab896b1a3b 68 #define VREG_CTRL 0x10
kevman 2:7aab896b1a3b 69 #define BATMON 0x11
kevman 2:7aab896b1a3b 70 #define XOSC_CTRL 0x12
kevman 2:7aab896b1a3b 71 #define CC_CTRL_0 0x13
kevman 2:7aab896b1a3b 72 #define CC_CTRL_1 0x14
kevman 2:7aab896b1a3b 73 #define RX_SYN 0x15
kevman 2:7aab896b1a3b 74 #define TRX_RPC 0x16
kevman 2:7aab896b1a3b 75 #define RF_CTRL_0 0x16
kevman 2:7aab896b1a3b 76 #define XAH_CTRL_1 0x17
kevman 2:7aab896b1a3b 77 #define FTN_CTRL 0x18
kevman 2:7aab896b1a3b 78 #define PLL_CF 0x1A
kevman 2:7aab896b1a3b 79 #define PLL_DCU 0x1B
kevman 2:7aab896b1a3b 80 #define PART_NUM 0x1C
kevman 2:7aab896b1a3b 81 #define VERSION_NUM 0x1D
kevman 2:7aab896b1a3b 82 #define MAN_ID_0 0x1E
kevman 2:7aab896b1a3b 83 #define MAN_ID_1 0x1F
kevman 2:7aab896b1a3b 84 #define SHORT_ADDR_0 0x20
kevman 2:7aab896b1a3b 85 #define SHORT_ADDR_1 0x21
kevman 2:7aab896b1a3b 86 #define PAN_ID_0 0x22
kevman 2:7aab896b1a3b 87 #define PAN_ID_1 0x23
kevman 2:7aab896b1a3b 88 #define IEEE_ADDR_0 0x24
kevman 2:7aab896b1a3b 89 #define IEEE_ADDR_1 0x25
kevman 2:7aab896b1a3b 90 #define IEEE_ADDR_2 0x26
kevman 2:7aab896b1a3b 91 #define IEEE_ADDR_3 0x27
kevman 2:7aab896b1a3b 92 #define IEEE_ADDR_4 0x28
kevman 2:7aab896b1a3b 93 #define IEEE_ADDR_5 0x29
kevman 2:7aab896b1a3b 94 #define IEEE_ADDR_6 0x2A
kevman 2:7aab896b1a3b 95 #define IEEE_ADDR_7 0x2B
kevman 2:7aab896b1a3b 96 #define XAH_CTRL_0 0x2C
kevman 2:7aab896b1a3b 97 #define CSMA_SEED_0 0x2D
kevman 2:7aab896b1a3b 98 #define CSMA_SEED_1 0x2E
kevman 2:7aab896b1a3b 99 #define CSMA_BE 0x2F
kevman 2:7aab896b1a3b 100
kevman 2:7aab896b1a3b 101 /* CSMA_SEED_1*/
kevman 2:7aab896b1a3b 102 #define AACK_FVN_MODE1 7
kevman 2:7aab896b1a3b 103 #define AACK_FVN_MODE0 6
kevman 2:7aab896b1a3b 104 #define AACK_SET_PD 5
kevman 2:7aab896b1a3b 105 #define AACK_DIS_ACK 4
kevman 2:7aab896b1a3b 106 #define AACK_I_AM_COORD 3
kevman 2:7aab896b1a3b 107 #define CSMA_SEED_12 2
kevman 2:7aab896b1a3b 108 #define CSMA_SEED_11 1
kevman 2:7aab896b1a3b 109 #define CSMA_SEED_10 0
kevman 2:7aab896b1a3b 110
kevman 2:7aab896b1a3b 111 /*TRX_STATUS bits*/
kevman 2:7aab896b1a3b 112 #define CCA_STATUS 0x40
kevman 2:7aab896b1a3b 113 #define CCA_DONE 0x80
kevman 2:7aab896b1a3b 114
kevman 2:7aab896b1a3b 115 /*PHY_CC_CCA bits*/
kevman 2:7aab896b1a3b 116 #define CCA_REQUEST 0x80
kevman 2:7aab896b1a3b 117 #define CCA_MODE_3A 0x00
kevman 2:7aab896b1a3b 118 #define CCA_MODE_1 0x20
kevman 2:7aab896b1a3b 119 #define CCA_MODE_2 0x40
kevman 2:7aab896b1a3b 120 #define CCA_MODE_3B 0x60
kevman 2:7aab896b1a3b 121 #define CCA_MODE_MASK 0x60
kevman 2:7aab896b1a3b 122 #define CCA_CHANNEL_MASK 0x1F
kevman 2:7aab896b1a3b 123
kevman 2:7aab896b1a3b 124 /*IRQ_MASK bits*/
kevman 2:7aab896b1a3b 125 #define RX_START 0x04
kevman 2:7aab896b1a3b 126 #define TRX_END 0x08
kevman 2:7aab896b1a3b 127 #define CCA_ED_DONE 0x10
kevman 2:7aab896b1a3b 128 #define AMI 0x20
kevman 2:7aab896b1a3b 129 #define TRX_UR 0x40
kevman 2:7aab896b1a3b 130
kevman 2:7aab896b1a3b 131 /*ANT_DIV bits*/
kevman 2:7aab896b1a3b 132 #define ANT_DIV_EN 0x08
kevman 2:7aab896b1a3b 133 #define ANT_EXT_SW_EN 0x04
kevman 2:7aab896b1a3b 134 #define ANT_CTRL_DEFAULT 0x03
kevman 2:7aab896b1a3b 135
kevman 2:7aab896b1a3b 136 /*TRX_CTRL_1 bits*/
kevman 2:7aab896b1a3b 137 #define PA_EXT_EN 0x80
kevman 2:7aab896b1a3b 138 #define TX_AUTO_CRC_ON 0x20
kevman 2:7aab896b1a3b 139 #define SPI_CMD_MODE_TRX_STATUS 0x04
kevman 2:7aab896b1a3b 140 #define SPI_CMD_MODE_PHY_RSSI 0x08
kevman 2:7aab896b1a3b 141 #define SPI_CMD_MODE_IRQ_STATUS 0x0C
kevman 2:7aab896b1a3b 142
kevman 2:7aab896b1a3b 143 /*TRX_CTRL_2 bits*/
kevman 2:7aab896b1a3b 144 #define RX_SAFE_MODE 0x80
kevman 2:7aab896b1a3b 145
kevman 2:7aab896b1a3b 146 /*FTN_CTRL bits*/
kevman 2:7aab896b1a3b 147 #define FTN_START 0x80
kevman 2:7aab896b1a3b 148
kevman 2:7aab896b1a3b 149 /*PHY_RSSI bits*/
kevman 2:7aab896b1a3b 150 #define CRC_VALID 0x80
kevman 2:7aab896b1a3b 151
kevman 2:7aab896b1a3b 152 /*RX_SYN bits*/
kevman 2:7aab896b1a3b 153 #define RX_PDT_DIS 0x80
kevman 2:7aab896b1a3b 154
kevman 2:7aab896b1a3b 155 /*TRX_RPC bits */
kevman 2:7aab896b1a3b 156 #define RX_RPC_CTRL 0xC0
kevman 2:7aab896b1a3b 157 #define RX_RPC_EN 0x20
kevman 2:7aab896b1a3b 158 #define PDT_RPC_EN 0x10
kevman 2:7aab896b1a3b 159 #define PLL_RPC_EN 0x08
kevman 2:7aab896b1a3b 160 #define XAH_TX_RPC_EN 0x04
kevman 2:7aab896b1a3b 161 #define IPAN_RPC_EN 0x02
kevman 2:7aab896b1a3b 162 #define TRX_RPC_RSVD_1 0x01
kevman 2:7aab896b1a3b 163
kevman 2:7aab896b1a3b 164 /*XAH_CTRL_1 bits*/
kevman 2:7aab896b1a3b 165 #define AACK_PROM_MODE 0x02
kevman 2:7aab896b1a3b 166
kevman 2:7aab896b1a3b 167
kevman 2:7aab896b1a3b 168 #ifdef __cplusplus
kevman 2:7aab896b1a3b 169 }
kevman 2:7aab896b1a3b 170 #endif
kevman 2:7aab896b1a3b 171
kevman 2:7aab896b1a3b 172 #endif /* AT86RFREG_H_ */