hadif azli / Mbed 2 deprecated TEST123

Dependencies:   mbed Blynk

Committer:
lixianyu
Date:
Mon Jun 13 02:21:11 2016 +0000
Revision:
1:0e75de2a5d21
Parent:
0:d8f4c441e032
u8glib???????????????????????????Adafruit_GFX????OLED????????bitmap??????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lixianyu 0:d8f4c441e032 1 /*
lixianyu 0:d8f4c441e032 2
lixianyu 0:d8f4c441e032 3 u8g_dev_t6963_240x64.c
lixianyu 0:d8f4c441e032 4
lixianyu 0:d8f4c441e032 5 Tested with Varitronix MGLS240128TZ
lixianyu 0:d8f4c441e032 6
lixianyu 0:d8f4c441e032 7 Universal 8bit Graphics Library
lixianyu 0:d8f4c441e032 8
lixianyu 0:d8f4c441e032 9 Copyright (c) 2013, olikraus@gmail.com
lixianyu 0:d8f4c441e032 10 All rights reserved.
lixianyu 0:d8f4c441e032 11
lixianyu 0:d8f4c441e032 12 Redistribution and use in source and binary forms, with or without modification,
lixianyu 0:d8f4c441e032 13 are permitted provided that the following conditions are met:
lixianyu 0:d8f4c441e032 14
lixianyu 0:d8f4c441e032 15 * Redistributions of source code must retain the above copyright notice, this list
lixianyu 0:d8f4c441e032 16 of conditions and the following disclaimer.
lixianyu 0:d8f4c441e032 17
lixianyu 0:d8f4c441e032 18 * Redistributions in binary form must reproduce the above copyright notice, this
lixianyu 0:d8f4c441e032 19 list of conditions and the following disclaimer in the documentation and/or other
lixianyu 0:d8f4c441e032 20 materials provided with the distribution.
lixianyu 0:d8f4c441e032 21
lixianyu 0:d8f4c441e032 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
lixianyu 0:d8f4c441e032 23 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
lixianyu 0:d8f4c441e032 24 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
lixianyu 0:d8f4c441e032 25 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lixianyu 0:d8f4c441e032 26 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
lixianyu 0:d8f4c441e032 27 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
lixianyu 0:d8f4c441e032 28 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
lixianyu 0:d8f4c441e032 29 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
lixianyu 0:d8f4c441e032 30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lixianyu 0:d8f4c441e032 31 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
lixianyu 0:d8f4c441e032 32 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
lixianyu 0:d8f4c441e032 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
lixianyu 0:d8f4c441e032 34 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lixianyu 0:d8f4c441e032 35
lixianyu 0:d8f4c441e032 36
lixianyu 0:d8f4c441e032 37 Application Notes for the MGLS 240x128
lixianyu 0:d8f4c441e032 38 www.baso.no/content/pdf/T6963C_Application.pdf
lixianyu 0:d8f4c441e032 39
lixianyu 0:d8f4c441e032 40 Hitachi App Notes:
lixianyu 0:d8f4c441e032 41 https://www.sparkfun.com/datasheets/LCD/Monochrome/AN-029-Toshiba_T6963C.pdf
lixianyu 0:d8f4c441e032 42
lixianyu 0:d8f4c441e032 43 Notes:
lixianyu 0:d8f4c441e032 44 The font selection pins should generate the 8x8 font.
lixianyu 0:d8f4c441e032 45 For the MGLS240128TZ only FS1 is available on pin 18.
lixianyu 0:d8f4c441e032 46 FS1 must be low to generate the 8x8 font.
lixianyu 0:d8f4c441e032 47
lixianyu 0:d8f4c441e032 48
lixianyu 0:d8f4c441e032 49 */
lixianyu 0:d8f4c441e032 50
lixianyu 0:d8f4c441e032 51 #include "u8g.h"
lixianyu 0:d8f4c441e032 52
lixianyu 0:d8f4c441e032 53 #define WIDTH 240
lixianyu 0:d8f4c441e032 54 #define HEIGHT 64
lixianyu 0:d8f4c441e032 55 #define PAGE_HEIGHT 16
lixianyu 0:d8f4c441e032 56
lixianyu 0:d8f4c441e032 57
lixianyu 0:d8f4c441e032 58 /*
lixianyu 0:d8f4c441e032 59 http://www.mark-products.com/graphics.htm#240x64%20Pixel%20Format
lixianyu 0:d8f4c441e032 60 */
lixianyu 0:d8f4c441e032 61
lixianyu 0:d8f4c441e032 62 /* text is not used, so settings are not relevant */
lixianyu 0:d8f4c441e032 63 static const uint8_t u8g_dev_t6963_240x64_init_seq[] PROGMEM = {
lixianyu 0:d8f4c441e032 64 U8G_ESC_CS(0), /* disable chip */
lixianyu 0:d8f4c441e032 65 U8G_ESC_ADR(0), /* data mode */
lixianyu 0:d8f4c441e032 66 U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
lixianyu 0:d8f4c441e032 67
lixianyu 0:d8f4c441e032 68 U8G_ESC_CS(1), /* enable chip */
lixianyu 0:d8f4c441e032 69 U8G_ESC_DLY(50), /* delay 50 ms */
lixianyu 0:d8f4c441e032 70
lixianyu 0:d8f4c441e032 71 U8G_ESC_ADR(0), /* data mode */
lixianyu 0:d8f4c441e032 72 0x000, /* low byte */
lixianyu 0:d8f4c441e032 73 0x000, /* height byte */
lixianyu 0:d8f4c441e032 74 U8G_ESC_ADR(1), /* instruction mode */
lixianyu 0:d8f4c441e032 75 0x021, /* set cursor position */
lixianyu 0:d8f4c441e032 76
lixianyu 0:d8f4c441e032 77 U8G_ESC_ADR(0), /* data mode */
lixianyu 0:d8f4c441e032 78 0x000, /* low byte */
lixianyu 0:d8f4c441e032 79 0x000, /* height byte */
lixianyu 0:d8f4c441e032 80 U8G_ESC_ADR(1), /* instruction mode */
lixianyu 0:d8f4c441e032 81 0x022, /* set offset */
lixianyu 0:d8f4c441e032 82
lixianyu 0:d8f4c441e032 83 U8G_ESC_ADR(0), /* data mode */
lixianyu 0:d8f4c441e032 84 0x000, /* low byte */
lixianyu 0:d8f4c441e032 85 0x000, /* height byte */
lixianyu 0:d8f4c441e032 86 U8G_ESC_ADR(1), /* instruction mode */
lixianyu 0:d8f4c441e032 87 0x040, /* text home */
lixianyu 0:d8f4c441e032 88
lixianyu 0:d8f4c441e032 89 U8G_ESC_ADR(0), /* data mode */
lixianyu 0:d8f4c441e032 90 WIDTH/8, /* low byte */
lixianyu 0:d8f4c441e032 91 0x000, /* height byte */
lixianyu 0:d8f4c441e032 92 U8G_ESC_ADR(1), /* instruction mode */
lixianyu 0:d8f4c441e032 93 0x041, /* text columns */
lixianyu 0:d8f4c441e032 94
lixianyu 0:d8f4c441e032 95 U8G_ESC_ADR(0), /* data mode */
lixianyu 0:d8f4c441e032 96 0x000, /* low byte */
lixianyu 0:d8f4c441e032 97 0x000, /* height byte */
lixianyu 0:d8f4c441e032 98 U8G_ESC_ADR(1), /* instruction mode */
lixianyu 0:d8f4c441e032 99 0x042, /* graphics home */
lixianyu 0:d8f4c441e032 100
lixianyu 0:d8f4c441e032 101 U8G_ESC_ADR(0), /* data mode */
lixianyu 0:d8f4c441e032 102 WIDTH/8, /* low byte */
lixianyu 0:d8f4c441e032 103 0x000, /* height byte */
lixianyu 0:d8f4c441e032 104 U8G_ESC_ADR(1), /* instruction mode */
lixianyu 0:d8f4c441e032 105 0x043, /* graphics columns */
lixianyu 0:d8f4c441e032 106
lixianyu 0:d8f4c441e032 107 // mode set
lixianyu 0:d8f4c441e032 108 // 0x080: Internal CG, OR Mode
lixianyu 0:d8f4c441e032 109 // 0x081: Internal CG, EXOR Mode
lixianyu 0:d8f4c441e032 110 // 0x083: Internal CG, AND Mode
lixianyu 0:d8f4c441e032 111 // 0x088: External CG, OR Mode
lixianyu 0:d8f4c441e032 112 // 0x089: External CG, EXOR Mode
lixianyu 0:d8f4c441e032 113 // 0x08B: External CG, AND Mode
lixianyu 0:d8f4c441e032 114 U8G_ESC_ADR(1), /* instruction mode */
lixianyu 0:d8f4c441e032 115 0x080, /* mode register: OR Mode, Internal Character Mode */
lixianyu 0:d8f4c441e032 116
lixianyu 0:d8f4c441e032 117 U8G_ESC_ADR(1), /* instruction mode */
lixianyu 0:d8f4c441e032 118 // display mode
lixianyu 0:d8f4c441e032 119 // 0x090: Display off
lixianyu 0:d8f4c441e032 120 // 0x094: Graphic off, text on, cursor off, blink off
lixianyu 0:d8f4c441e032 121 // 0x096: Graphic off, text on, cursor on, blink off
lixianyu 0:d8f4c441e032 122 // 0x097: Graphic off, text on, cursor on, blink on
lixianyu 0:d8f4c441e032 123 // 0x098: Graphic on, text off, cursor off, blink off
lixianyu 0:d8f4c441e032 124 // 0x09a: Graphic on, text off, cursor on, blink off
lixianyu 0:d8f4c441e032 125 // ...
lixianyu 0:d8f4c441e032 126 // 0x09c: Graphic on, text on, cursor off, blink off
lixianyu 0:d8f4c441e032 127 // 0x09f: Graphic on, text on, cursor on, blink on
lixianyu 0:d8f4c441e032 128 0x098, /* mode register: Display Mode, Graphics on, Text off, Cursor off */
lixianyu 0:d8f4c441e032 129
lixianyu 0:d8f4c441e032 130 U8G_ESC_ADR(0), /* data mode */
lixianyu 0:d8f4c441e032 131 0x000, /* low byte */
lixianyu 0:d8f4c441e032 132 0x000, /* height byte */
lixianyu 0:d8f4c441e032 133 U8G_ESC_ADR(1), /* instruction mode */
lixianyu 0:d8f4c441e032 134 0x024, /* set adr pointer */
lixianyu 0:d8f4c441e032 135
lixianyu 0:d8f4c441e032 136
lixianyu 0:d8f4c441e032 137 U8G_ESC_DLY(100), /* delay 100 ms */
lixianyu 0:d8f4c441e032 138
lixianyu 0:d8f4c441e032 139 U8G_ESC_ADR(0), /* data mode */
lixianyu 0:d8f4c441e032 140 U8G_ESC_CS(0), /* disable chip */
lixianyu 0:d8f4c441e032 141 U8G_ESC_END /* end of sequence */
lixianyu 0:d8f4c441e032 142 };
lixianyu 0:d8f4c441e032 143
lixianyu 0:d8f4c441e032 144 uint8_t u8g_dev_t6963_240x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
lixianyu 0:d8f4c441e032 145 {
lixianyu 0:d8f4c441e032 146 switch(msg)
lixianyu 0:d8f4c441e032 147 {
lixianyu 0:d8f4c441e032 148 case U8G_DEV_MSG_INIT:
lixianyu 0:d8f4c441e032 149 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE);
lixianyu 0:d8f4c441e032 150 u8g_WriteEscSeqP(u8g, dev, u8g_dev_t6963_240x64_init_seq);
lixianyu 0:d8f4c441e032 151 break;
lixianyu 0:d8f4c441e032 152 case U8G_DEV_MSG_STOP:
lixianyu 0:d8f4c441e032 153 break;
lixianyu 0:d8f4c441e032 154 case U8G_DEV_MSG_PAGE_NEXT:
lixianyu 0:d8f4c441e032 155 {
lixianyu 0:d8f4c441e032 156 uint8_t y, i;
lixianyu 0:d8f4c441e032 157 uint16_t disp_ram_adr;
lixianyu 0:d8f4c441e032 158 uint8_t *ptr;
lixianyu 0:d8f4c441e032 159 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
lixianyu 0:d8f4c441e032 160
lixianyu 0:d8f4c441e032 161
lixianyu 0:d8f4c441e032 162 u8g_SetAddress(u8g, dev, 0); /* data mode */
lixianyu 0:d8f4c441e032 163 u8g_SetChipSelect(u8g, dev, 1);
lixianyu 0:d8f4c441e032 164 y = pb->p.page_y0;
lixianyu 0:d8f4c441e032 165 ptr = pb->buf;
lixianyu 0:d8f4c441e032 166 disp_ram_adr = WIDTH/8;
lixianyu 0:d8f4c441e032 167 disp_ram_adr *= y;
lixianyu 0:d8f4c441e032 168 for( i = 0; i < PAGE_HEIGHT; i ++ )
lixianyu 0:d8f4c441e032 169 {
lixianyu 0:d8f4c441e032 170 u8g_SetAddress(u8g, dev, 0); /* data mode */
lixianyu 0:d8f4c441e032 171 u8g_WriteByte(u8g, dev, disp_ram_adr&255 ); /* address low byte */
lixianyu 0:d8f4c441e032 172 u8g_WriteByte(u8g, dev, disp_ram_adr>>8 ); /* address hight byte */
lixianyu 0:d8f4c441e032 173 u8g_SetAddress(u8g, dev, 1); /* cmd mode */
lixianyu 0:d8f4c441e032 174 u8g_WriteByte(u8g, dev, 0x024 ); /* set adr ptr */
lixianyu 0:d8f4c441e032 175
lixianyu 0:d8f4c441e032 176 u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
lixianyu 0:d8f4c441e032 177
lixianyu 0:d8f4c441e032 178 ptr += WIDTH/8;
lixianyu 0:d8f4c441e032 179 disp_ram_adr += WIDTH/8;
lixianyu 0:d8f4c441e032 180 }
lixianyu 0:d8f4c441e032 181 u8g_SetAddress(u8g, dev, 0); /* data mode */
lixianyu 0:d8f4c441e032 182 u8g_SetChipSelect(u8g, dev, 0);
lixianyu 0:d8f4c441e032 183 }
lixianyu 0:d8f4c441e032 184 break;
lixianyu 0:d8f4c441e032 185 }
lixianyu 0:d8f4c441e032 186 return u8g_dev_pb16h1_base_fn(u8g, dev, msg, arg);
lixianyu 0:d8f4c441e032 187 }
lixianyu 0:d8f4c441e032 188
lixianyu 0:d8f4c441e032 189 // U8G_PB_DEV(u8g_dev_t6963_240x64_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_t6963_240x64_fn, U8G_COM_T6963);
lixianyu 0:d8f4c441e032 190
lixianyu 0:d8f4c441e032 191 uint8_t u8g_dev_t6963_240x64_2x_bw_buf[WIDTH/8*PAGE_HEIGHT] U8G_NOCOMMON ;
lixianyu 0:d8f4c441e032 192 u8g_pb_t u8g_dev_t6963_240x64_2x_bw_pb = { {PAGE_HEIGHT, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_t6963_240x64_2x_bw_buf};
lixianyu 0:d8f4c441e032 193 u8g_dev_t u8g_dev_t6963_240x64_8bit = { u8g_dev_t6963_240x64_fn, &u8g_dev_t6963_240x64_2x_bw_pb, U8G_COM_T6963 };
lixianyu 0:d8f4c441e032 194
lixianyu 0:d8f4c441e032 195
lixianyu 0:d8f4c441e032 196