hadif azli / Mbed 2 deprecated TEST123

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Dependencies:   mbed Blynk

u8glibARM/u8g_dev_pcd8544_84x48.c@1:0e75de2a5d21, 2016-06-13 (annotated)

Committer:
lixianyu
Date:
Mon Jun 13 02:21:11 2016 +0000
Revision:
1:0e75de2a5d21
Parent:
0:d8f4c441e032 
u8glib???????????????????????????Adafruit_GFX????OLED????????bitmap??????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lixianyu 0:d8f4c441e032 1 /*
lixianyu 0:d8f4c441e032 2
lixianyu 0:d8f4c441e032 3 u8g_dev_pcd8544_84x48.c
lixianyu 0:d8f4c441e032 4
lixianyu 0:d8f4c441e032 5 Display: Nokia 84x48
lixianyu 0:d8f4c441e032 6
lixianyu 0:d8f4c441e032 7 Status: Tested with PCF8812 Display
lixianyu 0:d8f4c441e032 8
lixianyu 0:d8f4c441e032 9
lixianyu 0:d8f4c441e032 10 Universal 8bit Graphics Library
lixianyu 0:d8f4c441e032 11
lixianyu 0:d8f4c441e032 12 Copyright (c) 2011, olikraus@gmail.com
lixianyu 0:d8f4c441e032 13 All rights reserved.
lixianyu 0:d8f4c441e032 14
lixianyu 0:d8f4c441e032 15 Redistribution and use in source and binary forms, with or without modification,
lixianyu 0:d8f4c441e032 16 are permitted provided that the following conditions are met:
lixianyu 0:d8f4c441e032 17
lixianyu 0:d8f4c441e032 18 * Redistributions of source code must retain the above copyright notice, this list
lixianyu 0:d8f4c441e032 19 of conditions and the following disclaimer.
lixianyu 0:d8f4c441e032 20
lixianyu 0:d8f4c441e032 21 * Redistributions in binary form must reproduce the above copyright notice, this
lixianyu 0:d8f4c441e032 22 list of conditions and the following disclaimer in the documentation and/or other
lixianyu 0:d8f4c441e032 23 materials provided with the distribution.
lixianyu 0:d8f4c441e032 24
lixianyu 0:d8f4c441e032 25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
lixianyu 0:d8f4c441e032 26 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
lixianyu 0:d8f4c441e032 27 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
lixianyu 0:d8f4c441e032 28 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lixianyu 0:d8f4c441e032 29 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
lixianyu 0:d8f4c441e032 30 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
lixianyu 0:d8f4c441e032 31 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
lixianyu 0:d8f4c441e032 32 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
lixianyu 0:d8f4c441e032 33 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lixianyu 0:d8f4c441e032 34 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
lixianyu 0:d8f4c441e032 35 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
lixianyu 0:d8f4c441e032 36 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
lixianyu 0:d8f4c441e032 37 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lixianyu 0:d8f4c441e032 38
lixianyu 0:d8f4c441e032 39
lixianyu 0:d8f4c441e032 40 */
lixianyu 0:d8f4c441e032 41
lixianyu 0:d8f4c441e032 42 #include "u8g.h"
lixianyu 0:d8f4c441e032 43
lixianyu 0:d8f4c441e032 44 #define WIDTH 84
lixianyu 0:d8f4c441e032 45 #define HEIGHT 48
lixianyu 0:d8f4c441e032 46 #define PAGE_HEIGHT 8
lixianyu 0:d8f4c441e032 47
lixianyu 0:d8f4c441e032 48
lixianyu 0:d8f4c441e032 49 static const uint8_t u8g_dev_pcd8544_init_seq[] PROGMEM = {
lixianyu 0:d8f4c441e032 50 U8G_ESC_CS(0), /* disable chip */
lixianyu 0:d8f4c441e032 51 U8G_ESC_ADR(0), /* instruction mode */
lixianyu 0:d8f4c441e032 52 U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
lixianyu 0:d8f4c441e032 53 U8G_ESC_CS(1), /* enable chip */
lixianyu 0:d8f4c441e032 54 0x021, /* activate chip (PD=0), horizontal increment (V=0), enter extended command set (H=1) */
lixianyu 0:d8f4c441e032 55 0x006, /* temp. control: b10 = 2 */
lixianyu 0:d8f4c441e032 56 0x013, /* bias system 1:48 */
lixianyu 0:d8f4c441e032 57 0x0c0, /* medium Vop */
lixianyu 0:d8f4c441e032 58 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
lixianyu 0:d8f4c441e032 59 0x00c, /* display on, normal operation */
lixianyu 0:d8f4c441e032 60 U8G_ESC_DLY(100), /* delay 100 ms */
lixianyu 0:d8f4c441e032 61 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
lixianyu 0:d8f4c441e032 62 0x00d, /* display on, invert */
lixianyu 0:d8f4c441e032 63 U8G_ESC_DLY(100), /* delay 100 ms */
lixianyu 0:d8f4c441e032 64 U8G_ESC_DLY(100), /* delay 100 ms */
lixianyu 0:d8f4c441e032 65 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
lixianyu 0:d8f4c441e032 66 0x00c, /* display on, normal */
lixianyu 0:d8f4c441e032 67 U8G_ESC_DLY(100), /* delay 100 ms */
lixianyu 0:d8f4c441e032 68 U8G_ESC_CS(0), /* disable chip */
lixianyu 0:d8f4c441e032 69 U8G_ESC_END /* end of sequence */
lixianyu 0:d8f4c441e032 70 };
lixianyu 0:d8f4c441e032 71
lixianyu 0:d8f4c441e032 72
lixianyu 0:d8f4c441e032 73 static const uint8_t u8g_dev_pcd8544_sleep_on[] PROGMEM = {
lixianyu 0:d8f4c441e032 74 U8G_ESC_ADR(0), /* instruction mode */
lixianyu 0:d8f4c441e032 75 U8G_ESC_CS(1), /* enable chip */
lixianyu 0:d8f4c441e032 76
lixianyu 0:d8f4c441e032 77 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
lixianyu 0:d8f4c441e032 78 0x00c, /* display on, normal */
lixianyu 0:d8f4c441e032 79 U8G_ESC_CS(0), /* disable chip, bugfix 12 nov 2014 */
lixianyu 0:d8f4c441e032 80 U8G_ESC_END /* end of sequence */
lixianyu 0:d8f4c441e032 81 };
lixianyu 0:d8f4c441e032 82
lixianyu 0:d8f4c441e032 83 static const uint8_t u8g_dev_pcd8544_sleep_off[] PROGMEM = {
lixianyu 0:d8f4c441e032 84 U8G_ESC_ADR(0), /* instruction mode */
lixianyu 0:d8f4c441e032 85 U8G_ESC_CS(1), /* enable chip */
lixianyu 0:d8f4c441e032 86 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
lixianyu 0:d8f4c441e032 87 0x008, /* display blank */
lixianyu 0:d8f4c441e032 88 0x024, /* power down (PD=1), horizontal increment (V=0), enter normal command set (H=0) */
lixianyu 0:d8f4c441e032 89
lixianyu 0:d8f4c441e032 90 U8G_ESC_DLY(50), /* delay 50 ms */
lixianyu 0:d8f4c441e032 91 U8G_ESC_CS(0), /* disable chip, bugfix 12 nov 2014 */
lixianyu 0:d8f4c441e032 92 U8G_ESC_END /* end of sequence */
lixianyu 0:d8f4c441e032 93 };
lixianyu 0:d8f4c441e032 94
lixianyu 0:d8f4c441e032 95
lixianyu 0:d8f4c441e032 96 uint8_t u8g_dev_pcd8544_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
lixianyu 0:d8f4c441e032 97 {
lixianyu 0:d8f4c441e032 98 switch(msg)
lixianyu 0:d8f4c441e032 99 {
lixianyu 0:d8f4c441e032 100 case U8G_DEV_MSG_INIT:
lixianyu 0:d8f4c441e032 101 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
lixianyu 0:d8f4c441e032 102 u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcd8544_init_seq);
lixianyu 0:d8f4c441e032 103 break;
lixianyu 0:d8f4c441e032 104 case U8G_DEV_MSG_STOP:
lixianyu 0:d8f4c441e032 105 break;
lixianyu 0:d8f4c441e032 106 case U8G_DEV_MSG_PAGE_NEXT:
lixianyu 0:d8f4c441e032 107 {
lixianyu 0:d8f4c441e032 108 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
lixianyu 0:d8f4c441e032 109 u8g_SetAddress(u8g, dev, 0); /* command mode */
lixianyu 0:d8f4c441e032 110 u8g_SetChipSelect(u8g, dev, 1);
lixianyu 0:d8f4c441e032 111 u8g_WriteByte(u8g, dev, 0x020 ); /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
lixianyu 0:d8f4c441e032 112 u8g_WriteByte(u8g, dev, 0x080 ); /* set X address */
lixianyu 0:d8f4c441e032 113 u8g_WriteByte(u8g, dev, 0x040 | pb->p.page); /* set Y address */
lixianyu 0:d8f4c441e032 114 u8g_SetAddress(u8g, dev, 1); /* data mode */
lixianyu 0:d8f4c441e032 115 if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
lixianyu 0:d8f4c441e032 116 return 0;
lixianyu 0:d8f4c441e032 117 u8g_SetChipSelect(u8g, dev, 0);
lixianyu 0:d8f4c441e032 118 }
lixianyu 0:d8f4c441e032 119 break;
lixianyu 0:d8f4c441e032 120 case U8G_DEV_MSG_CONTRAST:
lixianyu 0:d8f4c441e032 121 /* the contrast adjustment does not work, needs to be analysed */
lixianyu 0:d8f4c441e032 122 u8g_SetAddress(u8g, dev, 0); /* instruction mode */
lixianyu 0:d8f4c441e032 123 u8g_SetChipSelect(u8g, dev, 1);
lixianyu 0:d8f4c441e032 124 u8g_WriteByte(u8g, dev, 0x021); /* command mode, extended function set */
lixianyu 0:d8f4c441e032 125 u8g_WriteByte(u8g, dev, 0x080 | ( (*(uint8_t *)arg) >> 1 ) );
lixianyu 0:d8f4c441e032 126 u8g_SetChipSelect(u8g, dev, 0);
lixianyu 0:d8f4c441e032 127 return 1;
lixianyu 0:d8f4c441e032 128 case U8G_DEV_MSG_SLEEP_ON:
lixianyu 0:d8f4c441e032 129 u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcd8544_sleep_on);
lixianyu 0:d8f4c441e032 130 return 1;
lixianyu 0:d8f4c441e032 131 case U8G_DEV_MSG_SLEEP_OFF:
lixianyu 0:d8f4c441e032 132 u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcd8544_sleep_off);
lixianyu 0:d8f4c441e032 133 return 1;
lixianyu 0:d8f4c441e032 134 }
lixianyu 0:d8f4c441e032 135 return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
lixianyu 0:d8f4c441e032 136 }
lixianyu 0:d8f4c441e032 137
lixianyu 0:d8f4c441e032 138
lixianyu 0:d8f4c441e032 139 U8G_PB_DEV(u8g_dev_pcd8544_84x48_sw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_pcd8544_fn, U8G_COM_SW_SPI);
lixianyu 0:d8f4c441e032 140 U8G_PB_DEV(u8g_dev_pcd8544_84x48_hw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_pcd8544_fn, U8G_COM_HW_SPI);
lixianyu 0:d8f4c441e032 141
lixianyu 0:d8f4c441e032 142