hadif azli / Mbed 2 deprecated TEST123

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Dependencies:   mbed Blynk

u8glibARM/u8g_dev_st7920_192x32.c@1:0e75de2a5d21, 2016-06-13 (annotated)

Committer:
lixianyu
Date:
Mon Jun 13 02:21:11 2016 +0000
Revision:
1:0e75de2a5d21
Parent:
0:d8f4c441e032 
u8glib???????????????????????????Adafruit_GFX????OLED????????bitmap??????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lixianyu 0:d8f4c441e032 1 /*
lixianyu 0:d8f4c441e032 2
lixianyu 0:d8f4c441e032 3 u8g_dev_st7920_192x32.c
lixianyu 0:d8f4c441e032 4
lixianyu 0:d8f4c441e032 5 Universal 8bit Graphics Library
lixianyu 0:d8f4c441e032 6
lixianyu 0:d8f4c441e032 7 Copyright (c) 2011, olikraus@gmail.com
lixianyu 0:d8f4c441e032 8 All rights reserved.
lixianyu 0:d8f4c441e032 9
lixianyu 0:d8f4c441e032 10 Redistribution and use in source and binary forms, with or without modification,
lixianyu 0:d8f4c441e032 11 are permitted provided that the following conditions are met:
lixianyu 0:d8f4c441e032 12
lixianyu 0:d8f4c441e032 13 * Redistributions of source code must retain the above copyright notice, this list
lixianyu 0:d8f4c441e032 14 of conditions and the following disclaimer.
lixianyu 0:d8f4c441e032 15
lixianyu 0:d8f4c441e032 16 * Redistributions in binary form must reproduce the above copyright notice, this
lixianyu 0:d8f4c441e032 17 list of conditions and the following disclaimer in the documentation and/or other
lixianyu 0:d8f4c441e032 18 materials provided with the distribution.
lixianyu 0:d8f4c441e032 19
lixianyu 0:d8f4c441e032 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
lixianyu 0:d8f4c441e032 21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
lixianyu 0:d8f4c441e032 22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
lixianyu 0:d8f4c441e032 23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lixianyu 0:d8f4c441e032 24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
lixianyu 0:d8f4c441e032 25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
lixianyu 0:d8f4c441e032 26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
lixianyu 0:d8f4c441e032 27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
lixianyu 0:d8f4c441e032 28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lixianyu 0:d8f4c441e032 29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
lixianyu 0:d8f4c441e032 30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
lixianyu 0:d8f4c441e032 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
lixianyu 0:d8f4c441e032 32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lixianyu 0:d8f4c441e032 33
lixianyu 0:d8f4c441e032 34
lixianyu 0:d8f4c441e032 35 */
lixianyu 0:d8f4c441e032 36
lixianyu 0:d8f4c441e032 37 #include "u8g.h"
lixianyu 0:d8f4c441e032 38
lixianyu 0:d8f4c441e032 39 #define WIDTH 192
lixianyu 0:d8f4c441e032 40 #define HEIGHT 32
lixianyu 0:d8f4c441e032 41
lixianyu 0:d8f4c441e032 42
lixianyu 0:d8f4c441e032 43 /* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
lixianyu 0:d8f4c441e032 44 static const uint8_t u8g_dev_st7920_192x32_init_seq[] PROGMEM = {
lixianyu 0:d8f4c441e032 45 U8G_ESC_CS(0), /* disable chip */
lixianyu 0:d8f4c441e032 46 U8G_ESC_ADR(0), /* instruction mode */
lixianyu 0:d8f4c441e032 47 U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
lixianyu 0:d8f4c441e032 48 U8G_ESC_DLY(100), /* 8 Dez 2012: additional delay 100 ms because of reset*/
lixianyu 0:d8f4c441e032 49 U8G_ESC_CS(1), /* enable chip */
lixianyu 0:d8f4c441e032 50 U8G_ESC_DLY(50), /* delay 50 ms */
lixianyu 0:d8f4c441e032 51
lixianyu 0:d8f4c441e032 52 0x038, /* 8 Bit interface (DL=1), basic instruction set (RE=0) */
lixianyu 0:d8f4c441e032 53 0x00c, /* display on, cursor & blink off; 0x08: all off */
lixianyu 0:d8f4c441e032 54 0x006, /* Entry mode: Cursor move to right ,DDRAM address counter (AC) plus 1, no shift */
lixianyu 0:d8f4c441e032 55 0x002, /* disable scroll, enable CGRAM adress */
lixianyu 0:d8f4c441e032 56 0x001, /* clear RAM, needs 1.6 ms */
lixianyu 0:d8f4c441e032 57 U8G_ESC_DLY(100), /* delay 10 ms */
lixianyu 0:d8f4c441e032 58
lixianyu 0:d8f4c441e032 59 U8G_ESC_CS(0), /* disable chip */
lixianyu 0:d8f4c441e032 60 U8G_ESC_END /* end of sequence */
lixianyu 0:d8f4c441e032 61 };
lixianyu 0:d8f4c441e032 62
lixianyu 0:d8f4c441e032 63 uint8_t u8g_dev_st7920_192x32_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
lixianyu 0:d8f4c441e032 64 {
lixianyu 0:d8f4c441e032 65 switch(msg)
lixianyu 0:d8f4c441e032 66 {
lixianyu 0:d8f4c441e032 67 case U8G_DEV_MSG_INIT:
lixianyu 0:d8f4c441e032 68 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
lixianyu 0:d8f4c441e032 69 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_192x32_init_seq);
lixianyu 0:d8f4c441e032 70 break;
lixianyu 0:d8f4c441e032 71 case U8G_DEV_MSG_STOP:
lixianyu 0:d8f4c441e032 72 break;
lixianyu 0:d8f4c441e032 73 case U8G_DEV_MSG_PAGE_NEXT:
lixianyu 0:d8f4c441e032 74 {
lixianyu 0:d8f4c441e032 75 uint8_t y, i;
lixianyu 0:d8f4c441e032 76 uint8_t *ptr;
lixianyu 0:d8f4c441e032 77 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
lixianyu 0:d8f4c441e032 78
lixianyu 0:d8f4c441e032 79 u8g_SetAddress(u8g, dev, 0); /* cmd mode */
lixianyu 0:d8f4c441e032 80 u8g_SetChipSelect(u8g, dev, 1);
lixianyu 0:d8f4c441e032 81 y = pb->p.page_y0;
lixianyu 0:d8f4c441e032 82 ptr = pb->buf;
lixianyu 0:d8f4c441e032 83 for( i = 0; i < 8; i ++ )
lixianyu 0:d8f4c441e032 84 {
lixianyu 0:d8f4c441e032 85 u8g_SetAddress(u8g, dev, 0); /* cmd mode */
lixianyu 0:d8f4c441e032 86 u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */
lixianyu 0:d8f4c441e032 87 u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */
lixianyu 0:d8f4c441e032 88 u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/
lixianyu 0:d8f4c441e032 89 u8g_SetAddress(u8g, dev, 1); /* data mode */
lixianyu 0:d8f4c441e032 90 u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
lixianyu 0:d8f4c441e032 91 ptr += WIDTH/8;
lixianyu 0:d8f4c441e032 92 y++;
lixianyu 0:d8f4c441e032 93 }
lixianyu 0:d8f4c441e032 94 u8g_SetChipSelect(u8g, dev, 0);
lixianyu 0:d8f4c441e032 95 }
lixianyu 0:d8f4c441e032 96 break;
lixianyu 0:d8f4c441e032 97 }
lixianyu 0:d8f4c441e032 98 return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
lixianyu 0:d8f4c441e032 99 }
lixianyu 0:d8f4c441e032 100
lixianyu 0:d8f4c441e032 101 uint8_t u8g_dev_st7920_192x32_4x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
lixianyu 0:d8f4c441e032 102 {
lixianyu 0:d8f4c441e032 103 switch(msg)
lixianyu 0:d8f4c441e032 104 {
lixianyu 0:d8f4c441e032 105 case U8G_DEV_MSG_INIT:
lixianyu 0:d8f4c441e032 106 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
lixianyu 0:d8f4c441e032 107 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_192x32_init_seq);
lixianyu 0:d8f4c441e032 108 break;
lixianyu 0:d8f4c441e032 109 case U8G_DEV_MSG_STOP:
lixianyu 0:d8f4c441e032 110 break;
lixianyu 0:d8f4c441e032 111 case U8G_DEV_MSG_PAGE_NEXT:
lixianyu 0:d8f4c441e032 112 {
lixianyu 0:d8f4c441e032 113 uint8_t y, i;
lixianyu 0:d8f4c441e032 114 uint8_t *ptr;
lixianyu 0:d8f4c441e032 115 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
lixianyu 0:d8f4c441e032 116
lixianyu 0:d8f4c441e032 117 u8g_SetAddress(u8g, dev, 0); /* cmd mode */
lixianyu 0:d8f4c441e032 118 u8g_SetChipSelect(u8g, dev, 1);
lixianyu 0:d8f4c441e032 119 y = pb->p.page_y0;
lixianyu 0:d8f4c441e032 120 ptr = pb->buf;
lixianyu 0:d8f4c441e032 121 for( i = 0; i < 32; i ++ )
lixianyu 0:d8f4c441e032 122 {
lixianyu 0:d8f4c441e032 123 u8g_SetAddress(u8g, dev, 0); /* cmd mode */
lixianyu 0:d8f4c441e032 124 u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */
lixianyu 0:d8f4c441e032 125 u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */
lixianyu 0:d8f4c441e032 126 u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/
lixianyu 0:d8f4c441e032 127 u8g_SetAddress(u8g, dev, 1); /* data mode */
lixianyu 0:d8f4c441e032 128 u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
lixianyu 0:d8f4c441e032 129 ptr += WIDTH/8;
lixianyu 0:d8f4c441e032 130 y++;
lixianyu 0:d8f4c441e032 131 }
lixianyu 0:d8f4c441e032 132 u8g_SetChipSelect(u8g, dev, 0);
lixianyu 0:d8f4c441e032 133 }
lixianyu 0:d8f4c441e032 134 break;
lixianyu 0:d8f4c441e032 135 }
lixianyu 0:d8f4c441e032 136 return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg);
lixianyu 0:d8f4c441e032 137 }
lixianyu 0:d8f4c441e032 138
lixianyu 0:d8f4c441e032 139
lixianyu 0:d8f4c441e032 140 U8G_PB_DEV(u8g_dev_st7920_192x32_sw_spi, WIDTH, HEIGHT, 8, u8g_dev_st7920_192x32_fn, U8G_COM_ST7920_SW_SPI);
lixianyu 0:d8f4c441e032 141 U8G_PB_DEV(u8g_dev_st7920_192x32_hw_spi, WIDTH, HEIGHT, 8, u8g_dev_st7920_192x32_fn, U8G_COM_ST7920_HW_SPI);
lixianyu 0:d8f4c441e032 142 U8G_PB_DEV(u8g_dev_st7920_192x32_8bit, WIDTH, HEIGHT, 8, u8g_dev_st7920_192x32_fn, U8G_COM_FAST_PARALLEL);
lixianyu 0:d8f4c441e032 143
lixianyu 0:d8f4c441e032 144
lixianyu 0:d8f4c441e032 145 #define QWIDTH (WIDTH*4)
lixianyu 0:d8f4c441e032 146 uint8_t u8g_dev_st7920_192x32_4x_buf[QWIDTH] U8G_NOCOMMON ;
lixianyu 0:d8f4c441e032 147 u8g_pb_t u8g_dev_st7920_192x32_4x_pb = { {32, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_st7920_192x32_4x_buf};
lixianyu 0:d8f4c441e032 148 u8g_dev_t u8g_dev_st7920_192x32_4x_sw_spi = { u8g_dev_st7920_192x32_4x_fn, &u8g_dev_st7920_192x32_4x_pb, U8G_COM_ST7920_SW_SPI };
lixianyu 0:d8f4c441e032 149 u8g_dev_t u8g_dev_st7920_192x32_4x_hw_spi = { u8g_dev_st7920_192x32_4x_fn, &u8g_dev_st7920_192x32_4x_pb, U8G_COM_ST7920_HW_SPI };
lixianyu 0:d8f4c441e032 150 u8g_dev_t u8g_dev_st7920_192x32_4x_8bit = { u8g_dev_st7920_192x32_4x_fn, &u8g_dev_st7920_192x32_4x_pb, U8G_COM_FAST_PARALLEL };
lixianyu 0:d8f4c441e032 151
lixianyu 0:d8f4c441e032 152