hadif azli / Mbed 2 deprecated TEST123

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Dependencies:   mbed Blynk

u8glibARM/u8g_dev_ks0108_128x64.c@1:0e75de2a5d21, 2016-06-13 (annotated)

Committer:
lixianyu
Date:
Mon Jun 13 02:21:11 2016 +0000
Revision:
1:0e75de2a5d21
Parent:
0:d8f4c441e032 
u8glib???????????????????????????Adafruit_GFX????OLED????????bitmap??????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lixianyu 0:d8f4c441e032 1 /*
lixianyu 0:d8f4c441e032 2
lixianyu 0:d8f4c441e032 3 u8g_dev_ks0108_128x64.c
lixianyu 0:d8f4c441e032 4
lixianyu 0:d8f4c441e032 5 Universal 8bit Graphics Library
lixianyu 0:d8f4c441e032 6
lixianyu 0:d8f4c441e032 7 Copyright (c) 2011, olikraus@gmail.com
lixianyu 0:d8f4c441e032 8 All rights reserved.
lixianyu 0:d8f4c441e032 9
lixianyu 0:d8f4c441e032 10 Redistribution and use in source and binary forms, with or without modification,
lixianyu 0:d8f4c441e032 11 are permitted provided that the following conditions are met:
lixianyu 0:d8f4c441e032 12
lixianyu 0:d8f4c441e032 13 * Redistributions of source code must retain the above copyright notice, this list
lixianyu 0:d8f4c441e032 14 of conditions and the following disclaimer.
lixianyu 0:d8f4c441e032 15
lixianyu 0:d8f4c441e032 16 * Redistributions in binary form must reproduce the above copyright notice, this
lixianyu 0:d8f4c441e032 17 list of conditions and the following disclaimer in the documentation and/or other
lixianyu 0:d8f4c441e032 18 materials provided with the distribution.
lixianyu 0:d8f4c441e032 19
lixianyu 0:d8f4c441e032 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
lixianyu 0:d8f4c441e032 21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
lixianyu 0:d8f4c441e032 22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
lixianyu 0:d8f4c441e032 23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lixianyu 0:d8f4c441e032 24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
lixianyu 0:d8f4c441e032 25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
lixianyu 0:d8f4c441e032 26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
lixianyu 0:d8f4c441e032 27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
lixianyu 0:d8f4c441e032 28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lixianyu 0:d8f4c441e032 29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
lixianyu 0:d8f4c441e032 30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
lixianyu 0:d8f4c441e032 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
lixianyu 0:d8f4c441e032 32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lixianyu 0:d8f4c441e032 33
lixianyu 0:d8f4c441e032 34
lixianyu 0:d8f4c441e032 35 ADDRESS = 0 (Command Mode)
lixianyu 0:d8f4c441e032 36 0x03f Display On
lixianyu 0:d8f4c441e032 37 0x0c0 Start Display at line 0
lixianyu 0:d8f4c441e032 38 0x040 | y write to y address (y:0..63)
lixianyu 0:d8f4c441e032 39 0x0b8 | x write to page [0..7]
lixianyu 0:d8f4c441e032 40
lixianyu 0:d8f4c441e032 41
lixianyu 0:d8f4c441e032 42 u8g_Init8Bit(u8g, dev, d0, d1, d2, d3, d4, d5, d6, d7, en, cs1, cs2, di, rw, reset)
lixianyu 0:d8f4c441e032 43 u8g_Init8Bit(u8g, dev, 8, 9, 10, 11, 4, 5, 6, 7, 18, 14, 15, 17, 16, U8G_PIN_NONE)
lixianyu 0:d8f4c441e032 44
lixianyu 0:d8f4c441e032 45 */
lixianyu 0:d8f4c441e032 46
lixianyu 0:d8f4c441e032 47 #include "u8g.h"
lixianyu 0:d8f4c441e032 48
lixianyu 0:d8f4c441e032 49 #define WIDTH 128
lixianyu 0:d8f4c441e032 50 #define HEIGHT 64
lixianyu 0:d8f4c441e032 51 #define PAGE_HEIGHT 8
lixianyu 0:d8f4c441e032 52
lixianyu 0:d8f4c441e032 53 static const uint8_t u8g_dev_ks0108_128x64_init_seq[] PROGMEM = {
lixianyu 0:d8f4c441e032 54 U8G_ESC_CS(0), /* disable chip */
lixianyu 0:d8f4c441e032 55 U8G_ESC_ADR(0), /* instruction mode */
lixianyu 0:d8f4c441e032 56 U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
lixianyu 0:d8f4c441e032 57 U8G_ESC_CS(1), /* enable chip 1 */
lixianyu 0:d8f4c441e032 58 0x03f, /* display on */
lixianyu 0:d8f4c441e032 59 0x0c0, /* start at line 0 */
lixianyu 0:d8f4c441e032 60 U8G_ESC_DLY(20), /* delay 20 ms */
lixianyu 0:d8f4c441e032 61 U8G_ESC_CS(2), /* enable chip 2 */
lixianyu 0:d8f4c441e032 62 0x03f, /* display on */
lixianyu 0:d8f4c441e032 63 0x0c0, /* start at line 0 */
lixianyu 0:d8f4c441e032 64 U8G_ESC_DLY(20), /* delay 20 ms */
lixianyu 0:d8f4c441e032 65 U8G_ESC_CS(0), /* disable all chips */
lixianyu 0:d8f4c441e032 66 U8G_ESC_END /* end of sequence */
lixianyu 0:d8f4c441e032 67 };
lixianyu 0:d8f4c441e032 68
lixianyu 0:d8f4c441e032 69
lixianyu 0:d8f4c441e032 70 uint8_t u8g_dev_ks0108_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
lixianyu 0:d8f4c441e032 71 {
lixianyu 0:d8f4c441e032 72
lixianyu 0:d8f4c441e032 73 switch(msg)
lixianyu 0:d8f4c441e032 74 {
lixianyu 0:d8f4c441e032 75 case U8G_DEV_MSG_INIT:
lixianyu 0:d8f4c441e032 76 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE);
lixianyu 0:d8f4c441e032 77 u8g_WriteEscSeqP(u8g, dev, u8g_dev_ks0108_128x64_init_seq);
lixianyu 0:d8f4c441e032 78 break;
lixianyu 0:d8f4c441e032 79 case U8G_DEV_MSG_STOP:
lixianyu 0:d8f4c441e032 80 break;
lixianyu 0:d8f4c441e032 81 case U8G_DEV_MSG_PAGE_NEXT:
lixianyu 0:d8f4c441e032 82 {
lixianyu 0:d8f4c441e032 83 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
lixianyu 0:d8f4c441e032 84
lixianyu 0:d8f4c441e032 85 u8g_SetAddress(u8g, dev, 0); /* command mode */
lixianyu 0:d8f4c441e032 86 u8g_SetChipSelect(u8g, dev, 2);
lixianyu 0:d8f4c441e032 87 u8g_WriteByte(u8g, dev, 0x0b8 | pb->p.page); /* select current page (KS0108b) */
lixianyu 0:d8f4c441e032 88 u8g_WriteByte(u8g, dev, 0x040 ); /* set address 0 */
lixianyu 0:d8f4c441e032 89 u8g_SetAddress(u8g, dev, 1); /* data mode */
lixianyu 0:d8f4c441e032 90 u8g_WriteSequence(u8g, dev, 64, pb->buf);
lixianyu 0:d8f4c441e032 91 u8g_SetChipSelect(u8g, dev, 0);
lixianyu 0:d8f4c441e032 92
lixianyu 0:d8f4c441e032 93 u8g_SetAddress(u8g, dev, 0); /* command mode */
lixianyu 0:d8f4c441e032 94 u8g_SetChipSelect(u8g, dev, 1);
lixianyu 0:d8f4c441e032 95 u8g_WriteByte(u8g, dev, 0x0b8 | pb->p.page); /* select current page (KS0108b) */
lixianyu 0:d8f4c441e032 96 u8g_WriteByte(u8g, dev, 0x040 ); /* set address 0 */
lixianyu 0:d8f4c441e032 97 u8g_SetAddress(u8g, dev, 1); /* data mode */
lixianyu 0:d8f4c441e032 98 u8g_WriteSequence(u8g, dev, 64, 64+(uint8_t *)pb->buf);
lixianyu 0:d8f4c441e032 99 u8g_SetChipSelect(u8g, dev, 0);
lixianyu 0:d8f4c441e032 100
lixianyu 0:d8f4c441e032 101 }
lixianyu 0:d8f4c441e032 102 break;
lixianyu 0:d8f4c441e032 103 }
lixianyu 0:d8f4c441e032 104 return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
lixianyu 0:d8f4c441e032 105 }
lixianyu 0:d8f4c441e032 106
lixianyu 0:d8f4c441e032 107 U8G_PB_DEV(u8g_dev_ks0108_128x64, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ks0108_128x64_fn, U8G_COM_PARALLEL);
lixianyu 0:d8f4c441e032 108 U8G_PB_DEV(u8g_dev_ks0108_128x64_fast, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ks0108_128x64_fn, U8G_COM_FAST_PARALLEL);
lixianyu 0:d8f4c441e032 109
lixianyu 0:d8f4c441e032 110
lixianyu 0:d8f4c441e032 111