Kenji Arai / mbed-os_TYBLE16

Dependents:   TYBLE16_simple_data_logger TYBLE16_MP3_Air

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Show/hide line numbers fpga_config.h Source File

fpga_config.h

00001 /*
00002  * Copyright (c) 2019, Arm Limited and affiliates.
00003  * SPDX-License-Identifier: Apache-2.0
00004  *
00005  * Licensed under the Apache License, Version 2.0 (the "License");
00006  * you may not use this file except in compliance with the License.
00007  * You may obtain a copy of the License at
00008  *
00009  * http://www.apache.org/licenses/LICENSE-2.0
00010  *
00011  * Unless required by applicable law or agreed to in writing, software
00012  * distributed under the License is distributed on an "AS IS" BASIS,
00013  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00014  * See the License for the specific language governing permissions and
00015  * limitations under the License.
00016  */
00017 
00018 #define TESTER_CLOCK_FREQUENCY_HZ                     100000000
00019 #define TESTER_CLOCK_PERIOD_NS                        10
00020 #define TESTER_CONTROL                                0x00000000
00021 #define TESTER_CONTROL_RESET                          0x00000000
00022 #define TESTER_CONTROL_RESET_PERIPHERALS              (1 << 0)
00023 #define TESTER_CONTROL_RESET_ALL                      (1 << 1)
00024 #define TESTER_CONTROL_REPROGRAM                      (1 << 2)
00025 #define TESTER_CONTROL_VERSION                        0x00000010
00026 #define TESTER_CONTROL_VERSION_SIZE                   4
00027 #define TESTER_REMAP                                  0x00001000
00028 #define TESTER_SYS_IO                                 0x00002000
00029 #define TESTER_SYS_IO_MODE                            (0x000 + 0x00002C00)
00030 #define TESTER_SYS_IO_MODE_DISABLED                   0
00031 #define TESTER_SYS_IO_MODE_SPI_SERIAL_FLASH           1
00032 #define TESTER_SYS_IO_MODE_I2C_IO_EXPANDER0           2
00033 #define TESTER_SYS_IO_MODE_I2C_IO_EXPANDER1           3
00034 #define TESTER_SYS_IO_MODE_I2C_IO_EXPANDER2           4
00035 #define TESTER_SYS_IO_PWM_ENABLE                      (0x001 + 0x00002C00)
00036 #define TESTER_SYS_IO_PWM_PERIOD                      (0x002 + 0x00002C00)
00037 #define TESTER_SYS_IO_PWM_CYCLES_HIGH                 (0x006 + 0x00002C00)
00038 #define TESTER_SYS_IO_AN_MUX_ANALOGIN_MEASUREMENT     (0x00A + 0x00002C00)
00039 #define TESTER_SYS_IO_NUM_POWER_SAMPLES               (0x00C + 0x00002C00)
00040 #define TESTER_SYS_IO_NUM_POWER_CYCLES                (0x010 + 0x00002C00)
00041 #define TESTER_SYS_IO_ADC_SNAPSHOT                    (0x018 + 0x00002C00)
00042 #define TESTER_SYS_IO_SAMPLE_ADC                      (0x019 + 0x00002C00)
00043 #define TESTER_SYS_IO_ANIN0_MEASUREMENT               (0x030 + 0x00002C00)
00044 #define TESTER_SYS_IO_ANIN0_MEASUREMENTS_SUM          (0x032 + 0x00002C00)
00045 #define TESTER_SYS_IO_ANIN1_MEASUREMENT               (0x03A + 0x00002C00)
00046 #define TESTER_SYS_IO_ANIN1_MEASUREMENTS_SUM          (0x03C + 0x00002C00)
00047 #define TESTER_SYS_IO_ANIN2_MEASUREMENT               (0x044 + 0x00002C00)
00048 #define TESTER_SYS_IO_ANIN2_MEASUREMENTS_SUM          (0x046 + 0x00002C00)
00049 #define TESTER_SYS_IO_ANIN3_MEASUREMENT               (0x04E + 0x00002C00)
00050 #define TESTER_SYS_IO_ANIN3_MEASUREMENTS_SUM          (0x050 + 0x00002C00)
00051 #define TESTER_PERIPHERAL                             0x00100000
00052 #define TESTER_PERIPHERAL_SELECT                      0x00100000
00053 #define TESTER_GPIO                                   0x00101000
00054 #define TESTER_SPI_MASTER                             0x00102000
00055 #define TESTER_SPI_MASTER_STARTS                      0x00102008
00056 #define TESTER_SPI_MASTER_STOPS                       0x00102009
00057 #define TESTER_SPI_MASTER_TRANSFERS                   0x0010200A
00058 #define TESTER_SPI_MASTER_TRANSFERS_SIZE              2
00059 #define TESTER_SPI_MASTER_START_STOP_STATS            0x0010200C
00060 #define TESTER_SPI_MASTER_START_STOP_STATS_SIZE       1
00061 #define TESTER_SPI_MASTER_TO_SLAVE_CHECKSUM           0x00102012
00062 #define TESTER_SPI_MASTER_TO_SLAVE_CHECKSUM_SIZE      4
00063 #define TESTER_SPI_MASTER_CTRL                        0x00102016
00064 #define TESTER_SPI_MASTER_CTRL_SIZE                   2
00065 #define TESTER_SPI_MASTER_HD_TX_CNT                   0x00102018
00066 #define TESTER_SPI_MASTER_HD_TX_CNT_SIZE              2
00067 #define TESTER_SPI_MASTER_HD_RX_CNT                   0x0010201A
00068 #define TESTER_SPI_MASTER_HD_RX_CNT_SIZE              2
00069 #define TESTER_SPI_MASTER_CS_TO_FIRST_SCLK_CNT        0x0010201C
00070 #define TESTER_SPI_MASTER_CS_TO_FIRST_SCLK_CNT_SIZE   4
00071 #define TESTER_SPI_MASTER_LAST_SCLK_TO_CS_CNT         0x00102020
00072 #define TESTER_SPI_MASTER_LAST_SCLK_TO_CS_CNT_SIZE    4
00073 #define TESTER_SPI_MASTER_CLK_MODE_OFFSET             0
00074 #define TESTER_SPI_MASTER_CLK_MODE_SIZE               2
00075 #define TESTER_SPI_MASTER_BIT_ORDER_OFFSET            2
00076 #define TESTER_SPI_MASTER_BIT_ORDER_SIZE              1
00077 #define TESTER_SPI_MASTER_DUPLEX_OFFSET               3
00078 #define TESTER_SPI_MASTER_DUPLEX_SIZE                 1
00079 #define TESTER_SPI_MASTER_SYM_SIZE_OFFSET             4
00080 #define TESTER_SPI_MASTER_SYM_SIZE_SIZE               6
00081 #define TESTER_SPI_SLAVE                              0x00106000
00082 #define TESTER_SPI_SLAVE_STARTS                       0x00106008
00083 #define TESTER_SPI_SLAVE_STOPS                        0x00106009
00084 #define TESTER_SPI_SLAVE_TRANSFERS                    0x0010600A
00085 #define TESTER_SPI_SLAVE_TRANSFERS_SIZE               2
00086 #define TESTER_SPI_SLAVE_TO_MASTER_CHECKSUM           0x00106015
00087 #define TESTER_SPI_SLAVE_TO_MASTER_CHECKSUM_SIZE      4
00088 #define TESTER_SPI_SLAVE_CTRL                         0x00106019
00089 #define TESTER_SPI_SLAVE_CTRL_SIZE                    2
00090 #define TESTER_SPI_SLAVE_HD_TX_CNT                    0x0010601B
00091 #define TESTER_SPI_SLAVE_HD_TX_CNT_SIZE               2
00092 #define TESTER_SPI_SLAVE_HD_RX_CNT                    0x0010601D
00093 #define TESTER_SPI_SLAVE_HD_RX_CNT_SIZE               2
00094 #define TESTER_SPI_SLAVE_CLK_DIV                      0x0010601F
00095 #define TESTER_SPI_SLAVE_CLK_DIV_SIZE                 2
00096 #define TESTER_SPI_SLAVE_NUM_OF_SYMBOLS               0x00106021
00097 #define TESTER_SPI_SLAVE_NUM_OF_SYMBOLS_SIZE          2
00098 #define TESTER_SPI_SLAVE_START_DELAY_US               0x00106023
00099 #define TESTER_SPI_SLAVE_START_DELAY_US_SIZE          1
00100 #define TESTER_SPI_SLAVE_SYM_DELAY_TICKS              0x00106024
00101 #define TESTER_SPI_SLAVE_SYM_DELAY_TICKS_SIZE         2
00102 #define TESTER_SPI_SLAVE_CLK_MODE_OFFSET              0
00103 #define TESTER_SPI_SLAVE_CLK_MODE_SIZE                2
00104 #define TESTER_SPI_SLAVE_BIT_ORDER_OFFSET             2
00105 #define TESTER_SPI_SLAVE_BIT_ORDER_SIZE               1
00106 #define TESTER_SPI_SLAVE_DUPLEX_OFFSET                3
00107 #define TESTER_SPI_SLAVE_DUPLEX_SIZE                  1
00108 #define TESTER_SPI_SLAVE_SYM_SIZE_OFFSET              4
00109 #define TESTER_SPI_SLAVE_SYM_SIZE_SIZE                6
00110 #define TESTER_SPI_SLAVE_START_REQUEST_OFFSET         10
00111 #define TESTER_SPI_SLAVE_START_REQUEST_SIZE           1
00112 #define TESTER_IO_METRICS                             0x00103000
00113 #define TESTER_IO_METRICS_CTRL                        0x00103000
00114 #define TESTER_IO_METRICS_CTRL_ACTIVE_BIT             (1 << 0)
00115 #define TESTER_IO_METRICS_CTRL_RESET_BIT              (1 << 1)
00116 #define TESTER_IO_METRICS_BASE(i)                     (0x00103040 + 0x40 * (i))
00117 #define TESTER_IO_METRICS_MIN_PULSE_LOW(i)            (TESTER_IO_METRICS_BASE(i) + 0x00)
00118 #define TESTER_IO_METRICS_MIN_PULSE_LOW_SIZE          4
00119 #define TESTER_IO_METRICS_MIN_PULSE_HIGH(i)           (TESTER_IO_METRICS_BASE(i) + 0x04)
00120 #define TESTER_IO_METRICS_MIN_PULSE_HIGH_SIZE         4
00121 #define TESTER_IO_METRICS_MAX_PULSE_LOW(i)            (TESTER_IO_METRICS_BASE(i) + 0x08)
00122 #define TESTER_IO_METRICS_MAX_PULSE_LOW_SIZE          4
00123 #define TESTER_IO_METRICS_MAX_PULSE_HIGH(i)           (TESTER_IO_METRICS_BASE(i) + 0x0C)
00124 #define TESTER_IO_METRICS_MAX_PULSE_HIGH_SIZE         4
00125 #define TESTER_IO_METRICS_RISING_EDGES(i)             (TESTER_IO_METRICS_BASE(i) + 0x10)
00126 #define TESTER_IO_METRICS_RISING_EDGES_SIZE           4
00127 #define TESTER_IO_METRICS_FALLING_EDGES(i)            (TESTER_IO_METRICS_BASE(i) + 0x14)
00128 #define TESTER_IO_METRICS_FALLING_EDGES_SIZE          4
00129 #define TESTER_UART_CONTROL                           (0x000 + 0x00104000)
00130 #define TESTER_UART_CONTROL_SIZE                      4
00131 #define TESTER_UART_BAUD_DIVISOR                      (0x004 + 0x00104000)
00132 #define TESTER_UART_BAUD_DIVISOR_SIZE                 2
00133 #define TESTER_UART_BIT_COUNT                         (0x010 + 0x00104000)
00134 #define TESTER_UART_BIT_COUNT_SIZE                    1
00135 #define TESTER_UART_STOP_COUNT                        (0x011 + 0x00104000)
00136 #define TESTER_UART_STOP_COUNT_SIZE                   1
00137 #define TESTER_UART_PARITY                            (0x012 + 0x00104000)
00138 #define TESTER_UART_PARITY_SIZE                       1
00139 #define TESTER_UART_PARITY_ENABLE                     (1 << 0)
00140 #define TESTER_UART_PARITY_ODD_N_EVEN                 (1 << 1)
00141 #define TESTER_UART_RX_CONTROL                        (0x100 + 0x00104000)
00142 #define TESTER_UART_RX_CONTROL_SIZE                   4
00143 #define TESTER_UART_RX_CONTROL_ENABLE                 (1 << 0)
00144 #define TESTER_UART_RX_CONTROL_RESET                  (1 << 1)
00145 #define TESTER_UART_RX_CHECKSUM                       (0x104 + 0x00104000)
00146 #define TESTER_UART_RX_CHECKSUM_SIZE                  4
00147 #define TESTER_UART_RX_COUNT                          (0x108 + 0x00104000)
00148 #define TESTER_UART_RX_COUNT_SIZE                     4
00149 #define TESTER_UART_RX_PARITY_ERRORS                  (0x10C + 0x00104000)
00150 #define TESTER_UART_RX_PARITY_ERRORS_SIZE             4
00151 #define TESTER_UART_RX_STOP_ERRORS                    (0x110 + 0x00104000)
00152 #define TESTER_UART_RX_STOP_ERRORS_SIZE               4
00153 #define TESTER_UART_RX_FRAMING_ERRORS                 (0x114 + 0x00104000)
00154 #define TESTER_UART_RX_FRAMING_ERRORS_SIZE            4
00155 #define TESTER_UART_RX_PREV_4                         (0x118 + 0x00104000)
00156 #define TESTER_UART_RX_PREV_4_SIZE                    2
00157 #define TESTER_UART_RX_PREV_3                         (0x11A + 0x00104000)
00158 #define TESTER_UART_RX_PREV_3_SIZE                    2
00159 #define TESTER_UART_RX_PREV_2                         (0x11C + 0x00104000)
00160 #define TESTER_UART_RX_PREV_2_SIZE                    2
00161 #define TESTER_UART_RX_PREV_1                         (0x11E + 0x00104000)
00162 #define TESTER_UART_RX_PREV_1_SIZE                    2
00163 #define TESTER_UART_TX_CONTROL                        (0x200 + 0x00104000)
00164 #define TESTER_UART_TX_CONTROL_SIZE                   4
00165 #define TESTER_UART_TX_CONTROL_ENABLE                 (1 << 0)
00166 #define TESTER_UART_TX_CONTROL_RESET                  (1 << 1)
00167 #define TESTER_UART_TX_CONTROL_ENABLE_CTS             (1 << 2)
00168 #define TESTER_UART_TX_COUNT                          (0x204 + 0x00104000)
00169 #define TESTER_UART_TX_COUNT_SIZE                     4
00170 #define TESTER_UART_TX_NEXT                           (0x208 + 0x00104000)
00171 #define TESTER_UART_TX_NEXT_SIZE                      2
00172 #define TESTER_UART_CTS_DEACTIVATE_DELAY              (0x210 + 0x00104000)
00173 #define TESTER_UART_CTS_DEACTIVATE_DELAY_SIZE         4
00174 #define TESTER_UART_TX_DELAY                          (0x214 + 0x00104000)
00175 #define TESTER_UART_TX_DELAY_SIZE                     4
00176 #define TESTER_I2C_STARTS                             (0x000 + 0x00105000)
00177 #define TESTER_I2C_STOPS                              (0x001 + 0x00105000)
00178 #define TESTER_I2C_ACKS                               (0x002 + 0x00105000)
00179 #define TESTER_I2C_NACKS                              (0x004 + 0x00105000)
00180 #define TESTER_I2C_TRANSFERS                          (0x006 + 0x00105000)
00181 #define TESTER_I2C_TRANSFERS_SIZE                     2
00182 #define TESTER_I2C_TO_SLAVE_CHECKSUM                  (0x008 + 0x00105000)
00183 #define TESTER_I2C_TO_SLAVE_CHECKSUM_SIZE             4
00184 #define TESTER_I2C_STATE_NUM                          (0x00C + 0x00105000)
00185 #define TESTER_I2C_NUMBER_DEV_ADDR_MATCHES            (0x00D + 0x00105000)
00186 #define TESTER_I2C_DEVICE_ADDRESS                     (0x00E + 0x00105000)
00187 #define TESTER_I2C_SET_SDA                            (0x010 + 0x00105000)
00188 #define TESTER_I2C_PREV_TO_SLAVE_4                    (0x011 + 0x00105000)
00189 #define TESTER_I2C_PREV_TO_SLAVE_3                    (0x012 + 0x00105000)
00190 #define TESTER_I2C_PREV_TO_SLAVE_2                    (0x013 + 0x00105000)
00191 #define TESTER_I2C_PREV_TO_SLAVE_1                    (0x014 + 0x00105000)
00192 #define TESTER_I2C_NEXT_FROM_SLAVE                    (0x015 + 0x00105000)
00193 #define TESTER_I2C_NUM_WRITES                         (0x016 + 0x00105000)
00194 #define TESTER_I2C_NUM_READS                          (0x018 + 0x00105000)
00195 #define TESTER_I2C_FROM_SLAVE_CHECKSUM                (0x01A + 0x00105000)
00196 #define TESTER_I2C_FROM_SLAVE_CHECKSUM_SIZE           4
00197 #define TESTER_I2C_NUMBER_DEV_ADDR_MISMATCHES         (0x01E + 0x00105000)
00198 #define TESTER_I2C_NUMBER_DEV_ADDR_MISMATCHES_SIZE    1