SPISlaveTester.h

00001 /*
00002  * Copyright (c) 2019, Arm Limited and affiliates.
00003  * SPDX-License-Identifier: Apache-2.0
00004  *
00005  * Licensed under the Apache License, Version 2.0 (the "License");
00006  * you may not use this file except in compliance with the License.
00007  * You may obtain a copy of the License at
00008  *
00009  * http://www.apache.org/licenses/LICENSE-2.0
00010  *
00011  * Unless required by applicable law or agreed to in writing, software
00012  * distributed under the License is distributed on an "AS IS" BASIS,
00013  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00014  * See the License for the specific language governing permissions and
00015  * limitations under the License.
00016  */
00017 
00018 #ifndef SPI_SLAVE_TESTER_H
00019 #define SPI_SLAVE_TESTER_H
00020 
00021 #include "SPITester.h"
00022 
00023 class SPISlaveTester: public SPITester {
00024 public:
00025 
00026     SPISlaveTester(const PinList *form_factor, const PinList *exclude_pins)
00027         : SPITester(form_factor, exclude_pins)
00028     {
00029 
00030     }
00031 
00032     /**
00033      * Read the number of transfers which have occurred
00034      *
00035      * @return The number of SPI transfers that have completed since
00036      *         spi was reset.
00037      */
00038     uint16_t get_transfer_count();
00039 
00040     /**
00041      * Read a checksum of data sent to the tester
00042      *
00043      * @return The sum of all bytes sent to the tester since reset.
00044      */
00045     uint32_t get_receive_checksum();
00046 
00047     /**
00048      * Set the clock mode of the spi_slave module.
00049      *
00050      *  @param mode Spi clock mode
00051      */
00052     void set_mode(SpiMode mode);
00053 
00054     /**
00055      * Set bit order during transmission of the spi_slave module.
00056      *
00057      *  @param mode Spi clock mode
00058      */
00059     void set_bit_order(SpiBitOrder bit_order);
00060 
00061     /**
00062      * Set symbol size used during transmission of the spi_slave module.
00063      *
00064      *  @param mode Spi clock mode
00065      */
00066     void set_sym_size(uint32_t sym_size);
00067 
00068     /**
00069      * Set full-duplex/half-duplex transmission mode of the spi_slave module.
00070      *
00071      *  @param duplex duplex mode used for the transmission
00072      */
00073     void set_duplex_mode(SpiDuplex duplex);
00074 
00075     /**
00076      * Set tx/rx symbol count.
00077      *
00078      *  @tx_cnt TX symbol count
00079      *  @rx_cnt RX symbol count
00080      *
00081      *  @note Required only in Half-Duplex mode.
00082      */
00083     void set_hd_tx_rx_cnt(uint16_t tx_cnt, uint16_t rx_cnt);
00084 
00085     /**
00086      * Set divisor to generate spi clock from FPGA base clock (100 MHz).
00087      *
00088      *  @clk_div clock divisor.
00089      */
00090     void set_spi_master_freq(uint16_t clk_div);
00091 
00092     /**
00093      * Set number of symbols to be transmitted by spi master.
00094      *
00095      *  @num_of_sym Number of symbols to be transmitted by spi master.
00096      */
00097     void set_num_of_symbols(uint16_t num_of_sym);
00098 
00099     /**
00100      * Set delay in us between start request and start of transmission.
00101      *
00102      *  @start_delay_us Delay in us between start request and start of transmission.
00103      */
00104     void set_start_delay_us(uint8_t start_delay_us);
00105 
00106     /**
00107      * Set delay in ns between transmission of successive symbols.
00108      *
00109      *  @sym_delay_ns Delay in ns between transmission of successive symbols.
00110      */
00111     void set_sym_delay_ns(uint16_t sym_delay_ns);
00112 
00113     /**
00114      * Request transmission start from FPGA master.
00115      *
00116      *  @note Transmission will be started after the specified delay.
00117      */
00118     void start_transfer();
00119 };
00120 
00121 #endif