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Dependents: TYBLE16_simple_data_logger TYBLE16_MP3_Air
NanostackRfPhyAtmel.cpp
00001 /* 00002 * Copyright (c) 2014-2015 ARM Limited. All rights reserved. 00003 * SPDX-License-Identifier: Apache-2.0 00004 * Licensed under the Apache License, Version 2.0 (the License); you may 00005 * not use this file except in compliance with the License. 00006 * You may obtain a copy of the License at 00007 * 00008 * http://www.apache.org/licenses/LICENSE-2.0 00009 * 00010 * Unless required by applicable law or agreed to in writing, software 00011 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 00012 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00013 * See the License for the specific language governing permissions and 00014 * limitations under the License. 00015 */ 00016 #include <string.h> 00017 00018 #if defined(MBED_CONF_NANOSTACK_CONFIGURATION) && DEVICE_SPI && DEVICE_INTERRUPTIN && DEVICE_I2C && defined(MBED_CONF_RTOS_PRESENT) 00019 00020 #include "platform/arm_hal_interrupt.h" 00021 #include "nanostack/platform/arm_hal_phy.h" 00022 #include "ns_types.h" 00023 #include "NanostackRfPhyAtmel.h" 00024 #include "randLIB.h" 00025 #include "AT86RFReg.h" 00026 #include "nanostack/platform/arm_hal_phy.h" 00027 #include "mbed_trace.h" 00028 #include "mbed_toolchain.h" 00029 #include "DigitalIn.h" 00030 #include "DigitalOut.h" 00031 #include "InterruptIn.h" 00032 #include "SPI.h" 00033 #include "inttypes.h" 00034 #include "Timeout.h" 00035 #include "platform/mbed_error.h" 00036 00037 #define TRACE_GROUP "AtRF" 00038 00039 /*Worst case sensitivity*/ 00040 #define RF_DEFAULT_SENSITIVITY -88 00041 /*Run calibration every 5 minutes*/ 00042 #define RF_CALIBRATION_INTERVAL 6000000 00043 /*Wait ACK for 2.5ms*/ 00044 #define RF_ACK_WAIT_DEFAULT_TIMEOUT 50 00045 /*Base CCA backoff (50us units) - substitutes for Inter-Frame Spacing*/ 00046 #define RF_CCA_BASE_BACKOFF 13 /* 650us */ 00047 /*CCA random backoff (50us units)*/ 00048 #define RF_CCA_RANDOM_BACKOFF 51 /* 2550us */ 00049 00050 #define RF_MTU 127 00051 00052 #define RF_PHY_MODE OQPSK_SIN_250 00053 00054 /*Radio RX and TX state definitions*/ 00055 #define RFF_ON 0x01 00056 #define RFF_RX 0x02 00057 #define RFF_TX 0x04 00058 #define RFF_CCA 0x08 00059 00060 namespace { 00061 00062 typedef enum { 00063 RF_MODE_NORMAL = 0, 00064 RF_MODE_SNIFFER = 1, 00065 RF_MODE_ED = 2 00066 } rf_mode_t; 00067 00068 /*Atmel RF Part Type*/ 00069 typedef enum { 00070 ATMEL_UNKNOW_DEV = 0, 00071 ATMEL_AT86RF212, 00072 ATMEL_AT86RF231, // No longer supported (doesn't give ED+status on frame read) 00073 ATMEL_AT86RF233 00074 } rf_trx_part_e; 00075 00076 /*Atmel RF states*/ 00077 typedef enum { 00078 NOP = 0x00, 00079 BUSY_RX = 0x01, 00080 BUSY_TX = 0x02, 00081 RF_TX_START = 0x02, 00082 FORCE_TRX_OFF = 0x03, 00083 FORCE_PLL_ON = 0x04, 00084 RX_ON = 0x06, 00085 TRX_OFF = 0x08, 00086 PLL_ON = 0x09, 00087 BUSY_RX_AACK = 0x11, 00088 SLEEP = 0x0F, 00089 RX_AACK_ON = 0x16, 00090 TX_ARET_ON = 0x19, 00091 STATE_TRANSITION_IN_PROGRESS = 0x1F 00092 } rf_trx_states_t; 00093 00094 } // anonymous namespace 00095 00096 static const uint8_t *rf_tx_data; // Points to Nanostack's buffer 00097 static uint8_t rf_tx_length; 00098 /*ACK wait duration changes depending on data rate*/ 00099 static uint16_t rf_ack_wait_duration = RF_ACK_WAIT_DEFAULT_TIMEOUT; 00100 00101 static int8_t rf_sensitivity = RF_DEFAULT_SENSITIVITY; 00102 static rf_mode_t rf_mode = RF_MODE_NORMAL; 00103 static uint8_t radio_tx_power = 0x00; // Default to +4dBm 00104 static uint8_t rf_phy_channel = 12; 00105 static uint8_t rf_tuned = 1; 00106 static uint8_t rf_use_antenna_diversity = 0; 00107 static int16_t expected_ack_sequence = -1; 00108 static uint8_t rf_rx_mode = 0; 00109 static uint8_t rf_flags = 0; 00110 static int8_t rf_radio_driver_id = -1; 00111 static phy_device_driver_s device_driver; 00112 static uint8_t mac_tx_handle = 0; 00113 static uint8_t xah_ctrl_1; 00114 00115 /* Channel configurations for 2.4 and sub-GHz */ 00116 static const phy_rf_channel_configuration_s phy_24ghz = {.channel_0_center_frequency = 2405000000U, .channel_spacing = 5000000U, .datarate = 250000U, .number_of_channels = 16U, .modulation = M_OQPSK}; 00117 static const phy_rf_channel_configuration_s phy_subghz = {.channel_0_center_frequency = 868300000U, .channel_spacing = 2000000U, .datarate = 250000U, .number_of_channels = 11U, .modulation = M_OQPSK}; 00118 00119 static const phy_device_channel_page_s phy_channel_pages[] = { 00120 { CHANNEL_PAGE_0, &phy_24ghz}, 00121 { CHANNEL_PAGE_2, &phy_subghz}, 00122 { CHANNEL_PAGE_0, NULL} 00123 }; 00124 00125 /** 00126 * RF output power write 00127 * 00128 * \brief TX power has to be set before network start. 00129 * 00130 * \param power 00131 * AT86RF233 00132 * 0 = 4 dBm 00133 * 1 = 3.7 dBm 00134 * 2 = 3.4 dBm 00135 * 3 = 3 dBm 00136 * 4 = 2.5 dBm 00137 * 5 = 2 dBm 00138 * 6 = 1 dBm 00139 * 7 = 0 dBm 00140 * 8 = -1 dBm 00141 * 9 = -2 dBm 00142 * 10 = -3 dBm 00143 * 11 = -4 dBm 00144 * 12 = -6 dBm 00145 * 13 = -8 dBm 00146 * 14 = -12 dBm 00147 * 15 = -17 dBm 00148 * 00149 * AT86RF212B 00150 * See datasheet for TX power settings 00151 * 00152 * \return 0, Supported Value 00153 * \return -1, Not Supported Value 00154 */ 00155 static rf_trx_part_e rf_radio_type_read(void); 00156 static void rf_ack_wait_timer_start(uint16_t slots); 00157 static void rf_handle_cca_ed_done(uint8_t full_trx_status); 00158 static void rf_handle_tx_end(rf_trx_states_t trx_status); 00159 static void rf_handle_rx_end(rf_trx_states_t trx_status); 00160 static void rf_on(void); 00161 static void rf_give_up_on_ack(void); 00162 static void rf_receive(rf_trx_states_t trx_status = STATE_TRANSITION_IN_PROGRESS); 00163 static rf_trx_states_t rf_poll_trx_state_change(rf_trx_states_t trx_state); 00164 static void rf_init(void); 00165 static int8_t rf_device_register(const uint8_t *mac_addr); 00166 static void rf_device_unregister(void); 00167 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol); 00168 static void rf_cca_abort(void); 00169 static void rf_calibration_cb(void); 00170 static void rf_init_phy_mode(void); 00171 static void rf_ack_wait_timer_interrupt(void); 00172 static void rf_calibration_timer_interrupt(void); 00173 static void rf_calibration_timer_start(uint32_t slots); 00174 static void rf_cca_timer_interrupt(void); 00175 static void rf_cca_timer_start(uint32_t slots); 00176 static uint8_t rf_scale_lqi(int8_t rssi); 00177 00178 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel); 00179 static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr); 00180 static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr); 00181 00182 static void rf_if_cca_timer_start(uint32_t slots); 00183 static void rf_if_enable_promiscuous_mode(void); 00184 static void rf_if_lock(void); 00185 static void rf_if_unlock(void); 00186 static uint8_t rf_if_read_rnd(void); 00187 static void rf_if_calibration_timer_start(uint32_t slots); 00188 static void rf_if_interrupt_handler(void); 00189 static void rf_if_ack_wait_timer_start(uint16_t slots); 00190 static void rf_if_ack_wait_timer_stop(void); 00191 static void rf_if_ack_pending_ctrl(uint8_t state); 00192 static void rf_if_calibration(void); 00193 static uint8_t rf_if_read_register(uint8_t addr); 00194 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask); 00195 static void rf_if_clear_bit(uint8_t addr, uint8_t bit); 00196 static void rf_if_write_register(uint8_t addr, uint8_t data); 00197 static void rf_if_reset_radio(void); 00198 static void rf_if_enable_ant_div(void); 00199 static void rf_if_disable_ant_div(void); 00200 static void rf_if_enable_slptr(void); 00201 static void rf_if_disable_slptr(void); 00202 static void rf_if_write_antenna_diversity_settings(void); 00203 static void rf_if_write_set_tx_power_register(uint8_t value); 00204 static void rf_if_write_rf_settings(void); 00205 static rf_trx_states_t rf_if_read_trx_state(void); 00206 static uint16_t rf_if_read_packet(uint8_t data[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good); 00207 static void rf_if_write_short_addr_registers(uint8_t *short_address); 00208 static uint8_t rf_if_last_acked_pending(void); 00209 static void rf_if_write_pan_id_registers(uint8_t *pan_id); 00210 static void rf_if_write_ieee_addr_registers(uint8_t *address); 00211 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length); 00212 static rf_trx_states_t rf_if_change_trx_state(rf_trx_states_t trx_state); 00213 static void rf_if_start_cca_process(void); 00214 static int8_t rf_if_scale_rssi(uint8_t ed_level); 00215 static void rf_if_set_channel_register(uint8_t channel); 00216 static void rf_if_enable_promiscuous_mode(void); 00217 static void rf_if_disable_promiscuous_mode(void); 00218 static uint8_t rf_if_read_part_num(void); 00219 static void rf_if_enable_irq(void); 00220 static void rf_if_disable_irq(void); 00221 static void rf_if_spi_exchange_n(const void *tx, size_t tx_len, void *rx, size_t rx_len); 00222 00223 static inline rf_trx_states_t rf_if_trx_status_from_full(uint8_t full_trx_status) 00224 { 00225 return (rf_trx_states_t)(full_trx_status & 0x1F); 00226 } 00227 00228 #ifdef MBED_CONF_RTOS_PRESENT 00229 00230 #include "rtos.h" 00231 00232 using namespace mbed; 00233 using namespace rtos; 00234 00235 static void rf_if_irq_task_process_irq(); 00236 00237 #define SIG_RADIO 1 00238 #define SIG_TIMER_ACK 2 00239 #define SIG_TIMER_CAL 4 00240 #define SIG_TIMER_CCA 8 00241 00242 #define SIG_TIMERS (SIG_TIMER_ACK|SIG_TIMER_CAL|SIG_TIMER_CCA) 00243 #define SIG_ALL (SIG_RADIO|SIG_TIMERS) 00244 #endif 00245 00246 // HW pins to RF chip 00247 00248 class UnlockedSPI : public SPI { 00249 public: 00250 UnlockedSPI(PinName mosi, PinName miso, PinName sclk) : 00251 SPI(mosi, miso, sclk) { } 00252 virtual void lock() { } 00253 virtual void unlock() { } 00254 }; 00255 00256 class RFBits { 00257 public: 00258 RFBits(PinName spi_mosi, PinName spi_miso, 00259 PinName spi_sclk, PinName spi_cs, 00260 PinName spi_rst, PinName spi_slp, PinName spi_irq); 00261 UnlockedSPI spi; 00262 DigitalOut CS; 00263 DigitalOut RST; 00264 DigitalOut SLP_TR; 00265 InterruptIn IRQ; 00266 Timeout ack_timer; 00267 Timeout cal_timer; 00268 Timeout cca_timer; 00269 #ifdef MBED_CONF_RTOS_PRESENT 00270 Thread irq_thread; 00271 Mutex mutex; 00272 void rf_if_irq_task(); 00273 #endif 00274 }; 00275 00276 RFBits::RFBits(PinName spi_mosi, PinName spi_miso, 00277 PinName spi_sclk, PinName spi_cs, 00278 PinName spi_rst, PinName spi_slp, PinName spi_irq) 00279 : spi(spi_mosi, spi_miso, spi_sclk), 00280 CS(spi_cs), 00281 RST(spi_rst), 00282 SLP_TR(spi_slp), 00283 IRQ(spi_irq) 00284 #ifdef MBED_CONF_RTOS_PRESENT 00285 , irq_thread(osPriorityRealtime, MBED_CONF_ATMEL_RF_IRQ_THREAD_STACK_SIZE, NULL, "atmel_irq_thread") 00286 #endif 00287 { 00288 #ifdef MBED_CONF_RTOS_PRESENT 00289 irq_thread.start(mbed::callback(this, &RFBits::rf_if_irq_task)); 00290 #endif 00291 } 00292 00293 static RFBits *rf; 00294 static uint8_t rf_part_num = 0; 00295 /*TODO: RSSI Base value setting*/ 00296 static int8_t rf_rssi_base_val = -91; 00297 00298 static void rf_if_lock(void) 00299 { 00300 platform_enter_critical(); 00301 } 00302 00303 static void rf_if_unlock(void) 00304 { 00305 platform_exit_critical(); 00306 } 00307 00308 #ifdef MBED_CONF_RTOS_PRESENT 00309 static void rf_if_cca_timer_signal(void) 00310 { 00311 rf->irq_thread.flags_set(SIG_TIMER_CCA); 00312 } 00313 00314 static void rf_if_cal_timer_signal(void) 00315 { 00316 rf->irq_thread.flags_set(SIG_TIMER_CAL); 00317 } 00318 00319 static void rf_if_ack_timer_signal(void) 00320 { 00321 rf->irq_thread.flags_set(SIG_TIMER_ACK); 00322 } 00323 #endif 00324 00325 // t1 = 180ns, SEL falling edge to MISO active [SPI setup assumed slow enough to not need manual delay] 00326 #define CS_SELECT() {rf->CS = 0; /* delay_ns(180); */} 00327 // t9 = 250ns, last clock to SEL rising edge, t8 = 250ns, SPI idle time between consecutive access 00328 #define CS_RELEASE() {wait_ns(250); rf->CS = 1; wait_ns(250);} 00329 00330 /* 00331 * \brief Read connected radio part. 00332 * 00333 * This function only return valid information when rf_init() is called 00334 * 00335 * \return 00336 */ 00337 static rf_trx_part_e rf_radio_type_read(void) 00338 { 00339 rf_trx_part_e ret_val = ATMEL_UNKNOW_DEV; 00340 00341 switch (rf_part_num) { 00342 case PART_AT86RF212: 00343 ret_val = ATMEL_AT86RF212; 00344 break; 00345 case PART_AT86RF233: 00346 ret_val = ATMEL_AT86RF233; 00347 break; 00348 default: 00349 break; 00350 } 00351 00352 return ret_val; 00353 } 00354 00355 00356 /* 00357 * \brief Function starts the ACK wait timeout. 00358 * 00359 * \param slots Given slots, resolution 50us 00360 * 00361 * \return none 00362 */ 00363 static void rf_if_ack_wait_timer_start(uint16_t slots) 00364 { 00365 #ifdef MBED_CONF_RTOS_PRESENT 00366 rf->ack_timer.attach_us(rf_if_ack_timer_signal, slots * 50); 00367 #else 00368 rf->ack_timer.attach_us(rf_ack_wait_timer_interrupt, slots * 50); 00369 #endif 00370 } 00371 00372 /* 00373 * \brief Function starts the calibration interval. 00374 * 00375 * \param slots Given slots, resolution 50us 00376 * 00377 * \return none 00378 */ 00379 static void rf_if_calibration_timer_start(uint32_t slots) 00380 { 00381 #ifdef MBED_CONF_RTOS_PRESENT 00382 rf->cal_timer.attach_us(rf_if_cal_timer_signal, slots * 50); 00383 #else 00384 rf->cal_timer.attach_us(rf_calibration_timer_interrupt, slots * 50); 00385 #endif 00386 } 00387 00388 /* 00389 * \brief Function starts the CCA interval. 00390 * 00391 * \param slots Given slots, resolution 50us 00392 * 00393 * \return none 00394 */ 00395 static void rf_if_cca_timer_start(uint32_t slots) 00396 { 00397 #ifdef MBED_CONF_RTOS_PRESENT 00398 rf->cca_timer.attach_us(rf_if_cca_timer_signal, slots * 50); 00399 #else 00400 rf->cca_timer.attach_us(rf_cca_timer_interrupt, slots * 50); 00401 #endif 00402 } 00403 00404 /* 00405 * \brief Function stops the CCA interval. 00406 * 00407 * \return none 00408 */ 00409 static void rf_if_cca_timer_stop(void) 00410 { 00411 rf->cca_timer.detach(); 00412 } 00413 00414 /* 00415 * \brief Function stops the ACK wait timeout. 00416 * 00417 * \param none 00418 * 00419 * \return none 00420 */ 00421 static void rf_if_ack_wait_timer_stop(void) 00422 { 00423 rf->ack_timer.detach(); 00424 } 00425 00426 /* 00427 * \brief Function sets bit(s) in given RF register. 00428 * 00429 * \param addr Address of the register to set 00430 * \param bit Bit(s) to set 00431 * \param bit_mask Masks the field inside the register 00432 * 00433 * \return none 00434 */ 00435 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask) 00436 { 00437 uint8_t reg = rf_if_read_register(addr); 00438 reg &= ~bit_mask; 00439 reg |= bit; 00440 rf_if_write_register(addr, reg); 00441 } 00442 00443 /* 00444 * \brief Function clears bit(s) in given RF register. 00445 * 00446 * \param addr Address of the register to clear 00447 * \param bit Bit(s) to clear 00448 * 00449 * \return none 00450 */ 00451 static void rf_if_clear_bit(uint8_t addr, uint8_t bit) 00452 { 00453 rf_if_set_bit(addr, 0, bit); 00454 } 00455 00456 /* 00457 * \brief Function writes register in RF. 00458 * 00459 * \param addr Address on the RF 00460 * \param data Written data 00461 * 00462 * \return none 00463 */ 00464 static void rf_if_write_register(uint8_t addr, uint8_t data) 00465 { 00466 const uint8_t tx[2] = { static_cast<uint8_t>(0xC0 | addr), data }; 00467 uint8_t rx[2]; 00468 CS_SELECT(); 00469 rf_if_spi_exchange_n(tx, 2, rx, 2); 00470 CS_RELEASE(); 00471 } 00472 00473 /* 00474 * \brief Function reads RF register, and also outputs PHY_STATUS 00475 * 00476 * \param addr Address on the RF 00477 * \param[out] status_out Pointer to store PHY_STATUS 00478 * 00479 * \return Read register data 00480 */ 00481 static uint8_t rf_if_read_register_with_status(uint8_t addr, uint8_t *status_out) 00482 { 00483 const uint8_t tx[1] = { static_cast<uint8_t>(0x80 | addr) }; 00484 uint8_t rx[2]; 00485 CS_SELECT(); 00486 rf_if_spi_exchange_n(tx, 1, rx, 2); 00487 CS_RELEASE(); 00488 if (status_out) { 00489 *status_out = rx[0]; 00490 } 00491 return rx[1]; 00492 } 00493 00494 /* 00495 * \brief Function reads RF register. 00496 * 00497 * \param addr Address on the RF 00498 * 00499 * \return Read register data 00500 */ 00501 static uint8_t rf_if_read_register(uint8_t addr) 00502 { 00503 return rf_if_read_register_with_status(addr, NULL); 00504 } 00505 00506 /* 00507 * \brief Function resets the RF. 00508 * 00509 * \param none 00510 * 00511 * \return none 00512 */ 00513 static void rf_if_reset_radio(void) 00514 { 00515 #if MBED_CONF_ATMEL_RF_USE_SPI_SPACING_API 00516 rf->spi.frequency(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED); 00517 int spacing = rf->spi.write_spacing(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED_BYTE_SPACING); 00518 if (spacing < MBED_CONF_ATMEL_RF_FULL_SPI_SPEED_BYTE_SPACING) { 00519 rf->spi.frequency(MBED_CONF_ATMEL_RF_LOW_SPI_SPEED); 00520 rf->spi.write_spacing(0); 00521 } 00522 #elif MBED_CONF_ATMEL_RF_ASSUME_SPACED_SPI 00523 rf->spi.frequency(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED); 00524 #else 00525 rf->spi.frequency(MBED_CONF_ATMEL_RF_LOW_SPI_SPEED); 00526 #endif 00527 rf->IRQ.rise(0); 00528 rf->RST = 1; 00529 ThisThread::sleep_for(2); 00530 rf->RST = 0; 00531 ThisThread::sleep_for(10); 00532 CS_RELEASE(); 00533 rf->SLP_TR = 0; 00534 ThisThread::sleep_for(10); 00535 rf->RST = 1; 00536 ThisThread::sleep_for(10); 00537 00538 rf->IRQ.rise(&rf_if_interrupt_handler); 00539 } 00540 00541 /* 00542 * \brief Function enables the promiscuous mode. 00543 * 00544 * \param none 00545 * 00546 * \return none 00547 */ 00548 static void rf_if_enable_promiscuous_mode(void) 00549 { 00550 if (!(xah_ctrl_1 & AACK_PROM_MODE)) { 00551 /*Set AACK_PROM_MODE to enable the promiscuous mode*/ 00552 rf_if_write_register(XAH_CTRL_1, xah_ctrl_1 |= AACK_PROM_MODE); 00553 } 00554 } 00555 00556 /* 00557 * \brief Function disable the promiscuous mode. 00558 * 00559 * \param none 00560 * 00561 * \return none 00562 */ 00563 static void rf_if_disable_promiscuous_mode(void) 00564 { 00565 if (xah_ctrl_1 & AACK_PROM_MODE) { 00566 /*Clear AACK_PROM_MODE to disable the promiscuous mode*/ 00567 rf_if_write_register(XAH_CTRL_1, xah_ctrl_1 &= ~AACK_PROM_MODE); 00568 } 00569 } 00570 00571 /* 00572 * \brief Function enables the Antenna diversity usage. 00573 * 00574 * \param none 00575 * 00576 * \return none 00577 */ 00578 static void rf_if_enable_ant_div(void) 00579 { 00580 /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/ 00581 rf_if_set_bit(ANT_DIV, ANT_EXT_SW_EN, ANT_EXT_SW_EN); 00582 } 00583 00584 /* 00585 * \brief Function disables the Antenna diversity usage. 00586 * 00587 * \param none 00588 * 00589 * \return none 00590 */ 00591 static void rf_if_disable_ant_div(void) 00592 { 00593 rf_if_clear_bit(ANT_DIV, ANT_EXT_SW_EN); 00594 } 00595 00596 /* 00597 * \brief Function sets the SLP TR pin. 00598 * 00599 * \param none 00600 * 00601 * \return none 00602 */ 00603 static void rf_if_enable_slptr(void) 00604 { 00605 rf->SLP_TR = 1; 00606 } 00607 00608 /* 00609 * \brief Function clears the SLP TR pin. 00610 * 00611 * \param none 00612 * 00613 * \return none 00614 */ 00615 static void rf_if_disable_slptr(void) 00616 { 00617 rf->SLP_TR = 0; 00618 } 00619 00620 /* 00621 * \brief Function writes the antenna diversity settings. 00622 * 00623 * \param none 00624 * 00625 * \return none 00626 */ 00627 static void rf_if_write_antenna_diversity_settings(void) 00628 { 00629 /*Recommended setting of PDT_THRES is 3 when antenna diversity is used*/ 00630 rf_if_set_bit(RX_CTRL, 0x03, 0x0f); 00631 rf_if_write_register(ANT_DIV, ANT_DIV_EN | ANT_EXT_SW_EN | ANT_CTRL_DEFAULT); 00632 } 00633 00634 /* 00635 * \brief Function writes the TX output power register. 00636 * 00637 * \param value Given register value 00638 * 00639 * \return none 00640 */ 00641 static void rf_if_write_set_tx_power_register(uint8_t value) 00642 { 00643 rf_if_write_register(PHY_TX_PWR, value); 00644 } 00645 00646 /* 00647 * \brief Function returns the RF part number. 00648 * 00649 * \param none 00650 * 00651 * \return part number 00652 */ 00653 static uint8_t rf_if_read_part_num(void) 00654 { 00655 return rf_if_read_register(PART_NUM); 00656 } 00657 00658 /* 00659 * \brief Function writes the RF settings and initialises SPI interface. 00660 * 00661 * \param none 00662 * 00663 * \return none 00664 */ 00665 static void rf_if_write_rf_settings(void) 00666 { 00667 /*Reset RF module*/ 00668 rf_if_reset_radio(); 00669 00670 rf_part_num = rf_if_read_part_num(); 00671 00672 rf_if_write_register(XAH_CTRL_0, 0); 00673 00674 /* Auto CRC on, IRQ status shows unmasked only, TRX_STATUS output on all accesses */ 00675 rf_if_write_register(TRX_CTRL_1, TX_AUTO_CRC_ON | SPI_CMD_MODE_TRX_STATUS); 00676 00677 rf_if_write_register(IRQ_MASK, CCA_ED_DONE | TRX_END | TRX_UR); 00678 00679 xah_ctrl_1 = rf_if_read_register(XAH_CTRL_1); 00680 00681 /*Read transceiver PART_NUM*/ 00682 rf_part_num = rf_if_read_register(PART_NUM); 00683 00684 /*Sub-GHz RF settings*/ 00685 if (rf_part_num == PART_AT86RF212) { 00686 /*GC_TX_OFFS mode-dependent setting - OQPSK*/ 00687 rf_if_write_register(RF_CTRL_0, 0x32); 00688 00689 if (rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B) { 00690 /*TX Output Power setting - 0 dBm North American Band*/ 00691 rf_if_write_register(PHY_TX_PWR, 0x03); 00692 } else { 00693 /*TX Output Power setting - 0 dBm North American Band*/ 00694 rf_if_write_register(PHY_TX_PWR, 0x24); 00695 } 00696 00697 /*PHY Mode: IEEE 802.15.4-2006/2011 - OQPSK-SIN-250*/ 00698 rf_if_write_register(TRX_CTRL_2, RX_SAFE_MODE | RF_PHY_MODE); 00699 /*Based on receiver Characteristics. See AT86RF212B Datasheet where RSSI BASE VALUE in range -97 - -100 dBm*/ 00700 rf_rssi_base_val = -98; 00701 } 00702 /*2.4GHz RF settings*/ 00703 else { 00704 #if 0 00705 /* Disable power saving functions for now - can only impact reliability, 00706 * and don't have any users demanding it. */ 00707 /*Set RPC register*/ 00708 rf_if_write_register(TRX_RPC, RX_RPC_CTRL | RX_RPC_EN | PLL_RPC_EN | XAH_TX_RPC_EN | IPAN_RPC_EN | TRX_RPC_RSVD_1); 00709 #endif 00710 /*PHY Mode: IEEE 802.15.4 - Data Rate 250 kb/s*/ 00711 rf_if_write_register(TRX_CTRL_2, RX_SAFE_MODE); 00712 rf_rssi_base_val = -91; 00713 } 00714 } 00715 00716 /* 00717 * \brief Function returns the RF state 00718 * 00719 * \param none 00720 * 00721 * \return RF state 00722 */ 00723 static rf_trx_states_t rf_if_read_trx_state(void) 00724 { 00725 return rf_if_trx_status_from_full(rf_if_read_register(TRX_STATUS)); 00726 } 00727 00728 /* 00729 * \brief Function reads packet buffer. 00730 * 00731 * \param data_out Output buffer 00732 * \param lqi_out LQI output 00733 * \param ed_out ED output 00734 * \param crc_good CRC good indication 00735 * 00736 * \return PSDU length [0..RF_MTU] 00737 */ 00738 static uint16_t rf_if_read_packet(uint8_t data_out[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good) 00739 { 00740 CS_SELECT(); 00741 const uint8_t tx[1] = { 0x20 }; 00742 uint8_t rx[3]; 00743 rf_if_spi_exchange_n(tx, 1, rx, 2); 00744 uint8_t len = rx[1] & 0x7F; 00745 rf_if_spi_exchange_n(NULL, 0, data_out, len); 00746 rf_if_spi_exchange_n(NULL, 0, rx, 3); 00747 *lqi_out = rx[0]; 00748 *ed_out = rx[1]; 00749 *crc_good = rx[2] & 0x80; 00750 CS_RELEASE(); 00751 00752 return len; 00753 } 00754 00755 /* 00756 * \brief Function writes RF short address registers 00757 * 00758 * \param short_address Given short address 00759 * 00760 * \return none 00761 */ 00762 static void rf_if_write_short_addr_registers(uint8_t *short_address) 00763 { 00764 rf_if_write_register(SHORT_ADDR_1, *short_address++); 00765 rf_if_write_register(SHORT_ADDR_0, *short_address); 00766 } 00767 00768 /* 00769 * \brief Function sets the frame pending in ACK message 00770 * 00771 * \param state Given frame pending state 00772 * 00773 * \return none 00774 */ 00775 static void rf_if_ack_pending_ctrl(uint8_t state) 00776 { 00777 rf_if_lock(); 00778 if (state) { 00779 rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD)); 00780 } else { 00781 rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD)); 00782 } 00783 rf_if_unlock(); 00784 } 00785 00786 /* 00787 * \brief Function returns the state of frame pending control 00788 * 00789 * \param none 00790 * 00791 * \return Frame pending state 00792 */ 00793 static uint8_t rf_if_last_acked_pending(void) 00794 { 00795 uint8_t last_acked_data_pending; 00796 00797 rf_if_lock(); 00798 if (rf_if_read_register(CSMA_SEED_1) & (1 << AACK_SET_PD)) { 00799 last_acked_data_pending = 1; 00800 } else { 00801 last_acked_data_pending = 0; 00802 } 00803 rf_if_unlock(); 00804 00805 return last_acked_data_pending; 00806 } 00807 00808 /* 00809 * \brief Function calibrates the RF part. 00810 * 00811 * \param none 00812 * 00813 * \return none 00814 */ 00815 static void rf_if_calibration(void) 00816 { 00817 rf_if_set_bit(FTN_CTRL, FTN_START, FTN_START); 00818 /*Wait while calibration is running*/ 00819 while (rf_if_read_register(FTN_CTRL) & FTN_START); 00820 } 00821 00822 /* 00823 * \brief Function writes RF PAN Id registers 00824 * 00825 * \param pan_id Given PAN Id 00826 * 00827 * \return none 00828 */ 00829 static void rf_if_write_pan_id_registers(uint8_t *pan_id) 00830 { 00831 rf_if_write_register(PAN_ID_1, *pan_id++); 00832 rf_if_write_register(PAN_ID_0, *pan_id); 00833 } 00834 00835 /* 00836 * \brief Function writes RF IEEE Address registers 00837 * 00838 * \param address Given IEEE Address 00839 * 00840 * \return none 00841 */ 00842 static void rf_if_write_ieee_addr_registers(uint8_t *address) 00843 { 00844 uint8_t i; 00845 uint8_t temp = IEEE_ADDR_0; 00846 00847 for (i = 0; i < 8; i++) { 00848 rf_if_write_register(temp++, address[7 - i]); 00849 } 00850 } 00851 00852 /* 00853 * \brief Function writes data in RF frame buffer. 00854 * 00855 * \param ptr Pointer to data (PSDU, except FCS) 00856 * \param length Pointer to length (PSDU length, minus 2 for FCS) 00857 * 00858 * \return none 00859 */ 00860 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length) 00861 { 00862 const uint8_t cmd[2] = { 0x60, static_cast<uint8_t>(length + 2) }; 00863 00864 CS_SELECT(); 00865 rf_if_spi_exchange_n(cmd, 2, NULL, 0); 00866 rf_if_spi_exchange_n(ptr, length, NULL, 0); 00867 CS_RELEASE(); 00868 } 00869 00870 /* 00871 * \brief Function returns 8-bit random value. 00872 * 00873 * \param none 00874 * 00875 * \return random value 00876 */ 00877 static uint8_t rf_if_read_rnd(void) 00878 { 00879 uint8_t temp; 00880 uint8_t tmp_rpc_val = 0; 00881 /*RPC must be disabled while reading the random number*/ 00882 if (rf_part_num == PART_AT86RF233) { 00883 tmp_rpc_val = rf_if_read_register(TRX_RPC); 00884 rf_if_write_register(TRX_RPC, RX_RPC_CTRL | TRX_RPC_RSVD_1); 00885 } 00886 00887 00888 wait_ns(1000); 00889 temp = ((rf_if_read_register(PHY_RSSI) >> 5) << 6); 00890 wait_ns(1000); 00891 temp |= ((rf_if_read_register(PHY_RSSI) >> 5) << 4); 00892 wait_ns(1000); 00893 temp |= ((rf_if_read_register(PHY_RSSI) >> 5) << 2); 00894 wait_ns(1000); 00895 temp |= ((rf_if_read_register(PHY_RSSI) >> 5)); 00896 wait_ns(1000); 00897 if (rf_part_num == PART_AT86RF233) { 00898 rf_if_write_register(TRX_RPC, tmp_rpc_val); 00899 } 00900 return temp; 00901 } 00902 00903 /* 00904 * \brief Function changes the state of the RF. 00905 * 00906 * \param trx_state Given RF state 00907 * 00908 * \return none 00909 */ 00910 static rf_trx_states_t rf_if_change_trx_state(rf_trx_states_t trx_state) 00911 { 00912 rf_if_write_register(TRX_STATE, trx_state); 00913 /*Wait while not in desired state*/ 00914 return rf_poll_trx_state_change(trx_state); 00915 } 00916 00917 /* 00918 * \brief Function starts the CCA process 00919 * 00920 * \param none 00921 * 00922 * \return none 00923 */ 00924 static void rf_if_start_cca_process(void) 00925 { 00926 rf_if_write_register(PHY_CC_CCA, CCA_REQUEST | CCA_MODE_3A | rf_phy_channel); 00927 } 00928 00929 /* 00930 * \brief Function scales RSSI 00931 * 00932 * \param ed_level ED level read from chip 00933 * 00934 * \return appropriately scaled RSSI dBm 00935 */ 00936 static int8_t rf_if_scale_rssi(uint8_t ed_level) 00937 { 00938 if (rf_part_num == PART_AT86RF212) { 00939 /* Data sheet says to multiply by 1.03 - this is 1.03125, rounding down */ 00940 ed_level += ed_level >> 5; 00941 } 00942 return rf_rssi_base_val + ed_level; 00943 } 00944 00945 /* 00946 * \brief Function sets the RF channel field 00947 * 00948 * \param Given channel 00949 * 00950 * \return none 00951 */ 00952 static void rf_if_set_channel_register(uint8_t channel) 00953 { 00954 rf_if_set_bit(PHY_CC_CCA, channel, CCA_CHANNEL_MASK); 00955 } 00956 00957 /* 00958 * \brief Function enables RF irq pin interrupts in RF interface. 00959 * 00960 * \param none 00961 * 00962 * \return none 00963 */ 00964 static void rf_if_enable_irq(void) 00965 { 00966 rf->IRQ.enable_irq(); 00967 } 00968 00969 /* 00970 * \brief Function disables RF irq pin interrupts in RF interface. 00971 * 00972 * \param none 00973 * 00974 * \return none 00975 */ 00976 static void rf_if_disable_irq(void) 00977 { 00978 rf->IRQ.disable_irq(); 00979 } 00980 00981 #ifdef MBED_CONF_RTOS_PRESENT 00982 static void rf_if_interrupt_handler(void) 00983 { 00984 rf->irq_thread.flags_set(SIG_RADIO); 00985 } 00986 00987 // Started during construction of rf, so variable 00988 // rf isn't set at the start. Uses 'this' instead. 00989 void RFBits::rf_if_irq_task(void) 00990 { 00991 for (;;) { 00992 uint32_t flags = ThisThread::flags_wait_any(SIG_ALL); 00993 rf_if_lock(); 00994 if (flags & SIG_RADIO) { 00995 rf_if_irq_task_process_irq(); 00996 } 00997 if (flags & SIG_TIMER_ACK) { 00998 rf_ack_wait_timer_interrupt(); 00999 } 01000 if (flags & SIG_TIMER_CCA) { 01001 rf_cca_timer_interrupt(); 01002 } 01003 if (flags & SIG_TIMER_CAL) { 01004 rf_calibration_timer_interrupt(); 01005 } 01006 rf_if_unlock(); 01007 } 01008 } 01009 01010 static void rf_if_irq_task_process_irq(void) 01011 #else 01012 /* 01013 * \brief Function is a RF interrupt vector. End of frame in RX and TX are handled here as well as CCA process interrupt. 01014 * 01015 * \param none 01016 * 01017 * \return none 01018 */ 01019 static void rf_if_interrupt_handler(void) 01020 #endif 01021 { 01022 uint8_t irq_status, full_trx_status; 01023 01024 /*Read and clear interrupt flag, and pick up trx_status*/ 01025 irq_status = rf_if_read_register_with_status(IRQ_STATUS, &full_trx_status); 01026 01027 /*Frame end interrupt (RX and TX)*/ 01028 if (irq_status & TRX_END) { 01029 rf_trx_states_t trx_status = rf_if_trx_status_from_full(full_trx_status); 01030 if (rf_flags & RFF_TX) { 01031 rf_handle_tx_end(trx_status); 01032 } else if (rf_flags & RFF_RX) { 01033 rf_handle_rx_end(trx_status); 01034 } else { 01035 //something went really wrong 01036 } 01037 } 01038 if (irq_status & CCA_ED_DONE) { 01039 rf_handle_cca_ed_done(full_trx_status); 01040 } 01041 if (irq_status & TRX_UR) { 01042 // Here some counter could be used to monitor the under run occurrence count. 01043 // Do not print anything here! 01044 } 01045 } 01046 01047 /* 01048 * \brief Function writes/read data in SPI interface 01049 */ 01050 static void rf_if_spi_exchange_n(const void *tx, size_t tx_len, void *rx, size_t rx_len) 01051 { 01052 #if 1 01053 rf->spi.write(static_cast<const char *>(tx), tx_len, 01054 static_cast<char *>(rx), rx_len); 01055 #else 01056 const uint8_t *txb = static_cast<const uint8_t *>(tx); 01057 uint8_t *rxb = static_cast<uint8_t *>(rx); 01058 while (tx_len > 0 || rx_len > 0) { 01059 uint8_t b; 01060 if (tx_len) { 01061 tx_len--; 01062 b = *txb++; 01063 } else { 01064 b = 0xFF; 01065 } 01066 b = rf->spi.write(b); 01067 if (rx_len) { 01068 rx_len--; 01069 *rxb++ = b; 01070 } 01071 } 01072 #endif 01073 } 01074 01075 /* 01076 * \brief Function sets given RF flag on. 01077 * 01078 * \param x Given RF flag 01079 * 01080 * \return none 01081 */ 01082 static void rf_flags_set(uint8_t x) 01083 { 01084 rf_flags |= x; 01085 } 01086 01087 /* 01088 * \brief Function clears given RF flag on. 01089 * 01090 * \param x Given RF flag 01091 * 01092 * \return none 01093 */ 01094 static void rf_flags_clear(uint8_t x) 01095 { 01096 rf_flags &= ~x; 01097 } 01098 01099 /* 01100 * \brief Function checks if given RF flag is on. 01101 * 01102 * \param x Given RF flag 01103 * 01104 * \return states of the given flags 01105 */ 01106 static uint8_t rf_flags_check(uint8_t x) 01107 { 01108 return (rf_flags & x); 01109 } 01110 01111 /* 01112 * \brief Function clears all RF flags. 01113 * 01114 * \param none 01115 * 01116 * \return none 01117 */ 01118 static void rf_flags_reset(void) 01119 { 01120 rf_flags = 0; 01121 } 01122 01123 /* 01124 * \brief Function initialises and registers the RF driver. 01125 * 01126 * \param none 01127 * 01128 * \return rf_radio_driver_id Driver ID given by NET library 01129 */ 01130 static int8_t rf_device_register(const uint8_t *mac_addr) 01131 { 01132 rf_trx_part_e radio_type; 01133 01134 rf_init(); 01135 01136 radio_type = rf_radio_type_read(); 01137 if (radio_type != ATMEL_UNKNOW_DEV) { 01138 /*Set pointer to MAC address*/ 01139 device_driver.PHY_MAC = (uint8_t *)mac_addr; 01140 device_driver.driver_description = (char *)"ATMEL_MAC"; 01141 //Create setup Used Radio chips 01142 if (radio_type == ATMEL_AT86RF212) { 01143 device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE; 01144 } else { 01145 device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE; 01146 } 01147 device_driver.phy_channel_pages = phy_channel_pages; 01148 /*Maximum size of payload is 127*/ 01149 device_driver.phy_MTU = 127; 01150 /*No header in PHY*/ 01151 device_driver.phy_header_length = 0; 01152 /*No tail in PHY*/ 01153 device_driver.phy_tail_length = 0; 01154 /*Set address write function*/ 01155 device_driver.address_write = &rf_address_write; 01156 /*Set RF extension function*/ 01157 device_driver.extension = &rf_extension; 01158 /*Set RF state control function*/ 01159 device_driver.state_control = &rf_interface_state_control; 01160 /*Set transmit function*/ 01161 device_driver.tx = &rf_start_cca; 01162 /*NULLIFY rx and tx_done callbacks*/ 01163 device_driver.phy_rx_cb = NULL; 01164 device_driver.phy_tx_done_cb = NULL; 01165 /*Register device driver*/ 01166 rf_radio_driver_id = arm_net_phy_register(&device_driver); 01167 } else { 01168 rf_if_disable_irq(); 01169 } 01170 return rf_radio_driver_id; 01171 } 01172 01173 /* 01174 * \brief Function unregisters the RF driver. 01175 * 01176 * \param none 01177 * 01178 * \return none 01179 */ 01180 static void rf_device_unregister() 01181 { 01182 if (rf_radio_driver_id >= 0) { 01183 arm_net_phy_unregister(rf_radio_driver_id); 01184 rf_radio_driver_id = -1; 01185 } 01186 } 01187 01188 01189 /* 01190 * \brief Function is a call back for ACK wait timeout. 01191 * 01192 * \param none 01193 * 01194 * \return none 01195 */ 01196 static void rf_ack_wait_timer_interrupt(void) 01197 { 01198 rf_if_lock(); 01199 rf_give_up_on_ack(); 01200 rf_if_unlock(); 01201 } 01202 01203 /* 01204 * \brief Function is a call back for calibration interval timer. 01205 * 01206 * \param none 01207 * 01208 * \return none 01209 */ 01210 static void rf_calibration_timer_interrupt(void) 01211 { 01212 /*Calibrate RF*/ 01213 rf_calibration_cb(); 01214 /*Start new calibration timeout*/ 01215 rf_calibration_timer_start(RF_CALIBRATION_INTERVAL); 01216 } 01217 01218 /* 01219 * \brief Function is a call back for cca interval timer. 01220 * 01221 * \param none 01222 * 01223 * \return none 01224 */ 01225 static void rf_cca_timer_interrupt(void) 01226 { 01227 rf_flags_set(RFF_CCA); 01228 /*Start CCA process*/ 01229 rf_if_start_cca_process(); 01230 } 01231 01232 /* 01233 * \brief Function starts the ACK wait timeout. 01234 * 01235 * \param slots Given slots, resolution 50us 01236 * 01237 * \return none 01238 */ 01239 static void rf_ack_wait_timer_start(uint16_t slots) 01240 { 01241 rf_if_ack_wait_timer_start(slots); 01242 } 01243 01244 /* 01245 * \brief Function starts the calibration interval. 01246 * 01247 * \param slots Given slots, resolution 50us 01248 * 01249 * \return none 01250 */ 01251 static void rf_calibration_timer_start(uint32_t slots) 01252 { 01253 rf_if_calibration_timer_start(slots); 01254 } 01255 01256 /* 01257 * \brief Function starts the CCA backoff. 01258 * 01259 * \param slots Given slots, resolution 50us 01260 * 01261 * \return none 01262 */ 01263 static void rf_cca_timer_start(uint32_t slots) 01264 { 01265 rf_if_cca_timer_start(slots); 01266 } 01267 01268 /* 01269 * \brief Function stops the CCA backoff. 01270 * 01271 * \return none 01272 */ 01273 static void rf_cca_timer_stop(void) 01274 { 01275 rf_if_cca_timer_stop(); 01276 } 01277 01278 /* 01279 * \brief Function writes various RF settings in startup. 01280 * 01281 * \param none 01282 * 01283 * \return none 01284 */ 01285 static void rf_write_settings(void) 01286 { 01287 rf_if_lock(); 01288 rf_if_write_rf_settings(); 01289 /*Set output power*/ 01290 rf_if_write_set_tx_power_register(radio_tx_power); 01291 /*Initialise Antenna Diversity*/ 01292 if (rf_use_antenna_diversity) { 01293 rf_if_write_antenna_diversity_settings(); 01294 } 01295 rf_if_unlock(); 01296 } 01297 01298 /* 01299 * \brief Function writes 16-bit address in RF address filter. 01300 * 01301 * \param short_address Given short address 01302 * 01303 * \return none 01304 */ 01305 static void rf_set_short_adr(uint8_t *short_address) 01306 { 01307 rf_if_lock(); 01308 /*Wake up RF if sleeping*/ 01309 if (rf_flags_check(RFF_ON) == 0) { 01310 rf_if_disable_slptr(); 01311 rf_poll_trx_state_change(TRX_OFF); 01312 } 01313 /*Write address filter registers*/ 01314 rf_if_write_short_addr_registers(short_address); 01315 /*RF back to sleep*/ 01316 if (rf_flags_check(RFF_ON) == 0) { 01317 rf_if_enable_slptr(); 01318 } 01319 rf_if_unlock(); 01320 } 01321 01322 /* 01323 * \brief Function writes PAN Id in RF PAN Id filter. 01324 * 01325 * \param pan_id Given PAN Id 01326 * 01327 * \return none 01328 */ 01329 static void rf_set_pan_id(uint8_t *pan_id) 01330 { 01331 rf_if_lock(); 01332 /*Wake up RF if sleeping*/ 01333 if (rf_flags_check(RFF_ON) == 0) { 01334 rf_if_disable_slptr(); 01335 rf_poll_trx_state_change(TRX_OFF); 01336 } 01337 /*Write address filter registers*/ 01338 rf_if_write_pan_id_registers(pan_id); 01339 /*RF back to sleep*/ 01340 if (rf_flags_check(RFF_ON) == 0) { 01341 rf_if_enable_slptr(); 01342 } 01343 rf_if_unlock(); 01344 } 01345 01346 /* 01347 * \brief Function writes 64-bit address in RF address filter. 01348 * 01349 * \param address Given 64-bit address 01350 * 01351 * \return none 01352 */ 01353 static void rf_set_address(uint8_t *address) 01354 { 01355 rf_if_lock(); 01356 /*Wake up RF if sleeping*/ 01357 if (rf_flags_check(RFF_ON) == 0) { 01358 rf_if_disable_slptr(); 01359 rf_poll_trx_state_change(TRX_OFF); 01360 } 01361 /*Write address filter registers*/ 01362 rf_if_write_ieee_addr_registers(address); 01363 /*RF back to sleep*/ 01364 if (rf_flags_check(RFF_ON) == 0) { 01365 rf_if_enable_slptr(); 01366 } 01367 rf_if_unlock(); 01368 } 01369 01370 /* 01371 * \brief Function sets the RF channel. 01372 * 01373 * \param ch New channel 01374 * 01375 * \return none 01376 */ 01377 static void rf_channel_set(uint8_t ch) 01378 { 01379 rf_if_lock(); 01380 rf_phy_channel = ch; 01381 if (ch < 0x1f) { 01382 rf_if_set_channel_register(ch); 01383 } 01384 rf_if_unlock(); 01385 } 01386 01387 01388 /* 01389 * \brief Function initialises the radio driver and resets the radio. 01390 * 01391 * \param none 01392 * 01393 * \return none 01394 */ 01395 static void rf_init(void) 01396 { 01397 rf_if_lock(); 01398 01399 /*Write RF settings*/ 01400 rf_write_settings(); 01401 /*Initialise PHY mode*/ 01402 rf_init_phy_mode(); 01403 /*Clear RF flags*/ 01404 rf_flags_reset(); 01405 /*Set RF in TRX OFF state*/ 01406 rf_if_change_trx_state(TRX_OFF); 01407 /*Set RF in PLL_ON state*/ 01408 rf_trx_states_t trx_status = rf_if_change_trx_state(PLL_ON); 01409 /*Start receiver*/ 01410 rf_receive(trx_status); 01411 /*Read randomness, and add to seed*/ 01412 randLIB_add_seed(rf_if_read_rnd()); 01413 /*Start RF calibration timer*/ 01414 rf_calibration_timer_start(RF_CALIBRATION_INTERVAL); 01415 01416 rf_if_unlock(); 01417 } 01418 01419 /** 01420 * \brief Function gets called when MAC is setting radio off. 01421 * 01422 * \param none 01423 * 01424 * \return none 01425 */ 01426 static void rf_off(void) 01427 { 01428 if (rf_flags_check(RFF_ON)) { 01429 rf_if_lock(); 01430 rf_cca_abort(); 01431 uint16_t while_counter = 0; 01432 /*Wait while receiving*/ 01433 while (rf_if_read_trx_state() == BUSY_RX_AACK) { 01434 while_counter++; 01435 if (while_counter == 0xffff) { 01436 break; 01437 } 01438 } 01439 /*RF state change: RX_AACK_ON->PLL_ON->TRX_OFF->SLEEP*/ 01440 if (rf_if_read_trx_state() == RX_AACK_ON) { 01441 rf_if_change_trx_state(PLL_ON); 01442 } 01443 rf_if_change_trx_state(TRX_OFF); 01444 rf_if_enable_slptr(); 01445 01446 /*Disable Antenna Diversity*/ 01447 if (rf_use_antenna_diversity) { 01448 rf_if_disable_ant_div(); 01449 } 01450 rf_if_unlock(); 01451 } 01452 01453 /*Clears all flags*/ 01454 rf_flags_reset(); 01455 } 01456 01457 /* 01458 * \brief Function polls the RF state until it has changed to desired state. 01459 * 01460 * \param trx_state RF state 01461 * 01462 * \return none 01463 */ 01464 static rf_trx_states_t rf_poll_trx_state_change(rf_trx_states_t trx_state) 01465 { 01466 uint16_t while_counter = 0; 01467 01468 if (trx_state == FORCE_PLL_ON) { 01469 trx_state = PLL_ON; 01470 } else if (trx_state == FORCE_TRX_OFF) { 01471 trx_state = TRX_OFF; 01472 } 01473 01474 rf_trx_states_t state_out; 01475 while ((state_out = rf_if_read_trx_state()) != trx_state) { 01476 while_counter++; 01477 if (while_counter == 0x1ff) { 01478 break; 01479 } 01480 } 01481 01482 return state_out; 01483 } 01484 01485 /* 01486 * \brief Function polls the RF state until it is no longer transitioning. 01487 * 01488 * \param trx_state RF state 01489 * 01490 * \return none 01491 */ 01492 static rf_trx_states_t rf_poll_for_state(void) 01493 { 01494 rf_trx_states_t state_out; 01495 while ((state_out = rf_if_read_trx_state()) == STATE_TRANSITION_IN_PROGRESS) { 01496 } 01497 01498 return state_out; 01499 } 01500 01501 /* 01502 * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO. 01503 * 01504 * \param data_ptr Pointer to TX data (excluding FCS) 01505 * \param data_length Length of the TX data (excluding FCS) 01506 * \param tx_handle Handle to transmission 01507 * \return 0 Success 01508 * \return -1 Busy 01509 */ 01510 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol) 01511 { 01512 (void)data_protocol; 01513 rf_if_lock(); 01514 /*Check if transmitter is busy*/ 01515 rf_trx_states_t trx_state = rf_if_read_trx_state(); 01516 if (trx_state == BUSY_RX || trx_state == BUSY_RX_AACK || data_length > RF_MTU - 2) { 01517 rf_if_unlock(); 01518 /*Return busy*/ 01519 return -1; 01520 } else { 01521 rf_give_up_on_ack(); 01522 01523 /*Nanostack has a static TX buffer, which will remain valid until we*/ 01524 /*generate a callback, so we just note the pointer for reading later.*/ 01525 rf_tx_data = data_ptr; 01526 rf_tx_length = data_length; 01527 /*Start CCA timeout*/ 01528 rf_cca_timer_start(RF_CCA_BASE_BACKOFF + randLIB_get_random_in_range(0, RF_CCA_RANDOM_BACKOFF)); 01529 /*Store TX handle*/ 01530 mac_tx_handle = tx_handle; 01531 rf_if_unlock(); 01532 } 01533 01534 /*Return success*/ 01535 return 0; 01536 } 01537 01538 /* 01539 * \brief Function aborts CCA process. 01540 * 01541 * \param none 01542 * 01543 * \return none 01544 */ 01545 static void rf_cca_abort(void) 01546 { 01547 rf_cca_timer_stop(); 01548 rf_flags_clear(RFF_CCA); 01549 } 01550 01551 /* 01552 * \brief Function starts the transmission of the frame. 01553 * 01554 * \param none 01555 * 01556 * \return none 01557 */ 01558 static bool rf_start_tx() 01559 { 01560 /* Attempt change to PLL_ON */ 01561 rf_if_write_register(TRX_STATE, PLL_ON); 01562 01563 // It appears that if radio is busy, rather than ignoring the state change, 01564 // the state change happens when it stops being busy - eg 01565 // after address match fail or finishing reception. If this happens, we do 01566 // not want to transmit - our channel clear check is stale (either someone is 01567 // still transmitting, or it's a long time since we checked). So wait for the 01568 // PLL_ON change and then go to receive mode without trying to transmit. 01569 rf_trx_states_t state = rf_poll_for_state(); 01570 int poll_count = 0; 01571 while (state != PLL_ON) { 01572 /* Change didn't work (yet) - must be busy - assume it will eventually change */ 01573 state = rf_poll_for_state(); 01574 poll_count++; 01575 } 01576 01577 rf_flags_clear(RFF_RX); 01578 // Check whether we saw any delay in the PLL_ON transition. 01579 if (poll_count > 0) { 01580 // let's get back to the receiving state. 01581 rf_receive(state); 01582 return false; 01583 } 01584 01585 rf_flags_set(RFF_TX); 01586 /*RF state change: SLP_TR pulse triggers PLL_ON->BUSY_TX*/ 01587 rf_if_enable_slptr(); 01588 /*Chip permits us to write frame buffer while it is transmitting*/ 01589 /*As long as first byte of data is in within 176us of TX start, we're good */ 01590 rf_if_write_frame_buffer(rf_tx_data, rf_tx_length); 01591 rf_if_disable_slptr(); 01592 return true; 01593 } 01594 01595 /* 01596 * \brief Function sets the RF in RX state. 01597 * 01598 * \param none 01599 * 01600 * \return none 01601 */ 01602 static void rf_receive(rf_trx_states_t trx_status) 01603 { 01604 uint16_t while_counter = 0; 01605 if (rf_flags_check(RFF_ON) == 0) { 01606 rf_on(); 01607 rf_channel_set(rf_phy_channel); 01608 trx_status = TRX_OFF; 01609 } 01610 /*If not yet in RX state set it*/ 01611 if (rf_flags_check(RFF_RX) == 0) { 01612 /*Wait while receiving data. Just making sure, usually this shouldn't happen. */ 01613 while (trx_status == BUSY_RX || trx_status == BUSY_RX_AACK || trx_status == STATE_TRANSITION_IN_PROGRESS) { 01614 while_counter++; 01615 if (while_counter == 0xffff) { 01616 break; 01617 } 01618 trx_status = rf_if_read_trx_state(); 01619 } 01620 01621 if ((rf_mode == RF_MODE_SNIFFER) || (rf_mode == RF_MODE_ED)) { 01622 if (trx_status != RX_ON) { 01623 trx_status = rf_if_change_trx_state(RX_ON); 01624 } 01625 } else { 01626 /*ACK is always received in promiscuous mode to bypass address filters*/ 01627 if (rf_rx_mode) { 01628 rf_rx_mode = 0; 01629 rf_if_enable_promiscuous_mode(); 01630 } else { 01631 rf_if_disable_promiscuous_mode(); 01632 } 01633 if (trx_status != RX_AACK_ON) { 01634 trx_status = rf_if_change_trx_state(RX_AACK_ON); 01635 } 01636 } 01637 /*If calibration timer was unable to calibrate the RF, run calibration now*/ 01638 if (!rf_tuned) { 01639 /*Start calibration. This can be done in states TRX_OFF, PLL_ON or in any receive state*/ 01640 rf_if_calibration(); 01641 /*RF is tuned now*/ 01642 rf_tuned = 1; 01643 } 01644 01645 rf_flags_set(RFF_RX); 01646 } 01647 } 01648 01649 /* 01650 * \brief Function calibrates the radio. 01651 * 01652 * \param none 01653 * 01654 * \return none 01655 */ 01656 static void rf_calibration_cb(void) 01657 { 01658 /*clear tuned flag to start tuning in rf_receive*/ 01659 rf_tuned = 0; 01660 /*If RF is in default receive state, start calibration*/ 01661 if (rf_if_read_trx_state() == RX_AACK_ON) { 01662 rf_if_lock(); 01663 /*Set RF in PLL_ON state*/ 01664 rf_if_change_trx_state(PLL_ON); 01665 /*Set RF in TRX_OFF state to start PLL tuning*/ 01666 rf_if_change_trx_state(TRX_OFF); 01667 /*Set RF in RX_ON state to calibrate*/ 01668 rf_trx_states_t trx_status = rf_if_change_trx_state(RX_ON); 01669 /*Calibrate FTN*/ 01670 rf_if_calibration(); 01671 /*RF is tuned now*/ 01672 rf_tuned = 1; 01673 /*Back to default receive state*/ 01674 rf_flags_clear(RFF_RX); 01675 rf_receive(trx_status); 01676 rf_if_unlock(); 01677 } 01678 } 01679 01680 /* 01681 * \brief Function sets RF_ON flag when radio is powered. 01682 * 01683 * \param none 01684 * 01685 * \return none 01686 */ 01687 static void rf_on(void) 01688 { 01689 /*Set RFF_ON flag*/ 01690 if (rf_flags_check(RFF_ON) == 0) { 01691 rf_if_lock(); 01692 rf_flags_set(RFF_ON); 01693 /*Enable Antenna diversity*/ 01694 if (rf_use_antenna_diversity) 01695 /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/ 01696 { 01697 rf_if_enable_ant_div(); 01698 } 01699 01700 /*Wake up from sleep state*/ 01701 rf_if_disable_slptr(); 01702 rf_poll_trx_state_change(TRX_OFF); 01703 rf_if_unlock(); 01704 } 01705 } 01706 01707 /* 01708 * \brief Abandon waiting for an ack frame 01709 01710 * \return none 01711 */ 01712 static void rf_give_up_on_ack(void) 01713 { 01714 if (expected_ack_sequence == -1) { 01715 return; 01716 } 01717 01718 rf_if_disable_promiscuous_mode(); 01719 rf_if_ack_wait_timer_stop(); 01720 expected_ack_sequence = -1; 01721 01722 if (device_driver.phy_tx_done_cb) { 01723 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_FAIL, 0, 0); 01724 } 01725 } 01726 01727 /* 01728 * \brief Function handles the received ACK frame. 01729 * 01730 * \param seq_number Sequence number of received ACK 01731 * \param data_pending Pending bit state in received ACK 01732 * 01733 * \return none 01734 */ 01735 static void rf_handle_ack(uint8_t seq_number, uint8_t data_pending) 01736 { 01737 phy_link_tx_status_e phy_status; 01738 /*Received ACK sequence must be equal with transmitted packet sequence*/ 01739 if (expected_ack_sequence == seq_number) { 01740 rf_if_disable_promiscuous_mode(); 01741 rf_if_ack_wait_timer_stop(); 01742 expected_ack_sequence = -1; 01743 01744 /*When data pending bit in ACK frame is set, inform NET library*/ 01745 if (data_pending) { 01746 phy_status = PHY_LINK_TX_DONE_PENDING; 01747 } else { 01748 phy_status = PHY_LINK_TX_DONE; 01749 } 01750 /*Call PHY TX Done API*/ 01751 if (device_driver.phy_tx_done_cb) { 01752 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, phy_status, 0, 0); 01753 } 01754 } else { 01755 rf_give_up_on_ack(); 01756 } 01757 } 01758 01759 /* 01760 * \brief Function is a call back for RX end interrupt. 01761 * 01762 * \param none 01763 * 01764 * \return none 01765 */ 01766 static void rf_handle_rx_end(rf_trx_states_t trx_status) 01767 { 01768 /*Frame received interrupt*/ 01769 if (!rf_flags_check(RFF_RX)) { 01770 return; 01771 } 01772 01773 static uint8_t rf_buffer[RF_MTU]; 01774 uint8_t rf_lqi, rf_ed; 01775 int8_t rf_rssi; 01776 bool crc_good; 01777 01778 /*Read received packet*/ 01779 uint8_t len = rf_if_read_packet(rf_buffer, &rf_lqi, &rf_ed, &crc_good); 01780 01781 if (len < 5 || !crc_good) { 01782 rf_give_up_on_ack(); 01783 return; 01784 } 01785 01786 /* Convert raw ED to dBm value (chip-dependent) */ 01787 rf_rssi = rf_if_scale_rssi(rf_ed); 01788 01789 /* Create a virtual LQI using received RSSI, forgetting actual HW LQI */ 01790 /* (should be done through PHY_EXTENSION_CONVERT_SIGNAL_INFO) */ 01791 rf_lqi = rf_scale_lqi(rf_rssi); 01792 01793 /*Handle received ACK*/ 01794 if ((rf_buffer[0] & 0x07) == 0x02 && rf_mode != RF_MODE_SNIFFER) { 01795 /*Check if data is pending*/ 01796 bool pending = (rf_buffer[0] & 0x10); 01797 01798 /*Send sequence number in ACK handler*/ 01799 rf_handle_ack(rf_buffer[2], pending); 01800 } else { 01801 rf_give_up_on_ack(); 01802 if (device_driver.phy_rx_cb) { 01803 device_driver.phy_rx_cb(rf_buffer, len - 2, rf_lqi, rf_rssi, rf_radio_driver_id); 01804 } 01805 } 01806 } 01807 01808 /* 01809 * \brief Function is called when MAC is shutting down the radio. 01810 * 01811 * \param none 01812 * 01813 * \return none 01814 */ 01815 static void rf_shutdown(void) 01816 { 01817 /*Call RF OFF*/ 01818 rf_off(); 01819 } 01820 01821 /* 01822 * \brief Function is a call back for TX end interrupt. 01823 * 01824 * \param none 01825 * 01826 * \return none 01827 */ 01828 static void rf_handle_tx_end(rf_trx_states_t trx_status) 01829 { 01830 rf_rx_mode = 0; 01831 /*If ACK is needed for this transmission*/ 01832 if ((rf_tx_data[0] & 0x20) && rf_flags_check(RFF_TX)) { 01833 expected_ack_sequence = rf_tx_data[2]; 01834 rf_ack_wait_timer_start(rf_ack_wait_duration); 01835 rf_rx_mode = 1; 01836 } 01837 rf_flags_clear(RFF_TX); 01838 /*Start receiver*/ 01839 rf_receive(trx_status); 01840 01841 /*Call PHY TX Done API*/ 01842 if (device_driver.phy_tx_done_cb) { 01843 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0, 0); 01844 } 01845 } 01846 01847 /* 01848 * \brief Function is a call back for CCA ED done interrupt. 01849 * 01850 * \param none 01851 * 01852 * \return none 01853 */ 01854 static void rf_handle_cca_ed_done(uint8_t full_trx_status) 01855 { 01856 if (!rf_flags_check(RFF_CCA)) { 01857 return; 01858 } 01859 rf_flags_clear(RFF_CCA); 01860 01861 bool success = false; 01862 01863 /*Check the result of CCA process*/ 01864 if ((full_trx_status & CCA_STATUS) && rf_if_trx_status_from_full(full_trx_status) == RX_AACK_ON) { 01865 success = rf_start_tx(); 01866 } 01867 01868 if (!success) { 01869 /*Send CCA fail notification*/ 01870 if (device_driver.phy_tx_done_cb) { 01871 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0); 01872 } 01873 } 01874 } 01875 01876 /* 01877 * \brief Function gives the control of RF states to MAC. 01878 * 01879 * \param new_state RF state 01880 * \param rf_channel RF channel 01881 * 01882 * \return 0 Success 01883 */ 01884 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel) 01885 { 01886 int8_t ret_val = 0; 01887 switch (new_state) { 01888 /*Reset PHY driver and set to idle*/ 01889 case PHY_INTERFACE_RESET: 01890 break; 01891 /*Disable PHY Interface driver*/ 01892 case PHY_INTERFACE_DOWN: 01893 rf_shutdown(); 01894 break; 01895 /*Enable PHY Interface driver*/ 01896 case PHY_INTERFACE_UP: 01897 rf_if_lock(); 01898 rf_mode = RF_MODE_NORMAL; 01899 rf_channel_set(rf_channel); 01900 rf_receive(); 01901 rf_if_enable_irq(); 01902 rf_if_unlock(); 01903 break; 01904 /*Enable wireless interface ED scan mode*/ 01905 case PHY_INTERFACE_RX_ENERGY_STATE: 01906 rf_mode = RF_MODE_ED; 01907 rf_channel_set(rf_channel); 01908 rf_receive(); 01909 rf_if_disable_irq(); 01910 // Read status to clear pending flags. 01911 rf_if_read_register(IRQ_STATUS); 01912 // ED can be initiated by writing arbitrary value to PHY_ED_LEVEL 01913 rf_if_write_register(PHY_ED_LEVEL, 0xff); 01914 break; 01915 case PHY_INTERFACE_SNIFFER_STATE: /**< Enable Sniffer state */ 01916 rf_mode = RF_MODE_SNIFFER; 01917 rf_channel_set(rf_channel); 01918 rf_flags_clear(RFF_RX); 01919 rf_receive(); 01920 rf_if_enable_irq(); 01921 break; 01922 } 01923 return ret_val; 01924 } 01925 01926 /* 01927 * \brief Function controls the ACK pending, channel setting and energy detection. 01928 * 01929 * \param extension_type Type of control 01930 * \param data_ptr Data from NET library 01931 * 01932 * \return 0 Success 01933 */ 01934 static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr) 01935 { 01936 switch (extension_type) { 01937 /*Control MAC pending bit for Indirect data transmission*/ 01938 case PHY_EXTENSION_CTRL_PENDING_BIT: 01939 if (*data_ptr) { 01940 rf_if_ack_pending_ctrl(1); 01941 } else { 01942 rf_if_ack_pending_ctrl(0); 01943 } 01944 break; 01945 /*Return frame pending status*/ 01946 case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS: 01947 *data_ptr = rf_if_last_acked_pending(); 01948 break; 01949 /*Set channel*/ 01950 case PHY_EXTENSION_SET_CHANNEL: 01951 break; 01952 /*Read energy on the channel*/ 01953 case PHY_EXTENSION_READ_CHANNEL_ENERGY: 01954 // End of the ED measurement is indicated by CCA_ED_DONE 01955 while (!(rf_if_read_register(IRQ_STATUS) & CCA_ED_DONE)); 01956 // RF input power: RSSI base level + 1[db] * PHY_ED_LEVEL 01957 *data_ptr = rf_sensitivity + rf_if_read_register(PHY_ED_LEVEL); 01958 // Read status to clear pending flags. 01959 rf_if_read_register(IRQ_STATUS); 01960 // Next ED measurement is started, next PHY_EXTENSION_READ_CHANNEL_ENERGY call will return the result. 01961 rf_if_write_register(PHY_ED_LEVEL, 0xff); 01962 break; 01963 /*Read status of the link*/ 01964 case PHY_EXTENSION_READ_LINK_STATUS: 01965 break; 01966 default: 01967 break; 01968 } 01969 return 0; 01970 } 01971 01972 /* 01973 * \brief Function sets the addresses to RF address filters. 01974 * 01975 * \param address_type Type of address 01976 * \param address_ptr Pointer to given address 01977 * 01978 * \return 0 Success 01979 */ 01980 static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr) 01981 { 01982 int8_t ret_val = 0; 01983 switch (address_type) { 01984 /*Set 48-bit address*/ 01985 case PHY_MAC_48BIT: 01986 break; 01987 /*Set 64-bit address*/ 01988 case PHY_MAC_64BIT: 01989 rf_set_address(address_ptr); 01990 break; 01991 /*Set 16-bit address*/ 01992 case PHY_MAC_16BIT: 01993 rf_set_short_adr(address_ptr); 01994 break; 01995 /*Set PAN Id*/ 01996 case PHY_MAC_PANID: 01997 rf_set_pan_id(address_ptr); 01998 break; 01999 } 02000 return ret_val; 02001 } 02002 02003 /* 02004 * \brief Function initialises the ACK wait time and returns the used PHY mode. 02005 * 02006 * \param none 02007 * 02008 * \return tmp Used PHY mode 02009 */ 02010 static void rf_init_phy_mode(void) 02011 { 02012 uint8_t tmp = 0; 02013 uint8_t part = rf_if_read_part_num(); 02014 /*Read used PHY Mode*/ 02015 tmp = rf_if_read_register(TRX_CTRL_2); 02016 /*Set ACK wait time for used data rate*/ 02017 if (part == PART_AT86RF212) { 02018 if ((tmp & 0x1f) == 0x00) { 02019 rf_sensitivity = -110; 02020 rf_ack_wait_duration = 938; 02021 tmp = BPSK_20; 02022 } else if ((tmp & 0x1f) == 0x04) { 02023 rf_sensitivity = -108; 02024 rf_ack_wait_duration = 469; 02025 tmp = BPSK_40; 02026 } else if ((tmp & 0x1f) == 0x14) { 02027 rf_sensitivity = -108; 02028 rf_ack_wait_duration = 469; 02029 tmp = BPSK_40_ALT; 02030 } else if ((tmp & 0x1f) == 0x08) { 02031 rf_sensitivity = -101; 02032 rf_ack_wait_duration = 50; 02033 tmp = OQPSK_SIN_RC_100; 02034 } else if ((tmp & 0x1f) == 0x09) { 02035 rf_sensitivity = -99; 02036 rf_ack_wait_duration = 30; 02037 tmp = OQPSK_SIN_RC_200; 02038 } else if ((tmp & 0x1f) == 0x18) { 02039 rf_sensitivity = -102; 02040 rf_ack_wait_duration = 50; 02041 tmp = OQPSK_RC_100; 02042 } else if ((tmp & 0x1f) == 0x19) { 02043 rf_sensitivity = -100; 02044 rf_ack_wait_duration = 30; 02045 tmp = OQPSK_RC_200; 02046 } else if ((tmp & 0x1f) == 0x0c) { 02047 rf_sensitivity = -100; 02048 rf_ack_wait_duration = 20; 02049 tmp = OQPSK_SIN_250; 02050 } else if ((tmp & 0x1f) == 0x0d) { 02051 rf_sensitivity = -98; 02052 rf_ack_wait_duration = 25; 02053 tmp = OQPSK_SIN_500; 02054 } else if ((tmp & 0x1f) == 0x0f) { 02055 rf_sensitivity = -98; 02056 rf_ack_wait_duration = 25; 02057 tmp = OQPSK_SIN_500_ALT; 02058 } else if ((tmp & 0x1f) == 0x1c) { 02059 rf_sensitivity = -101; 02060 rf_ack_wait_duration = 20; 02061 tmp = OQPSK_RC_250; 02062 } else if ((tmp & 0x1f) == 0x1d) { 02063 rf_sensitivity = -99; 02064 rf_ack_wait_duration = 25; 02065 tmp = OQPSK_RC_500; 02066 } else if ((tmp & 0x1f) == 0x1f) { 02067 rf_sensitivity = -99; 02068 rf_ack_wait_duration = 25; 02069 tmp = OQPSK_RC_500_ALT; 02070 } else if ((tmp & 0x3f) == 0x2A) { 02071 rf_sensitivity = -91; 02072 rf_ack_wait_duration = 25; 02073 tmp = OQPSK_SIN_RC_400_SCR_ON; 02074 } else if ((tmp & 0x3f) == 0x0A) { 02075 rf_sensitivity = -91; 02076 rf_ack_wait_duration = 25; 02077 tmp = OQPSK_SIN_RC_400_SCR_OFF; 02078 } else if ((tmp & 0x3f) == 0x3A) { 02079 rf_sensitivity = -97; 02080 rf_ack_wait_duration = 25; 02081 tmp = OQPSK_RC_400_SCR_ON; 02082 } else if ((tmp & 0x3f) == 0x1A) { 02083 rf_sensitivity = -97; 02084 rf_ack_wait_duration = 25; 02085 tmp = OQPSK_RC_400_SCR_OFF; 02086 } else if ((tmp & 0x3f) == 0x2E) { 02087 rf_sensitivity = -93; 02088 rf_ack_wait_duration = 13; 02089 tmp = OQPSK_SIN_1000_SCR_ON; 02090 } else if ((tmp & 0x3f) == 0x0E) { 02091 rf_sensitivity = -93; 02092 rf_ack_wait_duration = 13; 02093 tmp = OQPSK_SIN_1000_SCR_OFF; 02094 } else if ((tmp & 0x3f) == 0x3E) { 02095 rf_sensitivity = -95; 02096 rf_ack_wait_duration = 13; 02097 tmp = OQPSK_RC_1000_SCR_ON; 02098 } else if ((tmp & 0x3f) == 0x1E) { 02099 rf_sensitivity = -95; 02100 rf_ack_wait_duration = 13; 02101 tmp = OQPSK_RC_1000_SCR_OFF; 02102 } 02103 } else { 02104 rf_sensitivity = -101; 02105 rf_ack_wait_duration = 20; 02106 } 02107 /*Board design might reduces the sensitivity*/ 02108 //rf_sensitivity += RF_SENSITIVITY_CALIBRATION; 02109 } 02110 02111 02112 static uint8_t rf_scale_lqi(int8_t rssi) 02113 { 02114 uint8_t scaled_lqi; 02115 02116 /*rssi < RF sensitivity*/ 02117 if (rssi < rf_sensitivity) { 02118 scaled_lqi = 0; 02119 } 02120 /*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/ 02121 /*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/ 02122 else if (rssi < (rf_sensitivity + 10)) { 02123 scaled_lqi = 31; 02124 } 02125 /*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/ 02126 /*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/ 02127 else if (rssi < (rf_sensitivity + 20)) { 02128 scaled_lqi = 207; 02129 } 02130 /*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/ 02131 /*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/ 02132 else if (rssi < (rf_sensitivity + 30)) { 02133 scaled_lqi = 255; 02134 } 02135 /*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/ 02136 /*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/ 02137 else if (rssi < (rf_sensitivity + 40)) { 02138 scaled_lqi = 255; 02139 } 02140 /*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/ 02141 /*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/ 02142 else if (rssi < (rf_sensitivity + 50)) { 02143 scaled_lqi = 255; 02144 } 02145 /*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/ 02146 /*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/ 02147 else if (rssi < (rf_sensitivity + 60)) { 02148 scaled_lqi = 255; 02149 } 02150 /*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/ 02151 /*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/ 02152 else if (rssi < (rf_sensitivity + 70)) { 02153 scaled_lqi = 255; 02154 } 02155 /*rssi > RF saturation*/ 02156 else if (rssi > (rf_sensitivity + 80)) { 02157 scaled_lqi = 111; 02158 } 02159 /*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/ 02160 /*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/ 02161 else { 02162 scaled_lqi = 255; 02163 } 02164 02165 return scaled_lqi; 02166 } 02167 02168 NanostackRfPhyAtmel::NanostackRfPhyAtmel(PinName spi_mosi, PinName spi_miso, 02169 PinName spi_sclk, PinName spi_cs, PinName spi_rst, PinName spi_slp, PinName spi_irq, 02170 PinName i2c_sda, PinName i2c_scl) 02171 : _mac(i2c_sda, i2c_scl), _mac_addr(), _rf(NULL), _mac_set(false), 02172 _spi_mosi(spi_mosi), _spi_miso(spi_miso), _spi_sclk(spi_sclk), 02173 _spi_cs(spi_cs), _spi_rst(spi_rst), _spi_slp(spi_slp), _spi_irq(spi_irq) 02174 { 02175 _rf = new RFBits(_spi_mosi, _spi_miso, _spi_sclk, _spi_cs, _spi_rst, _spi_slp, _spi_irq); 02176 } 02177 02178 NanostackRfPhyAtmel::~NanostackRfPhyAtmel() 02179 { 02180 delete _rf; 02181 } 02182 02183 int8_t NanostackRfPhyAtmel::rf_register() 02184 { 02185 if (NULL == _rf) { 02186 return -1; 02187 } 02188 02189 rf_if_lock(); 02190 02191 if (rf != NULL) { 02192 rf_if_unlock(); 02193 error("Multiple registrations of NanostackRfPhyAtmel not supported"); 02194 return -1; 02195 } 02196 02197 // Read the mac address if it hasn't been set by a user 02198 rf = _rf; 02199 if (!_mac_set) { 02200 int ret = _mac.read_eui64((void *)_mac_addr); 02201 if (ret < 0) { 02202 rf = NULL; 02203 rf_if_unlock(); 02204 return -1; 02205 } 02206 } 02207 02208 int8_t radio_id = rf_device_register(_mac_addr); 02209 if (radio_id < 0) { 02210 rf = NULL; 02211 } 02212 02213 rf_if_unlock(); 02214 return radio_id; 02215 } 02216 02217 void NanostackRfPhyAtmel::rf_unregister() 02218 { 02219 rf_if_lock(); 02220 02221 if (NULL == rf) { 02222 rf_if_unlock(); 02223 return; 02224 } 02225 02226 rf_device_unregister(); 02227 rf = NULL; 02228 02229 rf_if_unlock(); 02230 } 02231 02232 void NanostackRfPhyAtmel::get_mac_address(uint8_t *mac) 02233 { 02234 rf_if_lock(); 02235 02236 if (NULL == rf) { 02237 error("NanostackRfPhyAtmel Must be registered to read mac address"); 02238 rf_if_unlock(); 02239 return; 02240 } 02241 memcpy((void *)mac, (void *)_mac_addr, sizeof(_mac_addr)); 02242 02243 rf_if_unlock(); 02244 } 02245 02246 void NanostackRfPhyAtmel::set_mac_address(uint8_t *mac) 02247 { 02248 rf_if_lock(); 02249 02250 if (NULL != rf) { 02251 error("NanostackRfPhyAtmel cannot change mac address when running"); 02252 rf_if_unlock(); 02253 return; 02254 } 02255 memcpy((void *)_mac_addr, (void *)mac, sizeof(_mac_addr)); 02256 _mac_set = true; 02257 02258 rf_if_unlock(); 02259 } 02260 02261 #if MBED_CONF_ATMEL_RF_PROVIDE_DEFAULT 02262 02263 NanostackRfPhy &NanostackRfPhy::get_default_instance() 02264 { 02265 static NanostackRfPhyAtmel rf_phy(ATMEL_SPI_MOSI, ATMEL_SPI_MISO, ATMEL_SPI_SCLK, ATMEL_SPI_CS, 02266 ATMEL_SPI_RST, ATMEL_SPI_SLP, ATMEL_SPI_IRQ, ATMEL_I2C_SDA, ATMEL_I2C_SCL); 02267 return rf_phy; 02268 } 02269 02270 #endif // MBED_CONF_ATMEL_RF_PROVIDE_DEFAULT 02271 02272 #endif // MBED_CONF_NANOSTACK_CONFIGURATION
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