mbed-os5 only for TYBLE16
Dependents: TYBLE16_simple_data_logger TYBLE16_MP3_Air
platform/source/mbed_application.c@1:9db0e321a9f4, 2019-12-31 (annotated)
- Committer:
- kenjiArai
- Date:
- Tue Dec 31 06:02:27 2019 +0000
- Revision:
- 1:9db0e321a9f4
updated based on mbed-os5.15.0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
kenjiArai | 1:9db0e321a9f4 | 1 | /* mbed Microcontroller Library |
kenjiArai | 1:9db0e321a9f4 | 2 | * Copyright (c) 2017 ARM Limited |
kenjiArai | 1:9db0e321a9f4 | 3 | * SPDX-License-Identifier: Apache-2.0 |
kenjiArai | 1:9db0e321a9f4 | 4 | * |
kenjiArai | 1:9db0e321a9f4 | 5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
kenjiArai | 1:9db0e321a9f4 | 6 | * you may not use this file except in compliance with the License. |
kenjiArai | 1:9db0e321a9f4 | 7 | * You may obtain a copy of the License at |
kenjiArai | 1:9db0e321a9f4 | 8 | * |
kenjiArai | 1:9db0e321a9f4 | 9 | * http://www.apache.org/licenses/LICENSE-2.0 |
kenjiArai | 1:9db0e321a9f4 | 10 | * |
kenjiArai | 1:9db0e321a9f4 | 11 | * Unless required by applicable law or agreed to in writing, software |
kenjiArai | 1:9db0e321a9f4 | 12 | * distributed under the License is distributed on an "AS IS" BASIS, |
kenjiArai | 1:9db0e321a9f4 | 13 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
kenjiArai | 1:9db0e321a9f4 | 14 | * See the License for the specific language governing permissions and |
kenjiArai | 1:9db0e321a9f4 | 15 | * limitations under the License. |
kenjiArai | 1:9db0e321a9f4 | 16 | */ |
kenjiArai | 1:9db0e321a9f4 | 17 | |
kenjiArai | 1:9db0e321a9f4 | 18 | #include <stdlib.h> |
kenjiArai | 1:9db0e321a9f4 | 19 | #include <stdarg.h> |
kenjiArai | 1:9db0e321a9f4 | 20 | #include "device.h" |
kenjiArai | 1:9db0e321a9f4 | 21 | #include "platform/mbed_application.h" |
kenjiArai | 1:9db0e321a9f4 | 22 | #include "platform/mbed_mpu_mgmt.h" |
kenjiArai | 1:9db0e321a9f4 | 23 | |
kenjiArai | 1:9db0e321a9f4 | 24 | #if MBED_APPLICATION_SUPPORT |
kenjiArai | 1:9db0e321a9f4 | 25 | |
kenjiArai | 1:9db0e321a9f4 | 26 | #if defined(__CORTEX_A9) |
kenjiArai | 1:9db0e321a9f4 | 27 | |
kenjiArai | 1:9db0e321a9f4 | 28 | static void powerdown_gic(void); |
kenjiArai | 1:9db0e321a9f4 | 29 | |
kenjiArai | 1:9db0e321a9f4 | 30 | void mbed_start_application(uintptr_t address) |
kenjiArai | 1:9db0e321a9f4 | 31 | { |
kenjiArai | 1:9db0e321a9f4 | 32 | __disable_irq(); |
kenjiArai | 1:9db0e321a9f4 | 33 | powerdown_gic(); |
kenjiArai | 1:9db0e321a9f4 | 34 | __enable_irq(); |
kenjiArai | 1:9db0e321a9f4 | 35 | ((void(*)())address)(); |
kenjiArai | 1:9db0e321a9f4 | 36 | } |
kenjiArai | 1:9db0e321a9f4 | 37 | |
kenjiArai | 1:9db0e321a9f4 | 38 | static void powerdown_gic() |
kenjiArai | 1:9db0e321a9f4 | 39 | { |
kenjiArai | 1:9db0e321a9f4 | 40 | int i; |
kenjiArai | 1:9db0e321a9f4 | 41 | int j; |
kenjiArai | 1:9db0e321a9f4 | 42 | |
kenjiArai | 1:9db0e321a9f4 | 43 | for (i = 0; i < 32; i++) { |
kenjiArai | 1:9db0e321a9f4 | 44 | GICDistributor->ICENABLER[i] = 0xFFFFFFFF; |
kenjiArai | 1:9db0e321a9f4 | 45 | GICDistributor->ICPENDR[i] = 0xFFFFFFFF; |
kenjiArai | 1:9db0e321a9f4 | 46 | if (i < 4) { |
kenjiArai | 1:9db0e321a9f4 | 47 | GICDistributor->CPENDSGIR[i] = 0xFFFFFFFF; |
kenjiArai | 1:9db0e321a9f4 | 48 | } |
kenjiArai | 1:9db0e321a9f4 | 49 | for (j = 0; j < 8; j++) { |
kenjiArai | 1:9db0e321a9f4 | 50 | GICDistributor->IPRIORITYR[i * 8 + j] = 0x00000000; |
kenjiArai | 1:9db0e321a9f4 | 51 | } |
kenjiArai | 1:9db0e321a9f4 | 52 | } |
kenjiArai | 1:9db0e321a9f4 | 53 | } |
kenjiArai | 1:9db0e321a9f4 | 54 | |
kenjiArai | 1:9db0e321a9f4 | 55 | #else |
kenjiArai | 1:9db0e321a9f4 | 56 | |
kenjiArai | 1:9db0e321a9f4 | 57 | static void powerdown_nvic(void); |
kenjiArai | 1:9db0e321a9f4 | 58 | static void powerdown_scb(uint32_t vtor); |
kenjiArai | 1:9db0e321a9f4 | 59 | static void start_new_application(void *sp, void *pc); |
kenjiArai | 1:9db0e321a9f4 | 60 | |
kenjiArai | 1:9db0e321a9f4 | 61 | void mbed_start_application(uintptr_t address) |
kenjiArai | 1:9db0e321a9f4 | 62 | { |
kenjiArai | 1:9db0e321a9f4 | 63 | void *sp; |
kenjiArai | 1:9db0e321a9f4 | 64 | void *pc; |
kenjiArai | 1:9db0e321a9f4 | 65 | |
kenjiArai | 1:9db0e321a9f4 | 66 | // Interrupts are re-enabled in start_new_application |
kenjiArai | 1:9db0e321a9f4 | 67 | __disable_irq(); |
kenjiArai | 1:9db0e321a9f4 | 68 | |
kenjiArai | 1:9db0e321a9f4 | 69 | SysTick->CTRL = 0x00000000; |
kenjiArai | 1:9db0e321a9f4 | 70 | powerdown_nvic(); |
kenjiArai | 1:9db0e321a9f4 | 71 | powerdown_scb(address); |
kenjiArai | 1:9db0e321a9f4 | 72 | mbed_mpu_manager_deinit(); |
kenjiArai | 1:9db0e321a9f4 | 73 | |
kenjiArai | 1:9db0e321a9f4 | 74 | #ifdef MBED_DEBUG |
kenjiArai | 1:9db0e321a9f4 | 75 | // Configs to make debugging easier |
kenjiArai | 1:9db0e321a9f4 | 76 | #ifdef SCnSCB_ACTLR_DISDEFWBUF_Msk |
kenjiArai | 1:9db0e321a9f4 | 77 | // Disable write buffer to make BusFaults (eg write to ROM via NULL pointer) precise. |
kenjiArai | 1:9db0e321a9f4 | 78 | // Possible on Cortex-M3 and M4, not on M0, M7 or M33. |
kenjiArai | 1:9db0e321a9f4 | 79 | // Would be less necessary if ROM was write-protected in MPU to give a |
kenjiArai | 1:9db0e321a9f4 | 80 | // precise MemManage exception. |
kenjiArai | 1:9db0e321a9f4 | 81 | SCnSCB->ACTLR |= SCnSCB_ACTLR_DISDEFWBUF_Msk; |
kenjiArai | 1:9db0e321a9f4 | 82 | #endif |
kenjiArai | 1:9db0e321a9f4 | 83 | #endif |
kenjiArai | 1:9db0e321a9f4 | 84 | |
kenjiArai | 1:9db0e321a9f4 | 85 | sp = *((void **)address + 0); |
kenjiArai | 1:9db0e321a9f4 | 86 | pc = *((void **)address + 1); |
kenjiArai | 1:9db0e321a9f4 | 87 | start_new_application(sp, pc); |
kenjiArai | 1:9db0e321a9f4 | 88 | } |
kenjiArai | 1:9db0e321a9f4 | 89 | |
kenjiArai | 1:9db0e321a9f4 | 90 | static void powerdown_nvic() |
kenjiArai | 1:9db0e321a9f4 | 91 | { |
kenjiArai | 1:9db0e321a9f4 | 92 | int i; |
kenjiArai | 1:9db0e321a9f4 | 93 | int j; |
kenjiArai | 1:9db0e321a9f4 | 94 | int isr_groups_32; |
kenjiArai | 1:9db0e321a9f4 | 95 | |
kenjiArai | 1:9db0e321a9f4 | 96 | #if defined(__CORTEX_M23) |
kenjiArai | 1:9db0e321a9f4 | 97 | // M23 doesn't support ICTR and supports up to 240 external interrupts. |
kenjiArai | 1:9db0e321a9f4 | 98 | isr_groups_32 = 8; |
kenjiArai | 1:9db0e321a9f4 | 99 | #elif defined(__CORTEX_M0PLUS) |
kenjiArai | 1:9db0e321a9f4 | 100 | isr_groups_32 = 1; |
kenjiArai | 1:9db0e321a9f4 | 101 | #else |
kenjiArai | 1:9db0e321a9f4 | 102 | isr_groups_32 = ((SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk) >> SCnSCB_ICTR_INTLINESNUM_Pos) + 1; |
kenjiArai | 1:9db0e321a9f4 | 103 | #endif |
kenjiArai | 1:9db0e321a9f4 | 104 | |
kenjiArai | 1:9db0e321a9f4 | 105 | for (i = 0; i < isr_groups_32; i++) { |
kenjiArai | 1:9db0e321a9f4 | 106 | NVIC->ICER[i] = 0xFFFFFFFF; |
kenjiArai | 1:9db0e321a9f4 | 107 | NVIC->ICPR[i] = 0xFFFFFFFF; |
kenjiArai | 1:9db0e321a9f4 | 108 | for (j = 0; j < 8; j++) { |
kenjiArai | 1:9db0e321a9f4 | 109 | #if defined(__CORTEX_M23) || defined(__CORTEX_M33) |
kenjiArai | 1:9db0e321a9f4 | 110 | NVIC->IPR[i * 8 + j] = 0x00000000; |
kenjiArai | 1:9db0e321a9f4 | 111 | #else |
kenjiArai | 1:9db0e321a9f4 | 112 | NVIC->IP[i * 8 + j] = 0x00000000; |
kenjiArai | 1:9db0e321a9f4 | 113 | #endif |
kenjiArai | 1:9db0e321a9f4 | 114 | } |
kenjiArai | 1:9db0e321a9f4 | 115 | } |
kenjiArai | 1:9db0e321a9f4 | 116 | } |
kenjiArai | 1:9db0e321a9f4 | 117 | |
kenjiArai | 1:9db0e321a9f4 | 118 | static void powerdown_scb(uint32_t vtor) |
kenjiArai | 1:9db0e321a9f4 | 119 | { |
kenjiArai | 1:9db0e321a9f4 | 120 | int i; |
kenjiArai | 1:9db0e321a9f4 | 121 | |
kenjiArai | 1:9db0e321a9f4 | 122 | // SCB->CPUID - Read only CPU ID register |
kenjiArai | 1:9db0e321a9f4 | 123 | SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk | SCB_ICSR_PENDSTCLR_Msk; |
kenjiArai | 1:9db0e321a9f4 | 124 | SCB->VTOR = vtor; |
kenjiArai | 1:9db0e321a9f4 | 125 | SCB->AIRCR = 0x05FA | 0x0000; |
kenjiArai | 1:9db0e321a9f4 | 126 | SCB->SCR = 0x00000000; |
kenjiArai | 1:9db0e321a9f4 | 127 | // SCB->CCR - Implementation defined value |
kenjiArai | 1:9db0e321a9f4 | 128 | int num_pri_reg; // Number of priority registers |
kenjiArai | 1:9db0e321a9f4 | 129 | #if defined(__CORTEX_M0PLUS) || defined(__CORTEX_M23) |
kenjiArai | 1:9db0e321a9f4 | 130 | num_pri_reg = 2; |
kenjiArai | 1:9db0e321a9f4 | 131 | #else |
kenjiArai | 1:9db0e321a9f4 | 132 | num_pri_reg = 12; |
kenjiArai | 1:9db0e321a9f4 | 133 | #endif |
kenjiArai | 1:9db0e321a9f4 | 134 | for (i = 0; i < num_pri_reg; i++) { |
kenjiArai | 1:9db0e321a9f4 | 135 | #if defined(__CORTEX_M7) || defined(__CORTEX_M23) || defined(__CORTEX_M33) |
kenjiArai | 1:9db0e321a9f4 | 136 | SCB->SHPR[i] = 0x00; |
kenjiArai | 1:9db0e321a9f4 | 137 | #else |
kenjiArai | 1:9db0e321a9f4 | 138 | SCB->SHP[i] = 0x00; |
kenjiArai | 1:9db0e321a9f4 | 139 | #endif |
kenjiArai | 1:9db0e321a9f4 | 140 | } |
kenjiArai | 1:9db0e321a9f4 | 141 | SCB->SHCSR = 0x00000000; |
kenjiArai | 1:9db0e321a9f4 | 142 | #if defined(__CORTEX_M23) || defined(__CORTEX_M0PLUS) |
kenjiArai | 1:9db0e321a9f4 | 143 | #else |
kenjiArai | 1:9db0e321a9f4 | 144 | SCB->CFSR = 0xFFFFFFFF; |
kenjiArai | 1:9db0e321a9f4 | 145 | SCB->HFSR = SCB_HFSR_DEBUGEVT_Msk | SCB_HFSR_FORCED_Msk | SCB_HFSR_VECTTBL_Msk; |
kenjiArai | 1:9db0e321a9f4 | 146 | SCB->DFSR = SCB_DFSR_EXTERNAL_Msk | SCB_DFSR_VCATCH_Msk | |
kenjiArai | 1:9db0e321a9f4 | 147 | SCB_DFSR_DWTTRAP_Msk | SCB_DFSR_BKPT_Msk | SCB_DFSR_HALTED_Msk; |
kenjiArai | 1:9db0e321a9f4 | 148 | #endif |
kenjiArai | 1:9db0e321a9f4 | 149 | // SCB->MMFAR - Implementation defined value |
kenjiArai | 1:9db0e321a9f4 | 150 | // SCB->BFAR - Implementation defined value |
kenjiArai | 1:9db0e321a9f4 | 151 | // SCB->AFSR - Implementation defined value |
kenjiArai | 1:9db0e321a9f4 | 152 | // SCB->PFR - Read only processor feature register |
kenjiArai | 1:9db0e321a9f4 | 153 | // SCB->DFR - Read only debug feature registers |
kenjiArai | 1:9db0e321a9f4 | 154 | // SCB->ADR - Read only auxiliary feature registers |
kenjiArai | 1:9db0e321a9f4 | 155 | // SCB->MMFR - Read only memory model feature registers |
kenjiArai | 1:9db0e321a9f4 | 156 | // SCB->ISAR - Read only instruction set attribute registers |
kenjiArai | 1:9db0e321a9f4 | 157 | // SCB->CPACR - Implementation defined value |
kenjiArai | 1:9db0e321a9f4 | 158 | } |
kenjiArai | 1:9db0e321a9f4 | 159 | |
kenjiArai | 1:9db0e321a9f4 | 160 | #if defined (__CC_ARM) |
kenjiArai | 1:9db0e321a9f4 | 161 | |
kenjiArai | 1:9db0e321a9f4 | 162 | __asm static void start_new_application(void *sp, void *pc) |
kenjiArai | 1:9db0e321a9f4 | 163 | { |
kenjiArai | 1:9db0e321a9f4 | 164 | MOVS R2, #0 |
kenjiArai | 1:9db0e321a9f4 | 165 | MSR CONTROL, R2 // Switch to main stack |
kenjiArai | 1:9db0e321a9f4 | 166 | MOV SP, R0 |
kenjiArai | 1:9db0e321a9f4 | 167 | MSR PRIMASK, R2 // Enable interrupts |
kenjiArai | 1:9db0e321a9f4 | 168 | BX R1 |
kenjiArai | 1:9db0e321a9f4 | 169 | } |
kenjiArai | 1:9db0e321a9f4 | 170 | |
kenjiArai | 1:9db0e321a9f4 | 171 | #elif defined (__GNUC__) || defined (__ICCARM__) |
kenjiArai | 1:9db0e321a9f4 | 172 | |
kenjiArai | 1:9db0e321a9f4 | 173 | void start_new_application(void *sp, void *pc) |
kenjiArai | 1:9db0e321a9f4 | 174 | { |
kenjiArai | 1:9db0e321a9f4 | 175 | __asm volatile( |
kenjiArai | 1:9db0e321a9f4 | 176 | "movs r2, #0 \n" |
kenjiArai | 1:9db0e321a9f4 | 177 | "msr control, r2 \n" // Switch to main stack |
kenjiArai | 1:9db0e321a9f4 | 178 | "mov sp, %0 \n" |
kenjiArai | 1:9db0e321a9f4 | 179 | "msr primask, r2 \n" // Enable interrupts |
kenjiArai | 1:9db0e321a9f4 | 180 | "bx %1 \n" |
kenjiArai | 1:9db0e321a9f4 | 181 | : |
kenjiArai | 1:9db0e321a9f4 | 182 | : "l"(sp), "l"(pc) |
kenjiArai | 1:9db0e321a9f4 | 183 | : "r2", "cc", "memory" |
kenjiArai | 1:9db0e321a9f4 | 184 | ); |
kenjiArai | 1:9db0e321a9f4 | 185 | } |
kenjiArai | 1:9db0e321a9f4 | 186 | |
kenjiArai | 1:9db0e321a9f4 | 187 | #else |
kenjiArai | 1:9db0e321a9f4 | 188 | |
kenjiArai | 1:9db0e321a9f4 | 189 | #error "Unsupported toolchain" |
kenjiArai | 1:9db0e321a9f4 | 190 | |
kenjiArai | 1:9db0e321a9f4 | 191 | #endif |
kenjiArai | 1:9db0e321a9f4 | 192 | |
kenjiArai | 1:9db0e321a9f4 | 193 | #endif |
kenjiArai | 1:9db0e321a9f4 | 194 | |
kenjiArai | 1:9db0e321a9f4 | 195 | #endif /* MBED_APPLICATION_SUPPORT */ |