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platform/mbed_critical.c@167:e84263d55307, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:46:44 2017 +0100
Revision:
167:e84263d55307
Parent:
160:d5399cc887bb
Child:
170:19eb464bc2be
This updates the lib to the mbed lib v 145

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /*
<> 149:156823d33999 2 * Copyright (c) 2015-2016, ARM Limited, All Rights Reserved
<> 149:156823d33999 3 * SPDX-License-Identifier: Apache-2.0
<> 149:156823d33999 4 *
<> 149:156823d33999 5 * Licensed under the Apache License, Version 2.0 (the "License"); you may
<> 149:156823d33999 6 * not use this file except in compliance with the License.
<> 149:156823d33999 7 * You may obtain a copy of the License at
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 12 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
<> 149:156823d33999 13 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 14 * See the License for the specific language governing permissions and
<> 149:156823d33999 15 * limitations under the License.
<> 149:156823d33999 16 */
<> 149:156823d33999 17
<> 153:fa9ff456f731 18 /* Declare __STDC_LIMIT_MACROS so stdint.h defines UINT32_MAX when using C++ */
<> 153:fa9ff456f731 19 #define __STDC_LIMIT_MACROS
<> 160:d5399cc887bb 20 #include "platform/mbed_critical.h"
<> 149:156823d33999 21
<> 149:156823d33999 22 #include "cmsis.h"
<> 149:156823d33999 23 #include "platform/mbed_assert.h"
<> 160:d5399cc887bb 24 #include "platform/mbed_toolchain.h"
<> 149:156823d33999 25
<> 149:156823d33999 26 #define EXCLUSIVE_ACCESS (!defined (__CORTEX_M0) && !defined (__CORTEX_M0PLUS))
<> 149:156823d33999 27
<> 149:156823d33999 28 static volatile uint32_t interrupt_enable_counter = 0;
<> 149:156823d33999 29 static volatile bool critical_interrupts_disabled = false;
<> 149:156823d33999 30
<> 149:156823d33999 31 bool core_util_are_interrupts_enabled(void)
<> 149:156823d33999 32 {
<> 149:156823d33999 33 #if defined(__CORTEX_A9)
<> 149:156823d33999 34 return ((__get_CPSR() & 0x80) == 0);
<> 149:156823d33999 35 #else
<> 149:156823d33999 36 return ((__get_PRIMASK() & 0x1) == 0);
<> 149:156823d33999 37 #endif
<> 149:156823d33999 38 }
<> 149:156823d33999 39
AnnaBridge 167:e84263d55307 40 bool core_util_is_isr_active(void)
AnnaBridge 167:e84263d55307 41 {
AnnaBridge 167:e84263d55307 42 #if defined(__CORTEX_A9)
AnnaBridge 167:e84263d55307 43 switch(__get_CPSR() & 0x1FU) {
AnnaBridge 167:e84263d55307 44 case MODE_USR:
AnnaBridge 167:e84263d55307 45 case MODE_SYS:
AnnaBridge 167:e84263d55307 46 return false;
AnnaBridge 167:e84263d55307 47 case MODE_SVC:
AnnaBridge 167:e84263d55307 48 default:
AnnaBridge 167:e84263d55307 49 return true;
AnnaBridge 167:e84263d55307 50 }
AnnaBridge 167:e84263d55307 51 #else
AnnaBridge 167:e84263d55307 52 return (__get_IPSR() != 0U);
AnnaBridge 167:e84263d55307 53 #endif
AnnaBridge 167:e84263d55307 54 }
AnnaBridge 167:e84263d55307 55
<> 149:156823d33999 56 MBED_WEAK void core_util_critical_section_enter(void)
<> 149:156823d33999 57 {
<> 149:156823d33999 58 bool interrupts_disabled = !core_util_are_interrupts_enabled();
<> 149:156823d33999 59 __disable_irq();
<> 149:156823d33999 60
<> 149:156823d33999 61 /* Save the interrupt disabled state as it was prior to any nested critical section lock use */
<> 149:156823d33999 62 if (!interrupt_enable_counter) {
<> 149:156823d33999 63 critical_interrupts_disabled = interrupts_disabled;
<> 149:156823d33999 64 }
<> 149:156823d33999 65
<> 149:156823d33999 66 /* If the interrupt_enable_counter overflows or we are in a nested critical section and interrupts
<> 149:156823d33999 67 are enabled, then something has gone badly wrong thus assert an error.
<> 149:156823d33999 68 */
<> 149:156823d33999 69 MBED_ASSERT(interrupt_enable_counter < UINT32_MAX);
<> 149:156823d33999 70 // FIXME
<> 149:156823d33999 71 #ifndef FEATURE_UVISOR
<> 149:156823d33999 72 if (interrupt_enable_counter > 0) {
<> 149:156823d33999 73 MBED_ASSERT(interrupts_disabled);
<> 149:156823d33999 74 }
<> 149:156823d33999 75 #else
<> 149:156823d33999 76 #warning "core_util_critical_section_enter needs fixing to work from unprivileged code"
<> 149:156823d33999 77 #endif /* FEATURE_UVISOR */
<> 149:156823d33999 78 interrupt_enable_counter++;
<> 149:156823d33999 79 }
<> 149:156823d33999 80
<> 149:156823d33999 81 MBED_WEAK void core_util_critical_section_exit(void)
<> 149:156823d33999 82 {
<> 149:156823d33999 83 /* If critical_section_enter has not previously been called, do nothing */
<> 149:156823d33999 84 if (interrupt_enable_counter) {
<> 149:156823d33999 85
<> 149:156823d33999 86 // FIXME
<> 149:156823d33999 87 #ifndef FEATURE_UVISOR
<> 149:156823d33999 88 bool interrupts_disabled = !core_util_are_interrupts_enabled(); /* get the current interrupt disabled state */
<> 149:156823d33999 89
<> 149:156823d33999 90 MBED_ASSERT(interrupts_disabled); /* Interrupts must be disabled on invoking an exit from a critical section */
<> 149:156823d33999 91 #else
<> 149:156823d33999 92 #warning "core_util_critical_section_exit needs fixing to work from unprivileged code"
<> 149:156823d33999 93 #endif /* FEATURE_UVISOR */
<> 149:156823d33999 94
<> 149:156823d33999 95 interrupt_enable_counter--;
<> 149:156823d33999 96
<> 149:156823d33999 97 /* Only re-enable interrupts if we are exiting the last of the nested critical sections and
<> 149:156823d33999 98 interrupts were enabled on entry to the first critical section.
<> 149:156823d33999 99 */
<> 149:156823d33999 100 if (!interrupt_enable_counter && !critical_interrupts_disabled) {
<> 149:156823d33999 101 __enable_irq();
<> 149:156823d33999 102 }
<> 149:156823d33999 103 }
<> 149:156823d33999 104 }
<> 149:156823d33999 105
<> 149:156823d33999 106 #if EXCLUSIVE_ACCESS
<> 149:156823d33999 107
<> 149:156823d33999 108 /* Supress __ldrex and __strex deprecated warnings - "#3731-D: intrinsic is deprecated" */
<> 149:156823d33999 109 #if defined (__CC_ARM)
<> 149:156823d33999 110 #pragma diag_suppress 3731
<> 149:156823d33999 111 #endif
<> 149:156823d33999 112
<> 149:156823d33999 113 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
<> 149:156823d33999 114 {
<> 149:156823d33999 115 uint8_t currentValue = __LDREXB((volatile uint8_t*)ptr);
<> 149:156823d33999 116 if (currentValue != *expectedCurrentValue) {
<> 149:156823d33999 117 *expectedCurrentValue = currentValue;
<> 149:156823d33999 118 __CLREX();
<> 149:156823d33999 119 return false;
<> 149:156823d33999 120 }
<> 149:156823d33999 121
<> 149:156823d33999 122 return !__STREXB(desiredValue, (volatile uint8_t*)ptr);
<> 149:156823d33999 123 }
<> 149:156823d33999 124
<> 149:156823d33999 125 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
<> 149:156823d33999 126 {
<> 149:156823d33999 127 uint16_t currentValue = __LDREXH((volatile uint16_t*)ptr);
<> 149:156823d33999 128 if (currentValue != *expectedCurrentValue) {
<> 149:156823d33999 129 *expectedCurrentValue = currentValue;
<> 149:156823d33999 130 __CLREX();
<> 149:156823d33999 131 return false;
<> 149:156823d33999 132 }
<> 149:156823d33999 133
<> 149:156823d33999 134 return !__STREXH(desiredValue, (volatile uint16_t*)ptr);
<> 149:156823d33999 135 }
<> 149:156823d33999 136
<> 149:156823d33999 137
<> 149:156823d33999 138 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
<> 149:156823d33999 139 {
<> 149:156823d33999 140 uint32_t currentValue = __LDREXW((volatile uint32_t*)ptr);
<> 149:156823d33999 141 if (currentValue != *expectedCurrentValue) {
<> 149:156823d33999 142 *expectedCurrentValue = currentValue;
<> 149:156823d33999 143 __CLREX();
<> 149:156823d33999 144 return false;
<> 149:156823d33999 145 }
<> 149:156823d33999 146
<> 149:156823d33999 147 return !__STREXW(desiredValue, (volatile uint32_t*)ptr);
<> 149:156823d33999 148 }
<> 149:156823d33999 149
<> 149:156823d33999 150 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 151 {
<> 149:156823d33999 152 uint8_t newValue;
<> 149:156823d33999 153 do {
<> 149:156823d33999 154 newValue = __LDREXB((volatile uint8_t*)valuePtr) + delta;
<> 149:156823d33999 155 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
<> 149:156823d33999 156 return newValue;
<> 149:156823d33999 157 }
<> 149:156823d33999 158
<> 149:156823d33999 159 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 160 {
<> 149:156823d33999 161 uint16_t newValue;
<> 149:156823d33999 162 do {
<> 149:156823d33999 163 newValue = __LDREXH((volatile uint16_t*)valuePtr) + delta;
<> 149:156823d33999 164 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
<> 149:156823d33999 165 return newValue;
<> 149:156823d33999 166 }
<> 149:156823d33999 167
<> 149:156823d33999 168 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 169 {
<> 149:156823d33999 170 uint32_t newValue;
<> 149:156823d33999 171 do {
<> 149:156823d33999 172 newValue = __LDREXW((volatile uint32_t*)valuePtr) + delta;
<> 149:156823d33999 173 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
<> 149:156823d33999 174 return newValue;
<> 149:156823d33999 175 }
<> 149:156823d33999 176
<> 149:156823d33999 177
<> 149:156823d33999 178 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 179 {
<> 149:156823d33999 180 uint8_t newValue;
<> 149:156823d33999 181 do {
<> 149:156823d33999 182 newValue = __LDREXB((volatile uint8_t*)valuePtr) - delta;
<> 149:156823d33999 183 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
<> 149:156823d33999 184 return newValue;
<> 149:156823d33999 185 }
<> 149:156823d33999 186
<> 149:156823d33999 187 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 188 {
<> 149:156823d33999 189 uint16_t newValue;
<> 149:156823d33999 190 do {
<> 149:156823d33999 191 newValue = __LDREXH((volatile uint16_t*)valuePtr) - delta;
<> 149:156823d33999 192 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
<> 149:156823d33999 193 return newValue;
<> 149:156823d33999 194 }
<> 149:156823d33999 195
<> 149:156823d33999 196 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 197 {
<> 149:156823d33999 198 uint32_t newValue;
<> 149:156823d33999 199 do {
<> 149:156823d33999 200 newValue = __LDREXW((volatile uint32_t*)valuePtr) - delta;
<> 149:156823d33999 201 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
<> 149:156823d33999 202 return newValue;
<> 149:156823d33999 203 }
<> 149:156823d33999 204
<> 149:156823d33999 205 #else
<> 149:156823d33999 206
<> 149:156823d33999 207 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
<> 149:156823d33999 208 {
<> 149:156823d33999 209 bool success;
<> 149:156823d33999 210 uint8_t currentValue;
<> 149:156823d33999 211 core_util_critical_section_enter();
<> 149:156823d33999 212 currentValue = *ptr;
<> 149:156823d33999 213 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 214 *ptr = desiredValue;
<> 149:156823d33999 215 success = true;
<> 149:156823d33999 216 } else {
<> 149:156823d33999 217 *expectedCurrentValue = currentValue;
<> 149:156823d33999 218 success = false;
<> 149:156823d33999 219 }
<> 149:156823d33999 220 core_util_critical_section_exit();
<> 149:156823d33999 221 return success;
<> 149:156823d33999 222 }
<> 149:156823d33999 223
<> 149:156823d33999 224 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
<> 149:156823d33999 225 {
<> 149:156823d33999 226 bool success;
<> 149:156823d33999 227 uint16_t currentValue;
<> 149:156823d33999 228 core_util_critical_section_enter();
<> 149:156823d33999 229 currentValue = *ptr;
<> 149:156823d33999 230 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 231 *ptr = desiredValue;
<> 149:156823d33999 232 success = true;
<> 149:156823d33999 233 } else {
<> 149:156823d33999 234 *expectedCurrentValue = currentValue;
<> 149:156823d33999 235 success = false;
<> 149:156823d33999 236 }
<> 149:156823d33999 237 core_util_critical_section_exit();
<> 149:156823d33999 238 return success;
<> 149:156823d33999 239 }
<> 149:156823d33999 240
<> 149:156823d33999 241
<> 149:156823d33999 242 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
<> 149:156823d33999 243 {
<> 149:156823d33999 244 bool success;
<> 149:156823d33999 245 uint32_t currentValue;
<> 149:156823d33999 246 core_util_critical_section_enter();
<> 149:156823d33999 247 currentValue = *ptr;
<> 149:156823d33999 248 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 249 *ptr = desiredValue;
<> 149:156823d33999 250 success = true;
<> 149:156823d33999 251 } else {
<> 149:156823d33999 252 *expectedCurrentValue = currentValue;
<> 149:156823d33999 253 success = false;
<> 149:156823d33999 254 }
<> 149:156823d33999 255 core_util_critical_section_exit();
<> 149:156823d33999 256 return success;
<> 149:156823d33999 257 }
<> 149:156823d33999 258
<> 149:156823d33999 259
<> 149:156823d33999 260 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 261 {
<> 149:156823d33999 262 uint8_t newValue;
<> 149:156823d33999 263 core_util_critical_section_enter();
<> 149:156823d33999 264 newValue = *valuePtr + delta;
<> 149:156823d33999 265 *valuePtr = newValue;
<> 149:156823d33999 266 core_util_critical_section_exit();
<> 149:156823d33999 267 return newValue;
<> 149:156823d33999 268 }
<> 149:156823d33999 269
<> 149:156823d33999 270 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 271 {
<> 149:156823d33999 272 uint16_t newValue;
<> 149:156823d33999 273 core_util_critical_section_enter();
<> 149:156823d33999 274 newValue = *valuePtr + delta;
<> 149:156823d33999 275 *valuePtr = newValue;
<> 149:156823d33999 276 core_util_critical_section_exit();
<> 149:156823d33999 277 return newValue;
<> 149:156823d33999 278 }
<> 149:156823d33999 279
<> 149:156823d33999 280 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 281 {
<> 149:156823d33999 282 uint32_t newValue;
<> 149:156823d33999 283 core_util_critical_section_enter();
<> 149:156823d33999 284 newValue = *valuePtr + delta;
<> 149:156823d33999 285 *valuePtr = newValue;
<> 149:156823d33999 286 core_util_critical_section_exit();
<> 149:156823d33999 287 return newValue;
<> 149:156823d33999 288 }
<> 149:156823d33999 289
<> 149:156823d33999 290
<> 149:156823d33999 291 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 292 {
<> 149:156823d33999 293 uint8_t newValue;
<> 149:156823d33999 294 core_util_critical_section_enter();
<> 149:156823d33999 295 newValue = *valuePtr - delta;
<> 149:156823d33999 296 *valuePtr = newValue;
<> 149:156823d33999 297 core_util_critical_section_exit();
<> 149:156823d33999 298 return newValue;
<> 149:156823d33999 299 }
<> 149:156823d33999 300
<> 149:156823d33999 301 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 302 {
<> 149:156823d33999 303 uint16_t newValue;
<> 149:156823d33999 304 core_util_critical_section_enter();
<> 149:156823d33999 305 newValue = *valuePtr - delta;
<> 149:156823d33999 306 *valuePtr = newValue;
<> 149:156823d33999 307 core_util_critical_section_exit();
<> 149:156823d33999 308 return newValue;
<> 149:156823d33999 309 }
<> 149:156823d33999 310
<> 149:156823d33999 311 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 312 {
<> 149:156823d33999 313 uint32_t newValue;
<> 149:156823d33999 314 core_util_critical_section_enter();
<> 149:156823d33999 315 newValue = *valuePtr - delta;
<> 149:156823d33999 316 *valuePtr = newValue;
<> 149:156823d33999 317 core_util_critical_section_exit();
<> 149:156823d33999 318 return newValue;
<> 149:156823d33999 319 }
<> 149:156823d33999 320
<> 149:156823d33999 321 #endif
<> 149:156823d33999 322
<> 149:156823d33999 323
<> 149:156823d33999 324 bool core_util_atomic_cas_ptr(void **ptr, void **expectedCurrentValue, void *desiredValue) {
<> 149:156823d33999 325 return core_util_atomic_cas_u32(
<> 149:156823d33999 326 (uint32_t *)ptr,
<> 149:156823d33999 327 (uint32_t *)expectedCurrentValue,
<> 149:156823d33999 328 (uint32_t)desiredValue);
<> 149:156823d33999 329 }
<> 149:156823d33999 330
<> 149:156823d33999 331 void *core_util_atomic_incr_ptr(void **valuePtr, ptrdiff_t delta) {
<> 149:156823d33999 332 return (void *)core_util_atomic_incr_u32((uint32_t *)valuePtr, (uint32_t)delta);
<> 149:156823d33999 333 }
<> 149:156823d33999 334
<> 149:156823d33999 335 void *core_util_atomic_decr_ptr(void **valuePtr, ptrdiff_t delta) {
<> 149:156823d33999 336 return (void *)core_util_atomic_decr_u32((uint32_t *)valuePtr, (uint32_t)delta);
<> 149:156823d33999 337 }
<> 149:156823d33999 338