iSerial_DISCOF746.h

00001 #if defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG)
00002 ////////////////////////////////////////////////////////////////////////////////
00003 // UART Interrupt handler
00004 //
00005 // This is a dummy program !!
00006 // iSerial does NOT work for F746 cpu
00007 //  due to CIMMIS interface problem(?) as of November 13th, 2016.
00008 // Following part of function does not work in iSerial.cpp.
00009 /*
00010     attach(this, &iSerial::tx_handler, Serial::TxIrq);
00011     attach(this, &iSerial::rx_handler, Serial::RxIrq);
00012 */
00013 // mbed revision (as of today) -> 129
00014 //
00015 ////////////////////////////////////////////////////////////////////////////////
00016 
00017 #if 1
00018 
00019 void iSerial::enable_uart_irq(void){  ;/* dummy */ }
00020 void iSerial::disable_uart_irq(void){ ;/* dummy */ }
00021 
00022 #else
00023 
00024 void
00025 iSerial::enable_uart_irq(void)
00026 {
00027     switch(tx) {
00028         case USBTX:
00029             NVIC_EnableIRQ(USART3_IRQn);
00030             break;        
00031 //        case SERIAL_TX:
00032 //        case PA_2:
00033 //        case D1:
00034         case PD_6:
00035             NVIC_EnableIRQ(USART2_IRQn);
00036             break;
00037         case PA_9:
00038 //        case D8:
00039             NVIC_EnableIRQ(USART1_IRQn);
00040             break;
00041         case PA_11:
00042         case PC_6:
00043             NVIC_EnableIRQ(USART6_IRQn);
00044             break;
00045         case PC_11:
00046 //            NVIC_EnableIRQ(USART4_IRQn);
00047             break;
00048     }
00049 }
00050 
00051 void
00052 iSerial::disable_uart_irq(void)
00053 {
00054     switch(tx) {
00055         case USBTX:
00056             NVIC_DisableIRQ(USART3_IRQn);
00057             break;        
00058 //        case SERIAL_TX:
00059 //        case PA_2:
00060 //        case D1:
00061         case PD_6:
00062             NVIC_DisableIRQ(USART2_IRQn);
00063             break;
00064         case PA_9:
00065 //        case D8:
00066             NVIC_DisableIRQ(USART1_IRQn);
00067             break;
00068         case PA_11:
00069         case PC_6:
00070             NVIC_DisableIRQ(USART6_IRQn);
00071             break;
00072         case PC_11:
00073 //            NVIC_DisableIRQ(USART4_IRQn);
00074             break;
00075     }
00076 }
00077 
00078 #endif
00079 
00080 #endif