Revision 11:6bea021727a1, committed 2016-11-16

Comitter:

kenjiArai

Date:

Wed Nov 16 13:05:47 2016 +0000

Parent:

10:04095c7f816a

Commit message:

F746 does NOT work but set dummy code for keeping compatibility.

Changed in this revision

--- a/iSerial.cpp	Fri Jan 02 10:45:12 2015 +0000
+++ b/iSerial.cpp	Wed Nov 16 13:05:47 2016 +0000
@@ -4,6 +4,7 @@
 //  2009.11.13 ... Originally written by Y.Kuroda for Renesas H83664
 //  2012.08.31 ... Code convert for mbed in C++
 //  2015.01.02 ... Added other mbed code by JH1PJL
+//  2016.11.11 ... small modification
 //
 
 #include <stdarg.h>
@@ -11,8 +12,9 @@
 #include "RingBuffer.h"
 #include "iSerial.h"
 // Device header files
+#include "iSerial_DISCOF746.h"
+#include "iSerial_LPC11U24.h"
 #include "iSerial_LPC1768.h"
-#include "iSerial_LPC11U24.h"
 #include "iSerial_NucleoF4xx.h"
 #include "iSerial_NucleoL152.h"
 

--- a/iSerial.h	Fri Jan 02 10:45:12 2015 +0000
+++ b/iSerial.h	Wed Nov 16 13:05:47 2016 +0000
@@ -6,6 +6,7 @@
 //  2009.11.13 ... Originally written by Y.Kuroda for Renesas H83664
 //  2012.08.31 ... Code convert for mbed in C++
 //  2015.01.02 ... Added other mbed code by JH1PJL
+//  2016.11.11 ... Added STM32F746 with durty solution
 //
 #ifndef _ISERIAL_H
 #define _ISERIAL_H
@@ -19,7 +20,7 @@
  * #include "mbed.h"
  * #include "iSerial.h"
  *
- * iSerial     pc(USBTX, USBRX, 1024, 32);
+ * iSerial     pc(USBTX, USBRX, 32, 1024);
  * 
  * int main() {
  * uint32_t n = 0;
@@ -70,4 +71,4 @@
     void flush(void);
 };
 
-#endif    /* _SCI_H */
+#endif    /* _ISERIAL_H */

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/iSerial_DISCOF746.h	Wed Nov 16 13:05:47 2016 +0000
@@ -0,0 +1,80 @@
+#if defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG)
+////////////////////////////////////////////////////////////////////////////////
+// UART Interrupt handler
+//
+// This is a dummy program !!
+// iSerial does NOT work for F746 cpu
+//  due to CIMMIS interface problem(?) as of November 13th, 2016.
+// Following part of function does not work in iSerial.cpp.
+/*
+    attach(this, &iSerial::tx_handler, Serial::TxIrq);
+    attach(this, &iSerial::rx_handler, Serial::RxIrq);
+*/
+// mbed revision (as of today) -> 129
+//
+////////////////////////////////////////////////////////////////////////////////
+
+#if 1
+
+void iSerial::enable_uart_irq(void){  ;/* dummy */ }
+void iSerial::disable_uart_irq(void){ ;/* dummy */ }
+
+#else
+
+void
+iSerial::enable_uart_irq(void)
+{
+    switch(tx) {
+        case USBTX:
+            NVIC_EnableIRQ(USART3_IRQn);
+            break;        
+//        case SERIAL_TX:
+//        case PA_2:
+//        case D1:
+        case PD_6:
+            NVIC_EnableIRQ(USART2_IRQn);
+            break;
+        case PA_9:
+//        case D8:
+            NVIC_EnableIRQ(USART1_IRQn);
+            break;
+        case PA_11:
+        case PC_6:
+            NVIC_EnableIRQ(USART6_IRQn);
+            break;
+        case PC_11:
+//            NVIC_EnableIRQ(USART4_IRQn);
+            break;
+    }
+}
+
+void
+iSerial::disable_uart_irq(void)
+{
+    switch(tx) {
+        case USBTX:
+            NVIC_DisableIRQ(USART3_IRQn);
+            break;        
+//        case SERIAL_TX:
+//        case PA_2:
+//        case D1:
+        case PD_6:
+            NVIC_DisableIRQ(USART2_IRQn);
+            break;
+        case PA_9:
+//        case D8:
+            NVIC_DisableIRQ(USART1_IRQn);
+            break;
+        case PA_11:
+        case PC_6:
+            NVIC_DisableIRQ(USART6_IRQn);
+            break;
+        case PC_11:
+//            NVIC_DisableIRQ(USART4_IRQn);
+            break;
+    }
+}
+
+#endif
+
+#endif
\ No newline at end of file

--- a/iSerial_NucleoF4xx.h	Fri Jan 02 10:45:12 2015 +0000
+++ b/iSerial_NucleoF4xx.h	Wed Nov 16 13:05:47 2016 +0000
@@ -1,4 +1,6 @@
-#if defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F401RE)
+#if defined(TARGET_NUCLEO_F411RE) || \
+    defined(TARGET_NUCLEO_F401RE) || \
+    defined(TARGET_NUCLEO_F446RE)
 
 void
 iSerial::enable_uart_irq(void)
@@ -11,6 +13,7 @@
             NVIC_EnableIRQ(USART2_IRQn);
             break;
         case PA_9:
+        case PB_6:
 //        case D8:
             NVIC_EnableIRQ(USART1_IRQn);
             break;
@@ -32,6 +35,7 @@
             NVIC_DisableIRQ(USART2_IRQn);
             break;
         case PA_9:
+        case PB_6:
 //        case D8:
             NVIC_DisableIRQ(USART1_IRQn);
             break;