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Dependents: FreqCntr_GPS1PPS_F746F4xx_w_recipro Freq_Cntr_GPS1PPS_F746NG_GUI
Fork of Frq_cuntr_full by
Diff: frq_cuntr_full.h
- Revision:
- 0:bfdc6ed58a06
- Child:
- 1:102230f2879d
diff -r 000000000000 -r bfdc6ed58a06 frq_cuntr_full.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/frq_cuntr_full.h Sat Nov 22 04:01:41 2014 +0000
@@ -0,0 +1,125 @@
+/*
+ * mbed Application program / Frequency Counter with GPS 1PPS Compensation
+ * Frequency Counter Hardware relataed program
+ *
+ * Copyright (c) 2014 Kenji Arai / JH1PJL
+ * http://www.page.sannet.ne.jp/kenjia/index.html
+ * http://mbed.org/users/kenjiArai/
+ * Additional functions and modification
+ * started: October 18th, 2014
+ * Revised: Nobember 22nd, 2014
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+ * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef MBED_FRQ_CUNTR
+#define MBED_FRQ_CUNTR
+
+#include "mbed.h"
+
+namespace Frequency_counter
+{
+ #define DEBUG // use Communication with PC(UART)
+ #define IRQ_DRIVE
+ //#define BASE_EXTERNAL_CLOCK
+
+ #if defined(BASE_EXTERNAL_CLOCK)
+ #define CNT_UPPER (0xffffffff - 100)
+ #define CNT_LOWER (0 + 100)
+ //#define CNT_UPPER (30000000 + 1000000)
+ //#define CNT_LOWER (30000000 - 1000000)
+ #else
+ #define CNT_UPPER (0xffffffff - 100)
+ #define CNT_LOWER (0 + 100)
+ //#define CNT_UPPER (100000000 - 100000)
+ //#define CNT_LOWER (100000000 + 100000)
+ #endif
+
+ #if defined(BASE_EXTERNAL_CLOCK)
+ #define ONE_SECOND_COUNT 0xe4e1c0
+ #else
+ #define ONE_SECOND_COUNT 0x2faf080
+ #endif
+
+ #define CNT_BF_SIZE 120
+
+ //#if defined(IRQ_DRIVE)
+ // 1PPS data
+ extern uint32_t onepps_cnt[CNT_BF_SIZE];
+ extern uint32_t onepps_num;
+ extern uint64_t onepps_cnt_avarage;
+ extern uint8_t onepps_buf_full;
+ extern uint8_t onepps_ready_flg;
+ // TIM2
+ extern uint8_t tim2_ready_flg;
+ extern uint32_t tim2_cnt_data;
+ extern uint32_t tim2_old_cnt_data;
+ // TIM3+4
+ extern uint8_t tim3p4_ready_flg;
+ extern uint32_t tim3p4_cnt_data;
+ extern uint32_t tim3p4_old_cnt_data;
+
+ // TIM2 IC2 Interrupt control
+ void irq_ic2_TIM2(void);
+ // TIM3 IC2 Interrupt control (same signal connected to TIM4 IC1)
+ void irq_ic2_TIM3P4(void);
+
+ class FRQ_CUNTR
+ {
+ public:
+
+ FRQ_CUNTR(PinName f_in);
+
+ void initialize_Freq_counter(void);
+
+ // Read TIM2 captured counter value
+ uint32_t read_ic2_counter_TIM2(void);
+
+ // Check TIM2 IC2 status
+ uint32_t check_ic2_status_TIM2(void);
+
+ // Read TIM3+4(as 32bit) captured counter value
+ uint32_t read_ic2_counter_TIM3P4(void);
+
+ // Check TIM3 IC2 & TIM4 IC1 status
+ uint32_t check_ic2_status_TIM3P4(void);
+
+ // Avarage measued data GPS 1PPS by 50MHz Internal Clock
+ void avarage_1pps(void);
+
+ // Frequency check for test purpose
+ uint32_t read_frequency_TIM2(float gate_time);
+ uint32_t read_frequency_TIM3P4(float gate_time);
+
+ // Clock output for test purpose
+ void port_mco1_mco2_set(uint8_t select);
+
+ protected:
+ DigitalIn _pin;
+
+ // Initialize TIM2
+ // Internal clock (50MHz) and IC2 for GPS 1pps signal measurement
+ void initialize_TIM2(void);
+
+ // Initialize TIM3 and TIM4 as 32bit counter (TIM3(16bit) + TIM4(16bit))
+ // TIM3 clock input is unkown freq.(measuring freq.) and TIM4 is slave counter
+ // 1sec gate signal connected both TIM3 IC2 and TIM4 IC1
+ void initialize_TIM3P4(void);
+
+ private:
+ #if defined(IRQ_DRIVE)
+ // 1PPS data
+ uint32_t onepps_cnt[CNT_BF_SIZE];
+ uint32_t onepps_num;
+ uint64_t onepps_cnt_avarage;
+ uint8_t onepps_buf_full;
+ uint8_t onepps_ready_flg;
+ #endif
+ };
+} // Frequency_counter
+
+#endif // MBED_FRQ_CUNTR
