Kenji Arai / Mbed 2 deprecated check_SysClk_for_F303K8

Check program for STM32F303K8 System Clock

Dependencies:   mbed

Fork of study_step0 by Team_PjL

See
https://os.mbed.com/users/kenjiArai/notebook/nucleo-f303k8-hse-clock/#

main.cpp@3:5cba8c19a04b, 2017-09-30 (annotated)

Committer:
kenjiArai
Date:
Sat Sep 30 21:14:14 2017 +0000
Revision:
3:5cba8c19a04b
Parent:
2:68db9770a517 
change date

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kenjiArai 0:1672d0903bdc 1 /*
kenjiArai 1:e162361e197f 2 * mbed Application program
kenjiArai 1:e162361e197f 3 * Ckeck program for Clocks only for Nucleo-F303K8
kenjiArai 0:1672d0903bdc 4 *
kenjiArai 0:1672d0903bdc 5 * Copyright (c) 2017 Kenji Arai / JH1PJL
kenjiArai 0:1672d0903bdc 6 * http://www.page.sannet.ne.jp/kenjia/index.html
kenjiArai 0:1672d0903bdc 7 * http://mbed.org/users/kenjiArai/
kenjiArai 1:e162361e197f 8 * Created: September 28th, 2017
kenjiArai 3:5cba8c19a04b 9 * Revised: October 1st, 2017
kenjiArai 0:1672d0903bdc 10 */
kenjiArai 0:1672d0903bdc 11
kenjiArai 1:e162361e197f 12 // Include --------------------------------------------------------------------
kenjiArai 0:1672d0903bdc 13 #include "mbed.h"
kenjiArai 0:1672d0903bdc 14
kenjiArai 1:e162361e197f 15 // Object ---------------------------------------------------------------------
kenjiArai 0:1672d0903bdc 16 DigitalOut my_led(LED1);
kenjiArai 1:e162361e197f 17 DigitalIn my_sw(USER_BUTTON);
kenjiArai 1:e162361e197f 18 Serial pc(USBTX, USBRX);
kenjiArai 1:e162361e197f 19
kenjiArai 1:e162361e197f 20 // Definition -----------------------------------------------------------------
kenjiArai 1:e162361e197f 21 #define SUCESS_FACTOR
kenjiArai 1:e162361e197f 22
kenjiArai 1:e162361e197f 23 #define BAUD(x) pc.baud(x)
kenjiArai 1:e162361e197f 24 #define GETC(x) pc.getc(x)
kenjiArai 1:e162361e197f 25 #define PUTC(x) pc.putc(x)
kenjiArai 1:e162361e197f 26 #define PRINTF(...) pc.printf(__VA_ARGS__)
kenjiArai 1:e162361e197f 27 #define READABLE(x) pc.readable(x)
kenjiArai 1:e162361e197f 28
kenjiArai 1:e162361e197f 29 // RAM ------------------------------------------------------------------------
kenjiArai 1:e162361e197f 30
kenjiArai 1:e162361e197f 31 // ROM / Constant data --------------------------------------------------------
kenjiArai 1:e162361e197f 32 char *const cmsg1 = "freq. =";
kenjiArai 1:e162361e197f 33 char *const cmsg2 = "Use HSI(internal RC/High speed)";
kenjiArai 1:e162361e197f 34 char *const cmsg3 = "Use HSE(External Xtal)";
kenjiArai 2:68db9770a517 35 char *const cmsg4 = "";
kenjiArai 1:e162361e197f 36 char *const cmsg5 = "??? following infromation is not valid !";
kenjiArai 1:e162361e197f 37 char *const cmsg6 = "clock freq. =";
kenjiArai 1:e162361e197f 38 char *const cmsg7 = "fPLL = fPLL-in x PLLMUL";
kenjiArai 1:e162361e197f 39 char *const cmsg8 = "fPLL-in(Clock source)is ";
kenjiArai 1:e162361e197f 40
kenjiArai 1:e162361e197f 41 // Function prototypes --------------------------------------------------------
kenjiArai 1:e162361e197f 42 void put_rn(void);
kenjiArai 1:e162361e197f 43 uint8_t disable_pll_and_set_hsi(void);
kenjiArai 1:e162361e197f 44 void cpu_freq(void);
kenjiArai 0:1672d0903bdc 45
kenjiArai 1:e162361e197f 46 extern void SetSysClock_modify(void);
kenjiArai 1:e162361e197f 47 extern void SetSysClock_HSE_none_Xtal(void);
kenjiArai 1:e162361e197f 48
kenjiArai 1:e162361e197f 49 //------------------------------------------------------------------------------
kenjiArai 1:e162361e197f 50 // Control Program
kenjiArai 1:e162361e197f 51 //------------------------------------------------------------------------------
kenjiArai 0:1672d0903bdc 52 int main() {
kenjiArai 1:e162361e197f 53 PRINTF("\r\nCheck program for STM32F303K8 System Clock\r\n\r\n");
kenjiArai 1:e162361e197f 54 // Output clock on MCO pin(PA8 (D9))
kenjiArai 1:e162361e197f 55 // 64 MHz or 8 MHz or 72MHz
kenjiArai 1:e162361e197f 56 HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_SYSCLK, RCC_MCO_DIV1);
kenjiArai 1:e162361e197f 57 cpu_freq();
kenjiArai 1:e162361e197f 58 PRINTF("Het ant key to go next step\r\n");
kenjiArai 1:e162361e197f 59 while(pc.readable()==0){;}
kenjiArai 1:e162361e197f 60 pc.getc(); //dummy read
kenjiArai 1:e162361e197f 61 #ifdef SUCESS_FACTOR // Set System clock 8MHz (Direct HSI)
kenjiArai 1:e162361e197f 62 if(disable_pll_and_set_hsi()){
kenjiArai 1:e162361e197f 63 Serial pc(USBTX, USBRX);
kenjiArai 1:e162361e197f 64 PRINTF("\r\nChanged system clock successfully!!\r\n");
kenjiArai 1:e162361e197f 65 cpu_freq();
kenjiArai 1:e162361e197f 66 } else {
kenjiArai 1:e162361e197f 67 PRINTF("\r\nNo Change!!\r\n");
kenjiArai 1:e162361e197f 68 cpu_freq();
kenjiArai 1:e162361e197f 69 }
kenjiArai 1:e162361e197f 70 #else
kenjiArai 1:e162361e197f 71 PRINTF("Skip 8MHz mode then next 72MHz clcok may not success!!\r\n");
kenjiArai 1:e162361e197f 72 #endif
kenjiArai 1:e162361e197f 73 PRINTF("Het ant key to go next step\r\n");
kenjiArai 1:e162361e197f 74 while(pc.readable()==0){;}
kenjiArai 1:e162361e197f 75 pc.getc(); //dummy read
kenjiArai 1:e162361e197f 76 SetSysClock_HSE_none_Xtal();
kenjiArai 1:e162361e197f 77 Serial pc(USBTX, USBRX);
kenjiArai 1:e162361e197f 78 cpu_freq();
kenjiArai 1:e162361e197f 79 PRINTF("Hit any key to restart\r\n");
kenjiArai 0:1672d0903bdc 80 while(1) {
kenjiArai 0:1672d0903bdc 81 my_led = !my_led;
kenjiArai 1:e162361e197f 82 if (pc.readable()){
kenjiArai 1:e162361e197f 83 NVIC_SystemReset();
kenjiArai 1:e162361e197f 84 }
kenjiArai 1:e162361e197f 85 wait(1.0f);
kenjiArai 0:1672d0903bdc 86 }
kenjiArai 0:1672d0903bdc 87 }
kenjiArai 1:e162361e197f 88
kenjiArai 1:e162361e197f 89 uint8_t disable_pll_and_set_hsi(void){
kenjiArai 1:e162361e197f 90 RCC_ClkInitTypeDef RCC_ClkInitStruct;
kenjiArai 1:e162361e197f 91 /* Select PLL as system clock source
kenjiArai 1:e162361e197f 92 and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
kenjiArai 1:e162361e197f 93 RCC_ClkInitStruct.ClockType =
kenjiArai 1:e162361e197f 94 (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 |
kenjiArai 1:e162361e197f 95 RCC_CLOCKTYPE_PCLK2);
kenjiArai 1:e162361e197f 96 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; // 8 MHz
kenjiArai 1:e162361e197f 97 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 8 MHz
kenjiArai 1:e162361e197f 98 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 8 MHz
kenjiArai 1:e162361e197f 99 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 8 MHz
kenjiArai 1:e162361e197f 100 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
kenjiArai 1:e162361e197f 101 return 0; // FAIL
kenjiArai 1:e162361e197f 102 }
kenjiArai 1:e162361e197f 103 RCC->CR &= 0xfeffffff; // Disable PLL
kenjiArai 1:e162361e197f 104 return 1;
kenjiArai 1:e162361e197f 105 }
kenjiArai 1:e162361e197f 106
kenjiArai 1:e162361e197f 107 void cpu_freq(void)
kenjiArai 1:e162361e197f 108 {
kenjiArai 1:e162361e197f 109 uint32_t m1 = 0, m2 = 0, m3 = 0, m4 = 0;
kenjiArai 1:e162361e197f 110
kenjiArai 1:e162361e197f 111 PRINTF("--- Clocks related Reg.(RCC->?) ---"); put_rn();
kenjiArai 1:e162361e197f 112 PRINTF("CR = 0x%08x", RCC->CR); put_rn();
kenjiArai 1:e162361e197f 113 PRINTF("CFGR = 0x%08x", RCC->CFGR); put_rn();
kenjiArai 1:e162361e197f 114 PRINTF("CIR = 0x%08x", RCC->CIR); put_rn();
kenjiArai 1:e162361e197f 115 PRINTF("APB2RSTR = 0x%08x", RCC->APB2RSTR); put_rn();
kenjiArai 1:e162361e197f 116 PRINTF("APB1RSTR = 0x%08x", RCC->APB1RSTR); put_rn();
kenjiArai 1:e162361e197f 117 PRINTF("AHB1ENR = 0x%08x", RCC->AHBENR); put_rn();
kenjiArai 1:e162361e197f 118 PRINTF("APB2ENR = 0x%08x", RCC->APB2ENR); put_rn();
kenjiArai 1:e162361e197f 119 PRINTF("APB1ENR = 0x%08x", RCC->APB1ENR); put_rn();
kenjiArai 1:e162361e197f 120 PRINTF("APB1LPENR= 0x%08x", RCC->BDCR); put_rn();
kenjiArai 1:e162361e197f 121 PRINTF("CSR = 0x%08x", RCC->CSR); put_rn();
kenjiArai 1:e162361e197f 122 PRINTF("AHBRSTR = 0x%08x", RCC->AHBRSTR); put_rn();
kenjiArai 1:e162361e197f 123 PRINTF("CFGR2 = 0x%08x", RCC->CFGR2); put_rn();
kenjiArai 1:e162361e197f 124 PRINTF("CFGR3 = 0x%08x", RCC->CFGR3); put_rn();
kenjiArai 1:e162361e197f 125 put_rn();
kenjiArai 1:e162361e197f 126 m1 = (RCC->CFGR & RCC_CFGR_SWS) >> RCC_CFGR_SWS_Pos; /* Get SYSCLK source */
kenjiArai 1:e162361e197f 127 switch (m1) {
kenjiArai 1:e162361e197f 128 case 0x00: // HSI used as system clock
kenjiArai 2:68db9770a517 129 PRINTF( "%s, %s %uHz", cmsg2, cmsg1, HSI_VALUE );
kenjiArai 1:e162361e197f 130 m2 = HSI_VALUE;
kenjiArai 1:e162361e197f 131 break;
kenjiArai 1:e162361e197f 132 case 0x01: // HSE used as system clock
kenjiArai 2:68db9770a517 133 PRINTF( "%s, %s %uHz", cmsg3, cmsg1, HSE_VALUE );
kenjiArai 1:e162361e197f 134 m2 = HSE_VALUE;
kenjiArai 1:e162361e197f 135 break;
kenjiArai 1:e162361e197f 136 case 0x02: // PLL used as system clock
kenjiArai 1:e162361e197f 137 PRINTF(cmsg7);
kenjiArai 1:e162361e197f 138 put_rn();
kenjiArai 1:e162361e197f 139 m1 = (RCC->CFGR & RCC_CFGR_PLLSRC) >> RCC_CFGR_PLLSRC_Pos;
kenjiArai 1:e162361e197f 140 PRINTF(cmsg8);
kenjiArai 1:e162361e197f 141 if (m1 == 0){
kenjiArai 1:e162361e197f 142 m3 = HSI_VALUE / 2;
kenjiArai 1:e162361e197f 143 PRINTF("HSI/2 -> fPLL-in = %uHz", m3);
kenjiArai 1:e162361e197f 144 } else {
kenjiArai 1:e162361e197f 145 m2 = (RCC->CFGR2 & RCC_CFGR2_PREDIV);
kenjiArai 1:e162361e197f 146 m2 += 1;
kenjiArai 1:e162361e197f 147 m3 = HSE_VALUE / m2;
kenjiArai 1:e162361e197f 148 PRINTF("HSE/PREDIV(=%u) -> fPLL-in = %uHz", m2, m3);
kenjiArai 1:e162361e197f 149 }
kenjiArai 1:e162361e197f 150 put_rn();
kenjiArai 1:e162361e197f 151 PRINTF(cmsg4);
kenjiArai 1:e162361e197f 152 m4 = (RCC->CFGR & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos;
kenjiArai 1:e162361e197f 153 m4 += 2;
kenjiArai 1:e162361e197f 154 if (m4 > 16){
kenjiArai 1:e162361e197f 155 m4 = 16;
kenjiArai 1:e162361e197f 156 }
kenjiArai 1:e162361e197f 157 PRINTF("PLLMUL = %u", m4);
kenjiArai 1:e162361e197f 158 put_rn();
kenjiArai 1:e162361e197f 159 PRINTF("fPLL = fPLL-in x PLLMUL = %u x %u = %uHz", m3, m4, m3*m4);
kenjiArai 1:e162361e197f 160 break;
kenjiArai 1:e162361e197f 161 default: // Not come here
kenjiArai 1:e162361e197f 162 PRINTF(cmsg5);
kenjiArai 1:e162361e197f 163 break;
kenjiArai 1:e162361e197f 164 }
kenjiArai 1:e162361e197f 165 put_rn();
kenjiArai 1:e162361e197f 166 PRINTF( "SYSCLK %s%10dHz", cmsg6, HAL_RCC_GetSysClockFreq());
kenjiArai 1:e162361e197f 167 put_rn();
kenjiArai 1:e162361e197f 168 PRINTF( "HCLK %s%10dHz", cmsg6, HAL_RCC_GetHCLKFreq());
kenjiArai 1:e162361e197f 169 put_rn();
kenjiArai 1:e162361e197f 170 PRINTF( "PCLK1 %s%10dHz", cmsg6, HAL_RCC_GetPCLK1Freq());
kenjiArai 1:e162361e197f 171 put_rn();
kenjiArai 1:e162361e197f 172 PRINTF( "PCLK2 %s%10dHz", cmsg6, HAL_RCC_GetPCLK2Freq());
kenjiArai 1:e162361e197f 173 put_rn();
kenjiArai 1:e162361e197f 174 put_rn();
kenjiArai 1:e162361e197f 175 }
kenjiArai 1:e162361e197f 176
kenjiArai 1:e162361e197f 177 void put_rn(void)
kenjiArai 1:e162361e197f 178 {
kenjiArai 1:e162361e197f 179 PUTC('\r');
kenjiArai 1:e162361e197f 180 PUTC('\n');
kenjiArai 1:e162361e197f 181 }