Library for TYBLE16 Module
Dependencies: BLE_API mbed-dev4BLE nRF51822
Dependents: TYBLE16_mbedlized_EddystoneBeacon TYBLE16_mbedlized_Thermometer TYBLE16_mbedlized_HeartRate
Please refer flowing link.
/users/kenjiArai/notebook/tyble16-module-will-become-a-mbed-family--mbedliza/
Revision 0:63f6490ba2c8, committed 2018-02-25
- Comitter:
- kenjiArai
- Date:
- Sun Feb 25 02:04:55 2018 +0000
- Commit message:
- Library for TYBLE16 Module
Changed in this revision
diff -r 000000000000 -r 63f6490ba2c8 BLE_API.lib --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/BLE_API.lib Sun Feb 25 02:04:55 2018 +0000 @@ -0,0 +1,1 @@ +https://developer.mbed.org/teams/Bluetooth-Low-Energy/code/BLE_API/#65474dc93927
diff -r 000000000000 -r 63f6490ba2c8 TYBLE16_BASE.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TYBLE16_BASE.h Sun Feb 25 02:04:55 2018 +0000 @@ -0,0 +1,18 @@ +/* + * Mbed Application program for AE-TYBLE16 + * + * Copyright (c) 2018 Kenji Arai / JH1PJL + * http://www.page.sannet.ne.jp/kenjia/index.html + * http://mbed.org/users/kenjiArai/ + * Modify: January 10th, 2018 + * Revised: January 25th, 2018 + */ + +#ifndef TARGET_NRF51822_MKIT +#error "Please select Nordic nRF51822 board!!" +// Please refer following page +// https://os.mbed.com/platforms/Nordic-nRF51822/ +#endif + +extern void cpu_sys(void); +extern bool compile_condition(void);
diff -r 000000000000 -r 63f6490ba2c8 check_TYBLE16.cpp --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/check_TYBLE16.cpp Sun Feb 25 02:04:55 2018 +0000 @@ -0,0 +1,167 @@ +/* + * Mbed Application program for TYBLE-16 + * + * Copyright (c) 2018 Kenji Arai / JH1PJL + * http://www.page.sannet.ne.jp/kenjia/index.html + * http://mbed.org/users/kenjiArai/ + * Created: Feburary 16th, 2018 + * Revised: Feburary 25th, 2018 + */ + +#include "mbed.h" + +extern Serial pc; + +uint32_t mem_range[][2] = { // Memory access range + { 0x00000000, 0x0003ffff }, // On-chip non-volatile memory //128 or 256KB + { 0x20000000, 0x20007fff }, // On-chip SRAM //16 or 32KB + { 0x10000000, 0x1000007f }, // FICR + { 0x10001000, 0x100010ff }, // UICR + { 0x40000000, 0x400245ff }, // Peripheral + { 0x50000500, 0x500007ff } // GPIO +}; + +void mem_cnfg_init( uint8_t print ) +{ + uint32_t a, b, c; + + a = NRF_FICR->CODEPAGESIZE; + b = NRF_FICR->CODESIZE; + c = a * b; + mem_range[0][1] = mem_range[0][0] + c -1; + if (print) { + pc.printf("CODEPAGESIZE:%d, CODESIZE:%d\r\nFLASH:0x%08x-0x%08x\r\n", + a, b, mem_range[0][0], mem_range[0][1]); + } + a = NRF_FICR->NUMRAMBLOCK; + b = NRF_FICR->SIZERAMBLOCKS; + c = a * b; + mem_range[1][1] = mem_range[1][0] + c -1; + if (print) { + pc.printf("NUMRAMBLOCK:%d, SIZERAMBLOCKS:%d\r\nRAM: 0x%08x-0x%08x\r\n", + a, b, mem_range[1][0], mem_range[1][1]); + } +} + +void cpu_sys(void) +{ + uint32_t m1 = 0, m2 = 0; + + m1 = SCB->CPUID; + m2 = ( m1 >> 24 ); + if ( m2 == 0x41 ) { + pc.printf( "CPU = ARM " ); + } else { + pc.printf( "CPU = NOT ARM " ); + } + m2 = ( m1 >> 4 ) & 0xfff; + if ( m2 == 0xc20 ) { + pc.printf( "Cortex-M0" ); + } else { + pc.printf( "NOT Cortex-M0" ); + } + m2 = ( m1 >> 20 ) & 0x0f; + pc.printf( " Variant:%x ", m2 ); + m2 = m1 & 0x7; + pc.printf( "Revision:%x\r\n", m2 ); + pc.printf( "CPU ID: 0x%08x\r\n", m1 ); + // nRF Chip revision + m1 = (((*((uint32_t volatile *)0xF0000FE8)) & 0x000000F0) >> 4); + switch (m1) { + case 1: // revision 1 + m2 = 1; + break; + case 4: // revision 2 + m2 = 2; + break; + case 7: + case 8: + case 9: // revision 3 + m2 = 3; + break; + default: + m2 = 0; + break; + } + if (m2) { + pc.printf( "nRF Revision: %d\r\n", m2 ); + } else { + pc.printf( "nRF Revision: Unknown\r\n" ); + } + // Firmware + m1 = NRF_UICR->FWID & 0xffff; + pc.printf( "Firmware ID: 0x%04x\r\n", m1 ); + // System Clock + m1 = NRF_UICR->XTALFREQ & 0xff; + pc.printf( "System clock by " ); + if (m1) { + pc.printf( "XTAL:16MHz\r\n" ); + } else { + pc.printf( "XTAL:32MHz\r\n" ); + } + m1 = NRF_CLOCK->LFCLKSRCCOPY & 0x3; + pc.printf( "LFCLK Source=32.768 kHz " ); + switch (m1) { + case 0: // revision 1 + pc.printf( "RC oscillator" ); + break; + case 1: // revision 1 + pc.printf( "crystal oscillator" ); + break; + case 2: // revision 1 + pc.printf( "synthesized from HFCLK" ); + break; + default: + pc.printf( "unknown" ); + break; + } + pc.printf("\r\n"); + // FLASH & RAM + mem_cnfg_init(1); +} + +bool compile_condition(void) +{ + uint32_t m1 = 0, m2 = 0; + + // ARM + m1 = SCB->CPUID; + m2 = ( m1 >> 24 ); + if ( m2 != 0x41 ) { + return false; + } + // M0 + m2 = ( m1 >> 4 ) & 0xfff; + if ( m2 != 0xc20 ) { + return false; + } + // 32MHz Xtal + m1 = NRF_UICR->XTALFREQ & 0xff; + if (m1) { + return false; // Not 32MHz XTAL + } + // LF = internal RC + m1 = NRF_CLOCK->LFCLKSRCCOPY & 0x3; + if (m1 != 0) { + return false; // Not RC + } + // FLASH + m1 = NRF_FICR->CODEPAGESIZE; + if (m1 != 1024) { + return false; + } + m1 = NRF_FICR->CODESIZE; + if (m1 != 256) { + return false; + } + // RAM + m1 = NRF_FICR->NUMRAMBLOCK; + if (m1 != 4) { + return false; + } + m1 = NRF_FICR->SIZERAMBLOCKS; + if (m1 != 8192) { + return false; + } + return true; +} \ No newline at end of file
diff -r 000000000000 -r 63f6490ba2c8 mbed-dev4BLE.lib --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mbed-dev4BLE.lib Sun Feb 25 02:04:55 2018 +0000 @@ -0,0 +1,1 @@ +https://os.mbed.com/users/kenjiArai/code/mbed-dev4BLE/#976b131d2800
diff -r 000000000000 -r 63f6490ba2c8 nRF51822.lib --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/nRF51822.lib Sun Feb 25 02:04:55 2018 +0000 @@ -0,0 +1,1 @@ +https://mbed.org/teams/Nordic-Semiconductor/code/nRF51822/#c90ae1400bf2
diff -r 000000000000 -r 63f6490ba2c8 readme_1st.txt --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/readme_1st.txt Sun Feb 25 02:04:55 2018 +0000 @@ -0,0 +1,73 @@ +RUNNING CONDITION + +Library TYBLE16_BASE + BLE_API revision 1208: Sep. 2016 + mbed-dev (base) revision 181 : version 159 Feb. 2018 + nRF51822 revision 638 ; 14 Sep. 2016 + +Hardware +ONLY FOR "TYBLE-16" + Akizuki BLE Module AE-TYBLE16 + http://akizukidenshi.com/catalog/g/gK-12339/ + +////////////// PREPARATION ///////////////////////////////////////////////////// +Macro +TARGET_NRF_32MHZ_XTAL +TARGET_NRF_LFCLK_RC + +////////////// RECOMMENDATION ////////////////////////////////////////////////// +<REPLACE> +//.............................................................................. +mbed-dev +//.............................................................................. +------ original +\mbed-dev4BLE\targets\TARGET_NORDIC\TARGET_MCU_NRF51822\TARGET_NRF51822_MKIT +PinNames.h; +------ replace +\TYBLE16_BASE\PinNames.h.txt +You need to re-name PinNames.h.txt to PinNames.h + +<DELETE> +//.............................................................................. +mbed-dev4BLE +//.............................................................................. +Deteted following all of directory except TRAGET_NORDIC +\mbed-dev4BLE\targets\TARGET_Analog_Devices +\mbed-dev4BLE\targets\TARGET_ARM_SSG +\mbed-dev4BLE\targets\TARGET_Atmel +\mbed-dev4BLE\targets\TARGET_Freescale +\mbed-dev4BLE\targets\TARGET_Maxim +\mbed-dev4BLE\targets\TARGET_NUVOTON +\mbed-dev4BLE\targets\TARGET_NXP +\mbed-dev4BLE\targets\TARGET_ONSEMI +\mbed-dev4BLE\targets\TARGET_Realtek +\mbed-dev4BLE\targets\TARGET_RENESAS +\mbed-dev4BLE\targets\TARGET_Silicon_Labs +\mbed-dev4BLE\targets\TARGET_STM +\mbed-dev4BLE\targets\TARGET_TOSHIBA +\mbed-dev4BLE\targets\TARGET_ublox +\mbed-dev4BLE\targets\TARGET_WIZNET + +\mbed-dev4BLE\cmsis\TARGET_CORTEX_A + +in \mbed-dev4BLE\targets\TARGET_NORDIC/TARGET_MCU_NRF51822 +TARGET_ARCH_BLE +TARGET_DELTA_DFCM_NNN40 +TARGET_HRM1017 +TARGET_MTM_MTCONNECT04S +TARGET_NRF51_DK +TARGET_NRF51_DONGLE +TARGET_NRF51_MICROBIT +TARGET_NRF51822_SBKIT +TARGET_NRF51822_Y5_MBUG +TARGET_RBLAB_BLENANO +TARGET_RBLAB_NRF51822 +TARGET_SEEED_TINY_BLE +TARGET_TY51822R3 +TARGET_VBLUNO51 +TARGET_WALLBOT_BLE + +in \mbed-dev4BLE\targets\TARGET_NORDIC\TARGET_NRF5\ +TARGET_MCU_NRF52832 +TARGET_MCU_NRF52840 +TARGET_NRF52_COMMON