<May 12th, 2015>
I have confirmed that both mbed lib. and mbed-src lib. have updated to change F411RE mbed System clock and USB clock as below.

fVCO = fPLL-in x (PLLN/PLLM), fPLL-out = fVCO/PLLP, fUSB-out = fVCO/PLLQ
Use PLL with PLLN=192, PLLM=4
Use HSE(not Xtal but External Clock)=8000000Hz
PLL/Base   freq= 384000000Hz
Use PLL with PLLP=4, PLLQ=8
PLL/System freq=  96000000Hz
PLL/USB    freq=  48000000Hz

SYSCLK clock freq. =  96000000Hz
HCLK   clock freq. =  96000000Hz
PCLK1  clock freq. =  48000000Hz
PCLK2  clock freq. =  96000000Hz

mbed lib. Rev. -> 98 & mbed-src lib. Rev. ->539
We can use USB with proper colok!.

If you would like to use 100MHz System clock, please refer updated "Nucleo_F411RE_SysClk".
--------

I made a clock checking program for Nucleo F411RE and F401 mbed board.
Picture shows F411RE example.

System frequency is 100MHz. Looks okay for me.
USB frequency is 44.4MHz? -> USB clock needs accurate frequency 48MHz.
Once keeping 100MHz system clock freq., we can select PLLQ value only 9 or 8.
If PLLQ=9, USB Freq. is 44.4MHz (current setting).
If PLLQ=8, USB Freq. is 50.0MHz.

Best selection looks follows.
PLL clock -> HSE = 8MHz
PLLN= 192, PLLM = 4
PLL Freq. = (PLL Clock)*(PLLN/PLLM) = 8MHz * 192 / 4 = 384MHz
System clock = (PLL Freq.)/PLLP = 384MHz/4 = 96MHz
USB clock = (PLL Freq.)/PLLQ = 384MHz/8 = 48MHz

Is this result okay?
or
Is my program wrong?