Kenji Arai / Frq_cuntr_Nucleo-F746ZG

Frequency counter library using GPS 1PPS signal and temperature controlled 50MHz Base clock. Ported from F411 Frequency Counter.

Dependencies:   RingBuff

Dependents:   Frequency_Cntr_1PPS_F746ZG

Fork of Frq_cuntr_full by Kenji Arai

Please refer following.
/users/kenjiArai/notebook/frequency-counters/

frq_cuntr_full.cpp@1:102230f2879d, 2014-11-22 (annotated)

Committer:
kenjiArai
Date:
Sat Nov 22 23:02:39 2014 +0000
Revision:
1:102230f2879d
Parent:
0:bfdc6ed58a06
Child:
2:194f82ad3041
Created library interface functions. Hardware related parts are almost done.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kenjiArai 0:bfdc6ed58a06 1 /*
kenjiArai 1:102230f2879d 2 * mbed Library / Frequency Counter with GPS 1PPS Compensation
kenjiArai 0:bfdc6ed58a06 3 * Frequency Counter Hardware relataed program
kenjiArai 1:102230f2879d 4 * Only for ST Nucleo F411RE
kenjiArai 0:bfdc6ed58a06 5 *
kenjiArai 0:bfdc6ed58a06 6 * Copyright (c) 2014 Kenji Arai / JH1PJL
kenjiArai 0:bfdc6ed58a06 7 * http://www.page.sannet.ne.jp/kenjia/index.html
kenjiArai 0:bfdc6ed58a06 8 * http://mbed.org/users/kenjiArai/
kenjiArai 0:bfdc6ed58a06 9 * Additional functions and modification
kenjiArai 0:bfdc6ed58a06 10 * started: October 18th, 2014
kenjiArai 1:102230f2879d 11 * Revised: Nobember 23rd, 2014
kenjiArai 0:bfdc6ed58a06 12 *
kenjiArai 0:bfdc6ed58a06 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
kenjiArai 0:bfdc6ed58a06 14 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
kenjiArai 0:bfdc6ed58a06 15 * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
kenjiArai 0:bfdc6ed58a06 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
kenjiArai 0:bfdc6ed58a06 17 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
kenjiArai 0:bfdc6ed58a06 18 */
kenjiArai 0:bfdc6ed58a06 19
kenjiArai 0:bfdc6ed58a06 20 #include "frq_cuntr_full.h"
kenjiArai 0:bfdc6ed58a06 21
kenjiArai 0:bfdc6ed58a06 22 #ifdef DEBUG
kenjiArai 0:bfdc6ed58a06 23 Serial pcm(USBTX, USBRX);
kenjiArai 0:bfdc6ed58a06 24 DigitalOut debug_led(LED1);
kenjiArai 0:bfdc6ed58a06 25 #endif
kenjiArai 0:bfdc6ed58a06 26
kenjiArai 0:bfdc6ed58a06 27 #ifdef DEBUG
kenjiArai 0:bfdc6ed58a06 28 #define BAUD(x) pcm.baud(x)
kenjiArai 0:bfdc6ed58a06 29 #define GETC(x) pcm.getc(x)
kenjiArai 0:bfdc6ed58a06 30 #define PUTC(x) pcm.putc(x)
kenjiArai 0:bfdc6ed58a06 31 #define PRINTF(...) pcm.printf(__VA_ARGS__)
kenjiArai 0:bfdc6ed58a06 32 #define READABLE(x) pcm.readable(x)
kenjiArai 0:bfdc6ed58a06 33 #else
kenjiArai 0:bfdc6ed58a06 34 #define BAUD(x) {;}
kenjiArai 0:bfdc6ed58a06 35 #define GETC(x) {;}
kenjiArai 0:bfdc6ed58a06 36 #define PUTC(x) {;}
kenjiArai 0:bfdc6ed58a06 37 #define PRINTF(...) {;}
kenjiArai 0:bfdc6ed58a06 38 #define READABLE(x) {;}
kenjiArai 0:bfdc6ed58a06 39 #endif
kenjiArai 0:bfdc6ed58a06 40
kenjiArai 0:bfdc6ed58a06 41 namespace Frequency_counter
kenjiArai 0:bfdc6ed58a06 42 {
kenjiArai 1:102230f2879d 43 // TIM2 OC
kenjiArai 1:102230f2879d 44 uint32_t oc_set_time0;
kenjiArai 1:102230f2879d 45 uint32_t oc_set_time1;
kenjiArai 1:102230f2879d 46 uint8_t new_gt_value;
kenjiArai 1:102230f2879d 47 uint32_t oc_hi_time;
kenjiArai 1:102230f2879d 48 uint32_t oc_lo_time;
kenjiArai 1:102230f2879d 49 // TIM2 IC
kenjiArai 1:102230f2879d 50 static uint8_t tim2_ready_flg;
kenjiArai 1:102230f2879d 51 static uint32_t tim2_cnt_data;
kenjiArai 1:102230f2879d 52 static uint32_t tim2_old_cnt_data;
kenjiArai 1:102230f2879d 53 // TIM3+4 IC
kenjiArai 1:102230f2879d 54 static uint8_t tim3p4_ready_flg;
kenjiArai 1:102230f2879d 55 static uint32_t tim3p4_cnt_data;
kenjiArai 1:102230f2879d 56
kenjiArai 1:102230f2879d 57 //-------------------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 58 // Control Program
kenjiArai 1:102230f2879d 59 //-------------------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 60 // TIM2 IC2 Interrupt control
kenjiArai 1:102230f2879d 61 void irq_ic2_TIM2(void)
kenjiArai 1:102230f2879d 62 {
kenjiArai 1:102230f2879d 63 uint16_t reg;
kenjiArai 1:102230f2879d 64 reg = TIM2->SR;
kenjiArai 1:102230f2879d 65 if (reg & TIM_SR_CC2IF) {
kenjiArai 1:102230f2879d 66 TIM2->SR &= ~TIM_SR_CC2IF; // clear IC flag
kenjiArai 1:102230f2879d 67 tim2_old_cnt_data = tim2_cnt_data;
kenjiArai 1:102230f2879d 68 tim2_cnt_data = TIM2->CCR2;
kenjiArai 1:102230f2879d 69 tim2_ready_flg = 1;
kenjiArai 1:102230f2879d 70 } else if (reg & TIM_SR_CC3IF) {
kenjiArai 1:102230f2879d 71 TIM2->SR &= ~TIM_SR_CC3IF; // clear IC flag
kenjiArai 1:102230f2879d 72 if (GPIOB->IDR & 0x0400) { // Check PB10 status
kenjiArai 1:102230f2879d 73 TIM2->CCR3 = TIM2->CCR3 + oc_hi_time;
kenjiArai 1:102230f2879d 74 } else {
kenjiArai 1:102230f2879d 75 TIM2->CCR3 = TIM2->CCR3 + oc_lo_time;
kenjiArai 1:102230f2879d 76 if (new_gt_value) {
kenjiArai 1:102230f2879d 77 new_gt_value = 0;
kenjiArai 1:102230f2879d 78 oc_hi_time = oc_set_time0;
kenjiArai 1:102230f2879d 79 oc_lo_time = oc_set_time1;
kenjiArai 1:102230f2879d 80 }
kenjiArai 0:bfdc6ed58a06 81 }
kenjiArai 0:bfdc6ed58a06 82 #if defined(DEBUG)
kenjiArai 0:bfdc6ed58a06 83 debug_led = !debug_led;
kenjiArai 0:bfdc6ed58a06 84 #endif
kenjiArai 0:bfdc6ed58a06 85 }
kenjiArai 1:102230f2879d 86 }
kenjiArai 1:102230f2879d 87
kenjiArai 1:102230f2879d 88 // TIM3 IC2 Interrupt control (same signal connected to TIM4 IC1)
kenjiArai 1:102230f2879d 89 void irq_ic2_TIM3P4(void)
kenjiArai 1:102230f2879d 90 {
kenjiArai 1:102230f2879d 91 TIM3->SR &= ~TIM_SR_CC2IF; // clear IC flag
kenjiArai 1:102230f2879d 92 TIM4->SR &= ~TIM_SR_CC1IF;
kenjiArai 1:102230f2879d 93 tim3p4_cnt_data = (TIM4->CCR1 << 16) + TIM3->CCR2;
kenjiArai 1:102230f2879d 94 tim3p4_ready_flg = 1;
kenjiArai 0:bfdc6ed58a06 95 #if defined(DEBUG)
kenjiArai 1:102230f2879d 96 debug_led = !debug_led;
kenjiArai 0:bfdc6ed58a06 97 #endif
kenjiArai 1:102230f2879d 98 }
kenjiArai 1:102230f2879d 99
kenjiArai 1:102230f2879d 100 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 101 // Frequency Counter
kenjiArai 1:102230f2879d 102 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 103 FRQ_CUNTR::FRQ_CUNTR(PinName f_in, double gt): _pin(f_in)
kenjiArai 1:102230f2879d 104 {
kenjiArai 1:102230f2879d 105 set_gate_time(gt);
kenjiArai 1:102230f2879d 106 initialize_Freq_counter();
kenjiArai 1:102230f2879d 107 }
kenjiArai 1:102230f2879d 108
kenjiArai 1:102230f2879d 109 // Set gate time
kenjiArai 1:102230f2879d 110 double FRQ_CUNTR::set_gate_time(double gt)
kenjiArai 1:102230f2879d 111 {
kenjiArai 1:102230f2879d 112 if (gt < 0.05) {
kenjiArai 1:102230f2879d 113 gate_time = 0.05;
kenjiArai 1:102230f2879d 114 } else if (gt > 60.0) {
kenjiArai 1:102230f2879d 115 gate_time = 60.0;
kenjiArai 1:102230f2879d 116 } else {
kenjiArai 1:102230f2879d 117 gate_time = gt;
kenjiArai 0:bfdc6ed58a06 118 }
kenjiArai 1:102230f2879d 119 oc_set_time0 = CNT_FIX_BASE;
kenjiArai 1:102230f2879d 120 double gt_tmp0 = CNT_BASE * gate_time;
kenjiArai 1:102230f2879d 121 uint32_t gt_tmp1 = (uint32_t)gt_tmp0;
kenjiArai 1:102230f2879d 122 if ((gt_tmp0 - (double)gt_tmp1) >= 0.5) {
kenjiArai 1:102230f2879d 123 ++gt_tmp1;
kenjiArai 0:bfdc6ed58a06 124 }
kenjiArai 1:102230f2879d 125 oc_set_time1 = gt_tmp1 - CNT_FIX_BASE;
kenjiArai 1:102230f2879d 126 new_gt_value = 1;
kenjiArai 1:102230f2879d 127 return gate_time;
kenjiArai 1:102230f2879d 128 }
kenjiArai 1:102230f2879d 129
kenjiArai 1:102230f2879d 130 // Read new frequency data
kenjiArai 1:102230f2879d 131 uint32_t FRQ_CUNTR::read_freq_data(void)
kenjiArai 1:102230f2879d 132 {
kenjiArai 1:102230f2879d 133 old_cntr_tim3p4 = counter_tim3p4;
kenjiArai 1:102230f2879d 134 counter_tim3p4 = read_ic2_counter_TIM3P4();
kenjiArai 1:102230f2879d 135 return (counter_tim3p4 - old_cntr_tim3p4);
kenjiArai 1:102230f2879d 136 }
kenjiArai 1:102230f2879d 137
kenjiArai 1:102230f2879d 138 // Read status (new frequency data is available or not)
kenjiArai 1:102230f2879d 139 uint32_t FRQ_CUNTR::status_freq_update(void)
kenjiArai 1:102230f2879d 140 {
kenjiArai 1:102230f2879d 141 return check_ic2_status_TIM3P4();
kenjiArai 1:102230f2879d 142 }
kenjiArai 1:102230f2879d 143
kenjiArai 1:102230f2879d 144 // Read status (new 1PPS data is available or not)
kenjiArai 1:102230f2879d 145 uint32_t FRQ_CUNTR::status_1pps(void)
kenjiArai 1:102230f2879d 146 {
kenjiArai 1:102230f2879d 147 return check_ic2_status_TIM2();
kenjiArai 1:102230f2879d 148 }
kenjiArai 1:102230f2879d 149
kenjiArai 1:102230f2879d 150 // Read GPS 1PPS counter value
kenjiArai 1:102230f2879d 151 uint32_t FRQ_CUNTR::set_1PPS_data(void)
kenjiArai 1:102230f2879d 152 {
kenjiArai 1:102230f2879d 153 uint32_t diff = tim2_cnt_data - tim2_old_cnt_data;
kenjiArai 1:102230f2879d 154 if ((diff > CNT_UPPER) || (diff < CNT_LOWER)) {
kenjiArai 1:102230f2879d 155 return 0;
kenjiArai 1:102230f2879d 156 } else {
kenjiArai 1:102230f2879d 157 onepps_cnt[onepps_num] = diff;
kenjiArai 1:102230f2879d 158 if (++onepps_num >= CNT_BF_SIZE) {
kenjiArai 1:102230f2879d 159 onepps_num = 0;
kenjiArai 1:102230f2879d 160 onepps_buf_full = 1;
kenjiArai 0:bfdc6ed58a06 161 }
kenjiArai 1:102230f2879d 162 onepps_newest = diff;
kenjiArai 1:102230f2879d 163 return diff;
kenjiArai 0:bfdc6ed58a06 164 }
kenjiArai 1:102230f2879d 165 }
kenjiArai 1:102230f2879d 166
kenjiArai 1:102230f2879d 167 // Avarage measued data GPS 1PPS by 50MHz Internal Clock
kenjiArai 1:102230f2879d 168 uint32_t FRQ_CUNTR::read_avarage_1pps(void)
kenjiArai 1:102230f2879d 169 {
kenjiArai 1:102230f2879d 170 uint64_t total = 0;
kenjiArai 1:102230f2879d 171 if (onepps_buf_full == 1) {
kenjiArai 1:102230f2879d 172 for (uint32_t i = 0; i < CNT_BF_SIZE; i++) {
kenjiArai 1:102230f2879d 173 total += (uint64_t)onepps_cnt[i];
kenjiArai 0:bfdc6ed58a06 174 }
kenjiArai 1:102230f2879d 175 onepps_cnt_avarage = total / CNT_BF_SIZE;
kenjiArai 1:102230f2879d 176 PRINTF("buf");
kenjiArai 1:102230f2879d 177 } else {
kenjiArai 1:102230f2879d 178 for (uint32_t i = 0; i < onepps_num; i++) {
kenjiArai 1:102230f2879d 179 total += (uint64_t)onepps_cnt[i];
kenjiArai 0:bfdc6ed58a06 180 }
kenjiArai 1:102230f2879d 181 onepps_cnt_avarage = total / onepps_num;
kenjiArai 1:102230f2879d 182 PRINTF("not");
kenjiArai 0:bfdc6ed58a06 183 }
kenjiArai 1:102230f2879d 184 PRINTF(" full, num= %3d , 1PPS/new= %9d , ", onepps_num, onepps_newest);
kenjiArai 1:102230f2879d 185 return onepps_cnt_avarage;
kenjiArai 1:102230f2879d 186 }
kenjiArai 1:102230f2879d 187
kenjiArai 1:102230f2879d 188 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 189 // TIM2 (32bit Counter + IC + OC)
kenjiArai 1:102230f2879d 190 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 191 // Read TIM2 captured counter value
kenjiArai 1:102230f2879d 192 uint32_t FRQ_CUNTR::read_ic2_counter_TIM2(void)
kenjiArai 1:102230f2879d 193 {
kenjiArai 1:102230f2879d 194 return tim2_cnt_data; // return TIM2->CCR2;
kenjiArai 1:102230f2879d 195 }
kenjiArai 1:102230f2879d 196
kenjiArai 1:102230f2879d 197 // Check TIM2 IC2 status
kenjiArai 1:102230f2879d 198 uint32_t FRQ_CUNTR::check_ic2_status_TIM2(void)
kenjiArai 1:102230f2879d 199 {
kenjiArai 1:102230f2879d 200 if (tim2_ready_flg == 0) {
kenjiArai 1:102230f2879d 201 return 0;
kenjiArai 1:102230f2879d 202 } else {
kenjiArai 1:102230f2879d 203 tim2_ready_flg = 0;
kenjiArai 1:102230f2879d 204 set_1PPS_data();
kenjiArai 1:102230f2879d 205 return 1;
kenjiArai 0:bfdc6ed58a06 206 }
kenjiArai 1:102230f2879d 207 }
kenjiArai 1:102230f2879d 208
kenjiArai 1:102230f2879d 209 // Check OC port status
kenjiArai 1:102230f2879d 210 uint8_t FRQ_CUNTR::read_oc_port_status(void)
kenjiArai 1:102230f2879d 211 {
kenjiArai 1:102230f2879d 212 uint32_t p = GPIOB->IDR;
kenjiArai 1:102230f2879d 213 if (p & 0x0400) { // Check PB10 status
kenjiArai 1:102230f2879d 214 return 1;
kenjiArai 1:102230f2879d 215 } else {
kenjiArai 1:102230f2879d 216 return 0;
kenjiArai 0:bfdc6ed58a06 217 }
kenjiArai 1:102230f2879d 218 }
kenjiArai 1:102230f2879d 219
kenjiArai 1:102230f2879d 220 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 221 // TIM3+TIM4 (32bit Counter + IC)
kenjiArai 1:102230f2879d 222 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 223 // Read TIM3+4(as 32bit) captured counter value
kenjiArai 1:102230f2879d 224 uint32_t FRQ_CUNTR::read_ic2_counter_TIM3P4(void)
kenjiArai 1:102230f2879d 225 {
kenjiArai 1:102230f2879d 226 return tim3p4_cnt_data;
kenjiArai 1:102230f2879d 227 }
kenjiArai 1:102230f2879d 228
kenjiArai 1:102230f2879d 229 // Check TIM3 IC2 & TIM4 IC1 status
kenjiArai 1:102230f2879d 230 uint32_t FRQ_CUNTR::check_ic2_status_TIM3P4(void)
kenjiArai 1:102230f2879d 231 {
kenjiArai 1:102230f2879d 232 if (tim3p4_ready_flg == 0) {
kenjiArai 1:102230f2879d 233 return 0;
kenjiArai 1:102230f2879d 234 } else {
kenjiArai 1:102230f2879d 235 tim3p4_ready_flg = 0;
kenjiArai 1:102230f2879d 236 return 1;
kenjiArai 0:bfdc6ed58a06 237 }
kenjiArai 1:102230f2879d 238 }
kenjiArai 1:102230f2879d 239
kenjiArai 1:102230f2879d 240 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 241 // Frequency check for test purpose
kenjiArai 1:102230f2879d 242 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 243 // Read TIM2 Clock frequency
kenjiArai 1:102230f2879d 244 uint32_t FRQ_CUNTR::read_frequency_TIM2(float gate_time)
kenjiArai 1:102230f2879d 245 {
kenjiArai 1:102230f2879d 246 uint32_t freq = 0;
kenjiArai 1:102230f2879d 247 TIM2->CNT = 0;
kenjiArai 1:102230f2879d 248 wait(gate_time); // Gate time for count
kenjiArai 1:102230f2879d 249 freq = TIM2->CNT; // read counter
kenjiArai 1:102230f2879d 250 PRINTF("Clock freq.=%10d [Hz], gate= %4.2f [Sec]\r\n", freq, gate_time);
kenjiArai 1:102230f2879d 251 return freq; // return counter data
kenjiArai 1:102230f2879d 252 }
kenjiArai 1:102230f2879d 253
kenjiArai 1:102230f2879d 254 // Read TIM3(+TIM4) Input frequency
kenjiArai 1:102230f2879d 255 uint32_t FRQ_CUNTR::read_frequency_TIM3P4(float gate_time)
kenjiArai 1:102230f2879d 256 {
kenjiArai 1:102230f2879d 257 uint32_t freq0 = 0;
kenjiArai 1:102230f2879d 258 uint32_t freq1 = 0;
kenjiArai 1:102230f2879d 259 TIM3->CNT = 0;
kenjiArai 1:102230f2879d 260 TIM4->CNT = 0;
kenjiArai 1:102230f2879d 261 TIM3->CNT = 0;
kenjiArai 1:102230f2879d 262 wait(gate_time); // Gate time for count
kenjiArai 1:102230f2879d 263 freq0 = TIM3->CNT;
kenjiArai 1:102230f2879d 264 freq1 = TIM4->CNT;
kenjiArai 1:102230f2879d 265 freq0 = (freq1 << 16) + freq0;
kenjiArai 1:102230f2879d 266 PRINTF("Input freq.=%10d [Hz], gate= %4.2f [Sec]\r\n", freq0, gate_time);
kenjiArai 1:102230f2879d 267 return freq0; // read counter
kenjiArai 1:102230f2879d 268 }
kenjiArai 1:102230f2879d 269
kenjiArai 1:102230f2879d 270 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 271 // Clock output for test purpose
kenjiArai 1:102230f2879d 272 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 273 // Output internal clock
kenjiArai 1:102230f2879d 274 void FRQ_CUNTR::port_mco1_mco2_set(uint8_t select)
kenjiArai 1:102230f2879d 275 {
kenjiArai 1:102230f2879d 276 // PA8 -> MCO_1
kenjiArai 1:102230f2879d 277 GPIOA->AFR[1] &= 0xfffffff0;
kenjiArai 1:102230f2879d 278 GPIOA->AFR[1] |= GPIO_AF0_MCO << 0;
kenjiArai 1:102230f2879d 279 GPIOA->MODER &= ~(GPIO_MODER_MODER8); // AF
kenjiArai 1:102230f2879d 280 GPIOA->MODER |= GPIO_MODER_MODER8_1;
kenjiArai 1:102230f2879d 281 GPIOA->OTYPER &= ~(GPIO_OTYPER_OT_8); // Output Push-Pull=0
kenjiArai 1:102230f2879d 282 GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR8;// Speed full=11
kenjiArai 1:102230f2879d 283 GPIOA->PUPDR &= ~(GPIO_PUPDR_PUPDR8); // Pull-up=01
kenjiArai 1:102230f2879d 284 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR8_0;
kenjiArai 1:102230f2879d 285 // PC9 -> MCO_2
kenjiArai 1:102230f2879d 286 GPIOC->AFR[1] &= 0xffffff0f;
kenjiArai 1:102230f2879d 287 GPIOC->AFR[1] |= GPIO_AF0_MCO << 4;
kenjiArai 1:102230f2879d 288 GPIOC->MODER &= ~(GPIO_MODER_MODER9); // AF
kenjiArai 1:102230f2879d 289 GPIOC->MODER |= GPIO_MODER_MODER9_1;
kenjiArai 1:102230f2879d 290 GPIOC->OTYPER &= ~(GPIO_OTYPER_OT_9); // Output Push-Pull=0
kenjiArai 1:102230f2879d 291 GPIOC->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR9;// Speed full=11
kenjiArai 1:102230f2879d 292 GPIOC->PUPDR &= ~(GPIO_PUPDR_PUPDR9); // Pull-up=01
kenjiArai 1:102230f2879d 293 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR9_0;
kenjiArai 1:102230f2879d 294 // Select output clock source
kenjiArai 1:102230f2879d 295 RCC->CFGR &= 0x009fffff;
kenjiArai 1:102230f2879d 296 if (select == 1) {
kenjiArai 1:102230f2879d 297 // MC01 output HSE 1/1, MCO2 output SYSCLK 1/1
kenjiArai 1:102230f2879d 298 // MCO2 MCO2PRE MCO1PRE MCO1
kenjiArai 1:102230f2879d 299 RCC->CFGR |= (0x0 << 30) + (0x0 << 27) + (0x0 << 24) + (0x2 << 21);
kenjiArai 1:102230f2879d 300 PRINTF("Set MCO1(PA8):HSE/1, MCO2(PC9):SYSCLK/1\r\n");
kenjiArai 1:102230f2879d 301 } else if (select == 2) {
kenjiArai 1:102230f2879d 302 // MC01 output HSE 1/2, MCO2 output SYSCLK 1/2
kenjiArai 1:102230f2879d 303 // MCO2 MCO2PRE MCO1PRE MCO1
kenjiArai 1:102230f2879d 304 RCC->CFGR |= (0x0 << 30) + (0x4 << 27) + (0x4 << 24) + (0x2 << 21);
kenjiArai 1:102230f2879d 305 PRINTF("Set MCO1(PA8):HSE/2, MCO2(PC9):SYSCLK/2\r\n");
kenjiArai 1:102230f2879d 306 } else { // select = 4 and other wrong order
kenjiArai 1:102230f2879d 307 // MC01 output HSE 1/4, MCO2 output SYSCLK 1/4
kenjiArai 1:102230f2879d 308 // MCO2 MCO2PRE MCO1PRE MCO1
kenjiArai 1:102230f2879d 309 RCC->CFGR |= (0x0 << 30) + (0x6 << 27) + (0x6 << 24) + (0x2 << 21);
kenjiArai 1:102230f2879d 310 PRINTF("Set MCO1(PA8):HSE/4, MCO2(PC9):SYSCLK/4\r\n");
kenjiArai 0:bfdc6ed58a06 311 }
kenjiArai 1:102230f2879d 312 }
kenjiArai 1:102230f2879d 313
kenjiArai 1:102230f2879d 314 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 315 // Initialize TIM2 and TIM3+4
kenjiArai 1:102230f2879d 316 //---------------------------------------------------------------------------------------
kenjiArai 1:102230f2879d 317 void FRQ_CUNTR::initialize_Freq_counter(void)
kenjiArai 1:102230f2879d 318 {
kenjiArai 1:102230f2879d 319 initialize_TIM2();
kenjiArai 1:102230f2879d 320 initialize_TIM3P4();
kenjiArai 1:102230f2879d 321 }
kenjiArai 1:102230f2879d 322
kenjiArai 1:102230f2879d 323 // Initialize TIM2
kenjiArai 1:102230f2879d 324 // Internal clock (100MHz) or External clock(?MHz) and IC2 for GPS 1pps signal measurement
kenjiArai 1:102230f2879d 325 void FRQ_CUNTR::initialize_TIM2(void)
kenjiArai 1:102230f2879d 326 {
kenjiArai 1:102230f2879d 327 #if defined(BASE_EXTERNAL_CLOCK)
kenjiArai 1:102230f2879d 328 // PA0 -> Counter frequency input pin as Timer2 CH1/TI1
kenjiArai 1:102230f2879d 329 RCC->AHB1ENR |= (RCC_AHB1ENR_GPIOAEN);
kenjiArai 1:102230f2879d 330 GPIOA->AFR[0] &= 0xfffffff0;
kenjiArai 1:102230f2879d 331 GPIOA->AFR[0] |= GPIO_AF1_TIM2;
kenjiArai 1:102230f2879d 332 GPIOA->MODER &= ~(GPIO_MODER_MODER0); // AF
kenjiArai 1:102230f2879d 333 GPIOA->MODER |= GPIO_MODER_MODER0_1;
kenjiArai 1:102230f2879d 334 GPIOA->PUPDR &= ~(GPIO_PUPDR_PUPDR0); // PU
kenjiArai 1:102230f2879d 335 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR0_0;
kenjiArai 1:102230f2879d 336 // Initialize Timer2(32bit) for an external up counter mode
kenjiArai 1:102230f2879d 337 RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
kenjiArai 1:102230f2879d 338 TIM2->CR1 &= (uint16_t)(~(TIM_CR1_DIR | TIM_CR1_CMS | TIM_CR1_CKD));// count_up + div by 1
kenjiArai 1:102230f2879d 339 TIM2->CR1 |= TIM_CR1_URS;
kenjiArai 1:102230f2879d 340 TIM2->ARR = 0xffffffff;
kenjiArai 1:102230f2879d 341 TIM2->PSC = 0x0000;
kenjiArai 1:102230f2879d 342 TIM2->CCER &= (uint16_t)~TIM_CCER_CC1E; // Disable the CC1
kenjiArai 1:102230f2879d 343 TIM2->CCMR1 &= (uint16_t)~(TIM_CCMR1_IC1F | TIM_CCMR1_CC1S); // input filter + input select
kenjiArai 1:102230f2879d 344 TIM2->CCMR1 |= (uint16_t)TIM_CCMR1_CC1S_0;
kenjiArai 1:102230f2879d 345 TIM2->CCER &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NE | TIM_CCER_CC1NP); // positive edge
kenjiArai 1:102230f2879d 346 TIM2->SMCR &= (uint16_t)~(TIM_SMCR_ECE | TIM_SMCR_TS | TIM_SMCR_SMS); // external mode 1
kenjiArai 1:102230f2879d 347 TIM2->SMCR |= (uint16_t)( TIM_TS_TI1FP1 | TIM_SLAVEMODE_EXTERNAL1); // ECE must be ZERO!!!!
kenjiArai 1:102230f2879d 348 TIM2->CR1 |= (uint16_t)TIM_CR1_CEN; // Enable the TIM Counter
kenjiArai 1:102230f2879d 349 #else
kenjiArai 1:102230f2879d 350 // Initialize Timer2(32bit) for an external up counter mode
kenjiArai 1:102230f2879d 351 RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
kenjiArai 1:102230f2879d 352 TIM2->CR1 &= (uint16_t)(~(TIM_CR1_DIR | TIM_CR1_CMS | TIM_CR1_CKD)); // count_up + div by 1
kenjiArai 1:102230f2879d 353 TIM2->CR1 |= TIM_CR1_URS;
kenjiArai 1:102230f2879d 354 TIM2->ARR = 0xffffffff;
kenjiArai 1:102230f2879d 355 TIM2->PSC = 0x0000;
kenjiArai 1:102230f2879d 356 TIM2->CCER &= (uint16_t)~TIM_CCER_CC1E; // Disable the CC1
kenjiArai 1:102230f2879d 357 TIM2->SMCR &= (uint16_t)~(TIM_SMCR_ECE | TIM_SMCR_TS | TIM_SMCR_SMS);
kenjiArai 1:102230f2879d 358 TIM2->SMCR |= (uint16_t)0; // Internal clock = 100MHz
kenjiArai 1:102230f2879d 359 TIM2->CR1 |= (uint16_t)TIM_CR1_CEN; // Enable the TIM Counter
kenjiArai 1:102230f2879d 360 #endif
kenjiArai 1:102230f2879d 361 // PA1 -> Input Capture pin as Timer2 IC2
kenjiArai 1:102230f2879d 362 GPIOA->AFR[0] &= 0xffffff0f;
kenjiArai 1:102230f2879d 363 GPIOA->AFR[0] |= GPIO_AF1_TIM2 << 4;
kenjiArai 1:102230f2879d 364 GPIOA->MODER &= ~(GPIO_MODER_MODER1); // AF
kenjiArai 1:102230f2879d 365 GPIOA->MODER |= GPIO_MODER_MODER1_1;
kenjiArai 1:102230f2879d 366 GPIOA->PUPDR &= ~(GPIO_PUPDR_PUPDR1);
kenjiArai 1:102230f2879d 367 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR1_0; // PU
kenjiArai 1:102230f2879d 368 // Initialize Timer2 I.C.2
kenjiArai 1:102230f2879d 369 TIM2->CCER &= (uint16_t)~TIM_CCER_CC2E; // Disable the CC2
kenjiArai 1:102230f2879d 370 TIM2->CCMR1 &= (uint16_t)~(TIM_CCMR1_IC2F | TIM_CCMR1_CC2S);// input filter + input select
kenjiArai 1:102230f2879d 371 TIM2->CCMR1 |= (uint16_t)TIM_CCMR1_CC2S_0;
kenjiArai 1:102230f2879d 372 TIM2->CCER &= (uint16_t)~(TIM_CCER_CC2P | TIM_CCER_CC2NP); // positive edge
kenjiArai 1:102230f2879d 373 TIM2->CCER |= (uint16_t)TIM_CCER_CC2E; // enable capture
kenjiArai 1:102230f2879d 374 // PB10 -> Output Compare pin as Timer2 CH3/OC3
kenjiArai 1:102230f2879d 375 GPIOB->AFR[1] &= 0xfffff0ff;
kenjiArai 1:102230f2879d 376 GPIOB->AFR[1] |= GPIO_AF1_TIM2 << 8;
kenjiArai 1:102230f2879d 377 GPIOB->MODER &= ~(GPIO_MODER_MODER10); // AF
kenjiArai 1:102230f2879d 378 GPIOB->MODER |= GPIO_MODER_MODER10_1;
kenjiArai 1:102230f2879d 379 GPIOB->OTYPER &= ~(GPIO_OTYPER_OT_10);// Output Push-Pull=0
kenjiArai 1:102230f2879d 380 GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR10;// Speed full=11
kenjiArai 1:102230f2879d 381 GPIOB->PUPDR &= ~(GPIO_PUPDR_PUPDR10); // Pull-up=01
kenjiArai 1:102230f2879d 382 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR10_0;
kenjiArai 1:102230f2879d 383 // Initialize Timer2 O.C.3
kenjiArai 1:102230f2879d 384 TIM2->CCER &= (uint16_t)~TIM_CCER_CC3E; // Reset the CC3E Bit
kenjiArai 1:102230f2879d 385 TIM2->CCMR2 &= (uint16_t)~(TIM_CCMR2_OC3M | TIM_CCMR2_CC3S |
kenjiArai 1:102230f2879d 386 TIM_CCMR2_OC3PE | TIM_CCMR2_OC3CE | TIM_CCMR2_OC3FE);
kenjiArai 1:102230f2879d 387 TIM2->CCMR2 |= (TIM_CCMR2_OC3M_0 | TIM_CCMR2_OC3M_1);
kenjiArai 1:102230f2879d 388 TIM2->CCER &= (uint16_t)~TIM_CCER_CC3P;// Reset the Output Polarity level
kenjiArai 1:102230f2879d 389 TIM2->CCER |= (uint16_t)TIM_CCER_CC3E; // Set the CC3E Bit
kenjiArai 1:102230f2879d 390 new_gt_value = 0;
kenjiArai 1:102230f2879d 391 oc_hi_time = oc_set_time0;
kenjiArai 1:102230f2879d 392 oc_lo_time = oc_set_time1;
kenjiArai 1:102230f2879d 393 TIM2->CCR3 = TIM2->CNT + oc_hi_time;// Set the Capture Compare Register value
kenjiArai 1:102230f2879d 394 // Only for Debug purpose
kenjiArai 1:102230f2879d 395 BAUD(9600);
kenjiArai 1:102230f2879d 396 // PA
kenjiArai 1:102230f2879d 397 PRINTF("\r\n// Timer2(32bit) for an internal up counter mode\r\n");
kenjiArai 1:102230f2879d 398 PRINTF("// PA1 -> Input Capture pin as Timer2 CH2/TI2\r\n");
kenjiArai 1:102230f2879d 399 PRINTF("GPIOA->AFR[0]0x%08x:0x%08x\r\n",&GPIOA->AFR[0], GPIOA->AFR[0]);
kenjiArai 1:102230f2879d 400 PRINTF("GPIOA->AFR[1]0x%08x:0x%08x\r\n",&GPIOA->AFR[1], GPIOA->AFR[1]);
kenjiArai 1:102230f2879d 401 PRINTF("GPIOA->MODER 0x%08x:0x%08x\r\n",&GPIOA->MODER, GPIOA->MODER);
kenjiArai 1:102230f2879d 402 PRINTF("GPIOA->PUPDR 0x%08x:0x%08x\r\n",&GPIOA->PUPDR, GPIOA->PUPDR);
kenjiArai 1:102230f2879d 403 // PB
kenjiArai 1:102230f2879d 404 PRINTF("// PB10 -> Output Compare pin as Timer2 CH3/TI3\r\n");
kenjiArai 1:102230f2879d 405 PRINTF("GPIOB->AFR[0]0x%08x:0x%08x\r\n",&GPIOB->AFR[0], GPIOB->AFR[0]);
kenjiArai 1:102230f2879d 406 PRINTF("GPIOB->AFR[1]0x%08x:0x%08x\r\n",&GPIOB->AFR[1], GPIOB->AFR[1]);
kenjiArai 1:102230f2879d 407 PRINTF("GPIOB->MODER 0x%08x:0x%08x\r\n",&GPIOB->MODER, GPIOB->MODER);
kenjiArai 1:102230f2879d 408 PRINTF("GPIOB->PUPDR 0x%08x:0x%08x\r\n",&GPIOB->PUPDR, GPIOB->PUPDR);
kenjiArai 1:102230f2879d 409 // TIM2
kenjiArai 1:102230f2879d 410 PRINTF("// PA1 -> Timer2 IC2\r\n");
kenjiArai 1:102230f2879d 411 PRINTF("// PB10-> Timer2 OC3\r\n");
kenjiArai 1:102230f2879d 412 PRINTF("TIM2->CR1 0x%08x:0x%08x\r\n",&TIM2->CR1, TIM2->CR1);
kenjiArai 1:102230f2879d 413 PRINTF("TIM2->ARR 0x%08x:0x%08x\r\n",&TIM2->ARR, TIM2->ARR);
kenjiArai 1:102230f2879d 414 PRINTF("TIM2->PSC 0x%08x:0x%08x\r\n",&TIM2->PSC, TIM2->PSC);
kenjiArai 1:102230f2879d 415 PRINTF("TIM2->CCMR1 0x%08x:0x%08x\r\n",&TIM2->CCMR1, TIM2->CCMR1);
kenjiArai 1:102230f2879d 416 PRINTF("TIM2->CCMR2 0x%08x:0x%08x\r\n",&TIM2->CCMR2, TIM2->CCMR2);
kenjiArai 1:102230f2879d 417 PRINTF("TIM2->CCER 0x%08x:0x%08x\r\n",&TIM2->CCER, TIM2->CCER);
kenjiArai 1:102230f2879d 418 PRINTF("TIM2->SMCR 0x%08x:0x%08x\r\n",&TIM2->SMCR, TIM2->SMCR);
kenjiArai 1:102230f2879d 419 PRINTF("TIM2->CCR3 0x%08x:0x%08x\r\n\r\n",&TIM2->CCR3, TIM2->CCR3);
kenjiArai 1:102230f2879d 420 // Interrupt Timer2 IC2
kenjiArai 1:102230f2879d 421 for (uint32_t i = 0; i < CNT_BF_SIZE; i++) {
kenjiArai 1:102230f2879d 422 onepps_cnt[i] = 0;
kenjiArai 0:bfdc6ed58a06 423 }
kenjiArai 1:102230f2879d 424 onepps_num = 0;
kenjiArai 1:102230f2879d 425 onepps_ready_flg = 0;
kenjiArai 1:102230f2879d 426 onepps_buf_full = 0;
kenjiArai 1:102230f2879d 427 onepps_cnt_avarage = 0;
kenjiArai 1:102230f2879d 428 tim2_ready_flg = 0;
kenjiArai 1:102230f2879d 429 tim2_cnt_data = 0;
kenjiArai 1:102230f2879d 430 tim2_old_cnt_data = 0;
kenjiArai 1:102230f2879d 431 TIM2->SR &= ~(TIM_SR_CC2IF + TIM_SR_CC3IF); // clear IC flag
kenjiArai 1:102230f2879d 432 TIM2->DIER |= TIM_DIER_CC2IE + TIM_DIER_CC3IE;
kenjiArai 1:102230f2879d 433 NVIC_SetVector(TIM2_IRQn, (uint32_t)irq_ic2_TIM2);
kenjiArai 1:102230f2879d 434 NVIC_ClearPendingIRQ(TIM2_IRQn);
kenjiArai 1:102230f2879d 435 NVIC_EnableIRQ(TIM2_IRQn);
kenjiArai 1:102230f2879d 436 }
kenjiArai 1:102230f2879d 437
kenjiArai 1:102230f2879d 438 // Initialize TIM3 and TIM4 as 32bit counter (TIM3(16bit) + TIM4(16bit))
kenjiArai 1:102230f2879d 439 // TIM3 clock input is unkown freq.(measuring freq.) and TIM4 is slave counter
kenjiArai 1:102230f2879d 440 // 1sec gate signal connected both TIM3 IC2 and TIM4 IC1
kenjiArai 1:102230f2879d 441 void FRQ_CUNTR::initialize_TIM3P4(void)
kenjiArai 1:102230f2879d 442 {
kenjiArai 1:102230f2879d 443 // PC6 -> Unkown frequency input pin as Timer3 CH1/TI1
kenjiArai 1:102230f2879d 444 RCC->AHB1ENR |= (RCC_AHB1ENR_GPIOCEN);
kenjiArai 1:102230f2879d 445 GPIOC->AFR[0] &= 0xf0ffffff;
kenjiArai 1:102230f2879d 446 GPIOC->AFR[0] |= GPIO_AF2_TIM3 << 24;
kenjiArai 1:102230f2879d 447 GPIOC->MODER &= ~(GPIO_MODER_MODER6); // AF
kenjiArai 1:102230f2879d 448 GPIOC->MODER |= GPIO_MODER_MODER6_1;
kenjiArai 1:102230f2879d 449 GPIOC->PUPDR &= ~(GPIO_PUPDR_PUPDR6);
kenjiArai 1:102230f2879d 450 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR6_0; // PU
kenjiArai 1:102230f2879d 451 // Initialize Timer3(16bit) for an external up counter mode
kenjiArai 1:102230f2879d 452 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
kenjiArai 1:102230f2879d 453 TIM3->CR1 &= (uint16_t)(~(TIM_CR1_DIR | TIM_CR1_CMS | TIM_CR1_CKD));// count_up + div by 1
kenjiArai 1:102230f2879d 454 TIM3->CR1 |= (uint16_t)TIM_CR1_URS;
kenjiArai 1:102230f2879d 455 TIM3->ARR = 0xffff;
kenjiArai 1:102230f2879d 456 TIM3->CCER &= (uint16_t)~TIM_CCER_CC1E; // Disable the CC1
kenjiArai 1:102230f2879d 457 TIM3->CCMR1 &= (uint16_t)~(TIM_CCMR1_IC1F | TIM_CCMR1_CC1S); // input filter + input select
kenjiArai 1:102230f2879d 458 TIM3->CCMR1 |= (uint16_t)TIM_CCMR1_CC1S_0;
kenjiArai 1:102230f2879d 459 TIM3->CCER &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NE | TIM_CCER_CC1NP);// positive edge
kenjiArai 1:102230f2879d 460 TIM3->SMCR &= (uint16_t)~(TIM_SMCR_ECE | TIM_SMCR_TS | TIM_SMCR_SMS);// external mode 1
kenjiArai 1:102230f2879d 461 TIM3->SMCR |= (uint16_t)( TIM_TS_TI1FP1 | TIM_SLAVEMODE_EXTERNAL1); // ECE must be ZERO!!!!
kenjiArai 1:102230f2879d 462 TIM3->CR2 &= (uint16_t)~(TIM_CR2_TI1S | TIM_CR2_MMS);
kenjiArai 1:102230f2879d 463 TIM3->CR2 |= (uint16_t)TIM_CR2_MMS_1; // TRGO update
kenjiArai 1:102230f2879d 464 TIM3->CR1 |= (uint16_t)TIM_CR1_CEN; // Enable the TIM Counter
kenjiArai 1:102230f2879d 465 // Initialize Timer4(16bit) for an slave up counter of TIM3
kenjiArai 1:102230f2879d 466 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN;
kenjiArai 1:102230f2879d 467 TIM4->CR1 &= (uint16_t)(~(TIM_CR1_DIR | TIM_CR1_CMS | TIM_CR1_CKD));// count_up + div by 1
kenjiArai 1:102230f2879d 468 TIM4->CR1 |= (uint16_t)TIM_CR1_URS;
kenjiArai 1:102230f2879d 469 TIM4->ARR = 0xffff;
kenjiArai 1:102230f2879d 470 TIM4->CCER &= (uint16_t)TIM_CCER_CC1E; // Capture enable
kenjiArai 1:102230f2879d 471 TIM4->SMCR &= (uint16_t)~(TIM_SMCR_ECE | TIM_SMCR_TS | TIM_SMCR_SMS);// external mode 1
kenjiArai 1:102230f2879d 472 TIM4->SMCR |= (uint16_t)( TIM_TS_ITR2 | TIM_SLAVEMODE_EXTERNAL1);// ECE must be ZERO!!!!
kenjiArai 1:102230f2879d 473 TIM4->CR2 &= (uint16_t)~(TIM_CR2_TI1S | TIM_CR2_MMS);
kenjiArai 1:102230f2879d 474 TIM4->CR1 |= (uint16_t)TIM_CR1_CEN; // Enable the TIM Counter
kenjiArai 1:102230f2879d 475 // PC7 -> Input Capture pin as Timer3 IC2
kenjiArai 1:102230f2879d 476 GPIOC->AFR[0] &= 0x0fffffff;
kenjiArai 1:102230f2879d 477 GPIOC->AFR[0] |= GPIO_AF2_TIM3 << 28;
kenjiArai 1:102230f2879d 478 GPIOC->MODER &= ~(GPIO_MODER_MODER7); // AF
kenjiArai 1:102230f2879d 479 GPIOC->MODER |= GPIO_MODER_MODER7_1;
kenjiArai 1:102230f2879d 480 GPIOC->PUPDR &= ~(GPIO_PUPDR_PUPDR7);
kenjiArai 1:102230f2879d 481 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_0; // PU
kenjiArai 1:102230f2879d 482 // Initialize Timer3 IC2
kenjiArai 1:102230f2879d 483 TIM3->CCER &= (uint16_t)~TIM_CCER_CC2E; // Disable the CC2
kenjiArai 1:102230f2879d 484 TIM3->CCMR1 &= (uint16_t)~(TIM_CCMR1_IC2F | TIM_CCMR1_CC2S);// input filter + input select
kenjiArai 1:102230f2879d 485 TIM3->CCMR1 |= (uint16_t)TIM_CCMR1_CC2S_0;
kenjiArai 1:102230f2879d 486 TIM3->CCER &= (uint16_t)~(TIM_CCER_CC2P | TIM_CCER_CC2NP); // positive edge
kenjiArai 1:102230f2879d 487 TIM3->CCER |= (uint16_t)TIM_CCER_CC2E; // enable capture
kenjiArai 1:102230f2879d 488 // PB6 -> Input Capture pin as Timer4 IC1
kenjiArai 1:102230f2879d 489 GPIOB->AFR[0] &= 0xf0ffffff;
kenjiArai 1:102230f2879d 490 GPIOB->AFR[0] |= GPIO_AF2_TIM4 << 24;
kenjiArai 1:102230f2879d 491 GPIOB->MODER &= ~(GPIO_MODER_MODER6); // AF
kenjiArai 1:102230f2879d 492 GPIOB->MODER |= GPIO_MODER_MODER6_1;
kenjiArai 1:102230f2879d 493 GPIOB->PUPDR &= ~(GPIO_PUPDR_PUPDR6);
kenjiArai 1:102230f2879d 494 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_0; // Pull-up=01
kenjiArai 1:102230f2879d 495 // Initialize Timer4 IC1
kenjiArai 1:102230f2879d 496 TIM4->CCER &= (uint16_t)~TIM_CCER_CC1E;
kenjiArai 1:102230f2879d 497 TIM4->CCMR1 &= ((uint16_t)~TIM_CCMR1_CC1S) & ((uint16_t)~TIM_CCMR1_IC1F);
kenjiArai 1:102230f2879d 498 TIM4->CCMR1 |= (uint16_t)TIM_CCMR1_CC1S_0;
kenjiArai 1:102230f2879d 499 TIM4->CCER &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP); // positive edge
kenjiArai 1:102230f2879d 500 TIM4->CCER |= (uint16_t)TIM_CCER_CC1E; // enable capture
kenjiArai 1:102230f2879d 501 // Only for Debug purpose
kenjiArai 1:102230f2879d 502 // PB
kenjiArai 1:102230f2879d 503 PRINTF("// PB6 -> Input Capture pin as Timer4 CH1/TI1\r\n");
kenjiArai 1:102230f2879d 504 PRINTF("GPIOB->AFR[0]0x%08x:0x%08x\r\n",&GPIOB->AFR[0], GPIOB->AFR[0]);
kenjiArai 1:102230f2879d 505 PRINTF("GPIOB->AFR[1]0x%08x:0x%08x\r\n",&GPIOB->AFR[1], GPIOB->AFR[1]);
kenjiArai 1:102230f2879d 506 PRINTF("GPIOB->MODER 0x%08x:0x%08x\r\n",&GPIOB->MODER, GPIOB->MODER);
kenjiArai 1:102230f2879d 507 PRINTF("GPIOB->PUPDR 0x%08x:0x%08x\r\n",&GPIOB->PUPDR, GPIOB->PUPDR);
kenjiArai 1:102230f2879d 508 PRINTF("GPIOB->OTYPER 0x%08x:0x%08x\r\n",&GPIOB->OTYPER, GPIOB->OTYPER);
kenjiArai 1:102230f2879d 509 PRINTF("GPIOB->OSPEEDR 0x%08x:0x%08x\r\n",&GPIOB->OSPEEDR, GPIOB->OSPEEDR);
kenjiArai 1:102230f2879d 510 // PC
kenjiArai 1:102230f2879d 511 PRINTF("// PC6 -> unkown frequency input pin as Timer3 CH1/TI1\r\n");
kenjiArai 1:102230f2879d 512 PRINTF("// PC7 -> Input Capture pin as Timer3 CH2/TI2\r\n");
kenjiArai 1:102230f2879d 513 PRINTF("GPIOC->AFR[0]0x%08x:0x%08x\r\n",&GPIOC->AFR[0], GPIOC->AFR[0]);
kenjiArai 1:102230f2879d 514 PRINTF("GPIOC->AFR[1]0x%08x:0x%08x\r\n",&GPIOC->AFR[1], GPIOC->AFR[1]);
kenjiArai 1:102230f2879d 515 PRINTF("GPIOC->MODER 0x%08x:0x%08x\r\n",&GPIOC->MODER, GPIOC->MODER);
kenjiArai 1:102230f2879d 516 PRINTF("GPIOC->PUPDR 0x%08x:0x%08x\r\n",&GPIOC->PUPDR, GPIOC->PUPDR);
kenjiArai 1:102230f2879d 517 PRINTF("GPIOC->OTYPER 0x%08x:0x%08x\r\n",&GPIOC->OTYPER, GPIOC->OTYPER);
kenjiArai 1:102230f2879d 518 PRINTF("GPIOC->OSPEEDR 0x%08x:0x%08x\r\n",&GPIOC->OSPEEDR, GPIOC->OSPEEDR);
kenjiArai 1:102230f2879d 519 // TIM3
kenjiArai 1:102230f2879d 520 PRINTF("// PC6 -> Timer3(16bit) for an external up counter mode\r\n");
kenjiArai 1:102230f2879d 521 PRINTF("// PC7 -> Timer3 IC2\r\n");
kenjiArai 1:102230f2879d 522 PRINTF("TIM3->CR1 0x%08x:0x%08x\r\n",&TIM3->CR1, TIM3->CR1);
kenjiArai 1:102230f2879d 523 PRINTF("TIM3->ARR 0x%08x:0x%08x\r\n",&TIM3->ARR, TIM3->ARR);
kenjiArai 1:102230f2879d 524 PRINTF("TIM3->PSC 0x%08x:0x%08x\r\n",&TIM3->PSC, TIM3->PSC);
kenjiArai 1:102230f2879d 525 PRINTF("TIM3->CCMR1 0x%08x:0x%08x\r\n",&TIM3->CCMR1, TIM3->CCMR1);
kenjiArai 1:102230f2879d 526 PRINTF("TIM3->CCMR2 0x%08x:0x%08x\r\n",&TIM3->CCMR2, TIM3->CCMR2);
kenjiArai 1:102230f2879d 527 PRINTF("TIM3->CCER 0x%08x:0x%08x\r\n",&TIM3->CCER, TIM3->CCER);
kenjiArai 1:102230f2879d 528 PRINTF("TIM3->SMCR 0x%08x:0x%08x\r\n",&TIM3->SMCR, TIM3->SMCR);
kenjiArai 1:102230f2879d 529 // TIM4
kenjiArai 1:102230f2879d 530 PRINTF("// none-> Timer4(16bit) for an slave counter\r\n");
kenjiArai 1:102230f2879d 531 PRINTF("// PB6 -> Timer4 IC1\r\n");
kenjiArai 1:102230f2879d 532 PRINTF("TIM4->CR1 0x%08x:0x%08x\r\n",&TIM4->CR1, TIM4->CR1);
kenjiArai 1:102230f2879d 533 PRINTF("TIM4->ARR 0x%08x:0x%08x\r\n",&TIM4->ARR, TIM4->ARR);
kenjiArai 1:102230f2879d 534 PRINTF("TIM4->PSC 0x%08x:0x%08x\r\n",&TIM4->PSC, TIM4->PSC);
kenjiArai 1:102230f2879d 535 PRINTF("TIM4->CCMR1 0x%08x:0x%08x\r\n",&TIM4->CCMR1, TIM4->CCMR1);
kenjiArai 1:102230f2879d 536 PRINTF("TIM4->CCMR2 0x%08x:0x%08x\r\n",&TIM4->CCMR2, TIM4->CCMR2);
kenjiArai 1:102230f2879d 537 PRINTF("TIM4->CCER 0x%08x:0x%08x\r\n",&TIM4->CCER, TIM4->CCER);
kenjiArai 1:102230f2879d 538 PRINTF("TIM4->SMCR 0x%08x:0x%08x\r\n\r\n",&TIM4->SMCR, TIM4->SMCR);
kenjiArai 1:102230f2879d 539 PRINTF("RCC->APB1ENR 0x%08x:0x%08x\r\n\r\n",&RCC->APB1ENR, RCC->APB1ENR);
kenjiArai 1:102230f2879d 540 // Interrupt Timer3 IC2
kenjiArai 1:102230f2879d 541 tim3p4_ready_flg = 0;
kenjiArai 1:102230f2879d 542 tim3p4_cnt_data = 0;
kenjiArai 1:102230f2879d 543 TIM3->SR &= ~TIM_SR_CC2IF; // clear IC flag
kenjiArai 1:102230f2879d 544 TIM4->SR &= ~TIM_SR_CC1IF;
kenjiArai 1:102230f2879d 545 TIM3->DIER |= TIM_DIER_CC2IE;
kenjiArai 1:102230f2879d 546 NVIC_SetVector(TIM3_IRQn, (uint32_t)irq_ic2_TIM3P4);
kenjiArai 1:102230f2879d 547 NVIC_ClearPendingIRQ(TIM3_IRQn);
kenjiArai 1:102230f2879d 548 NVIC_EnableIRQ(TIM3_IRQn);
kenjiArai 1:102230f2879d 549 }
kenjiArai 0:bfdc6ed58a06 550
kenjiArai 0:bfdc6ed58a06 551 } // Frequency_counter