![](/media/cache/profiles/f0fcf351df4eb6786e9bb6fc4e2dee02.jpg.50x50_q85.jpg)
Only for mbed LPC1768, mbed LPC1114FN28, Nucleo-F401 and Nucleo-F411. No way to change pin assign.
Dependencies: freq_counter TextLCD
Fork of 5MHzOSC by
Please refer following page.
http://developer.mbed.org/users/kenjiArai/notebook/simple-frequency-counter/
/users/kenjiArai/notebook/frequency-counters/
Diff: main.cpp
- Revision:
- 8:651bfebc5f39
- Parent:
- 7:0c09d29c4cf3
- Child:
- 9:0b84a8ce225a
--- a/main.cpp Wed Oct 22 00:41:14 2014 +0000 +++ b/main.cpp Sun May 17 04:20:22 2015 +0000 @@ -1,11 +1,11 @@ /* * mbed Application program / Frequency Counter * - * Copyright (c) 2014 Kenji Arai / JH1PJL + * Copyright (c) 2014-2015 Kenji Arai / JH1PJL * http://www.page.sannet.ne.jp/kenjia/index.html * http://mbed.org/users/kenjiArai/ * Created: October 18th, 2014 - * Revised: October 22nd, 2014 + * Revised: May 17th, 2015 * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE @@ -15,8 +15,8 @@ */ #define USE_COM // use Communication with PC(UART) -#define USE_TEXT_LCD // use Text LCD/I2C Interface -#define USE_GRAP_LCD // use Grafic LCD/SPI interface +//#define USE_TEXT_LCD // use Text LCD/I2C Interface +//#define USE_GRAP_LCD // use Grafic LCD/SPI interface // Include --------------------------------------------------------------------------------------- #include "mbed.h" @@ -44,22 +44,28 @@ #endif #if defined(TARGET_LPC1768) + // LPC1768 Frequency example // Outout mbed's "PWM6" pin to 96MHZ/19 = 5.052MHz (Approx) #define CLK_REFRENCE() PWM6_SETCLK(19) // Outout mbed's "PWM6" pin to 96MHZ/96 = 1.000MHz (Approx) //#define CLK_REFRENCE() PWM6_SETCLK(96) + #elif defined(TARGET_LPC1114) + #define led_not_zero temp_ram #define led_01 temp_ram #define led_10 temp_ram #define CLK_REFRENCE() clock_out() #warning "Don't forget LPC1114 runs with internal clock. Measurement data is not accurate!!" + #elif defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) + #define led_not_zero temp_ram #define led_01 temp_ram #define led_10 temp_ram #define CLK_REFRENCE() port_mco1_mco2_set() + #else #error "No support for this CPU" #endif @@ -130,101 +136,20 @@ // ROM / Constant data --------------------------------------------------------------------------- // Function prototypes --------------------------------------------------------------------------- - -// Function prototypes --------------------------------------------------------------------------- +void read_sw_and_set_gate_time(void); +#if defined(TARGET_LPC1768) +void PWM6_SETCLK(int div); +#endif +#if defined(TARGET_LPC1114) +void clock_out(void); +#endif +#if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) +void port_mco1_mco2_set(void); +#endif //------------------------------------------------------------------------------------------------- // Control Program //------------------------------------------------------------------------------------------------- -#if defined(TARGET_LPC1768) - -// Clock Output From pin21(PWM6) -// Set Clock Freq with div. -// if mbed is running at 96MHz, div is set 96 to Get 1MHz. -void PWM6_SETCLK(int div) -{ - LPC_PWM1->TCR = (1 << 1); // 1)Reset counter, disable PWM - LPC_SC->PCLKSEL0 &= ~(0x3 << 12); - LPC_SC->PCLKSEL0 |= (1 << 12); // 2)Set peripheral clock divider to /1, i.e. system clock - LPC_PWM1->MR0 = div - 1; // 3)Match Register 0 is shared period counter for all PWM1 - LPC_PWM1->MR6 = (div + 1)>> 1; // - LPC_PWM1->LER |= 1; // 4)Start updating at next period start - LPC_PWM1->TCR = (1 << 0) || (1 << 3); // 5)Enable counter and PWM -} - -#elif defined(TARGET_LPC1114) - -// CLOCKOUT from pin24(dp18) -// Freq = 48MHz/4 = 12MHz -void clock_out(void) -{ - LPC_SYSCON->CLKOUTCLKSEL = 3; // System clock - LPC_SYSCON->CLKOUTDIV = 4; // div 1/4 - LPC_IOCON->PIO0_1 = 1; // select CLKOUT to P0_1(pin24)/dp18 - LPC_SYSCON->CLKOUTUEN = 1; // enable output -} - -#elif defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) - -void port_mco1_mco2_set(void) -{ - uint32_t temp = 0x00; - - // PA8 -> MCO_1 - temp = ((uint32_t)(GPIO_AF0_MCO) << (((uint32_t)8 & (uint32_t)0x07) * 4)) ; - GPIOA->AFR[8 >> 3] &= ~((uint32_t)0xf << ((uint32_t)(8 & (uint32_t)0x07) * 4)) ; - GPIOA->AFR[8 >> 3] |= temp; - GPIOA->MODER &= ~(GPIO_MODER_MODER0 << (8 * 2)); - GPIOA->MODER |= (0x2 << (8 * 2)); - // PC9 -> MCO_2 - temp = ((uint32_t)(GPIO_AF0_MCO) << (((uint32_t)9 & (uint32_t)0x07) * 4)) ; - GPIOC->AFR[9 >> 3] &= ~((uint32_t)0xf << ((uint32_t)(9 & (uint32_t)0x07) * 4)) ; - GPIOC->AFR[9 >> 3] |= temp; - GPIOC->MODER &= ~(GPIO_MODER_MODER0 << (9 * 2)); - GPIOC->MODER |= (0x2 << (9 * 2)); - // Select output clock source - RCC->CFGR &= 0x009fffff; - // MC0_1 output HSE 1/4, MCO_2 output SYSCLK 1/4 - // MCO2 MCO2PRE MCO1PRE MCO1 - RCC->CFGR |= (0x0 << 30) + (0x6 << 27) + (0x6 << 24) + (0x3 << 22); -} - -#else -#error "No support for this CPU" -#endif - -void read_sw_and_set_gate_time(void) -{ - if (sw_10) { - led_10 = 1; - sw = 2; - } else { - led_10 = 0; - sw = 0; - } - if (sw_01) { - led_01 = 1; - sw += 1; - } else { - led_01 = 0; - } - switch (sw) { - case 0: - t_gate = 0.001; - break; - case 1: - t_gate = 0.01; - break; - case 2: - t_gate = 0.1; - break; - case 3: - default: - t_gate = 1.0; - break; - } -} - int main() { PRINTF("\r\nFrequency Counter by JH1PJL created on "__DATE__"\r\n"); @@ -334,3 +259,100 @@ } } } + +void read_sw_and_set_gate_time(void) +{ + if (sw_10) { + led_10 = 1; + sw = 2; + } else { + led_10 = 0; + sw = 0; + } + if (sw_01) { + led_01 = 1; + sw += 1; + } else { + led_01 = 0; + } + switch (sw) { + case 0: + t_gate = 0.001; + break; + case 1: + t_gate = 0.01; + break; + case 2: + t_gate = 0.1; + break; + case 3: + default: + t_gate = 1.0; + break; + } +} + +#if defined(TARGET_LPC1768) + +// Clock Output From pin21(PWM6) +// Set Clock Freq with div. +// if mbed is running at 96MHz, div is set 96 to Get 1MHz. +void PWM6_SETCLK(int div) +{ + LPC_PWM1->TCR = (1 << 1); // 1)Reset counter, disable PWM + LPC_SC->PCLKSEL0 &= ~(0x3 << 12); + LPC_SC->PCLKSEL0 |= (1 << 12); // 2)Set peripheral clock divider to /1, i.e. system clock + LPC_PWM1->MR0 = div - 1; // 3)Match Register 0 is shared period counter for all PWM1 + LPC_PWM1->MR6 = (div + 1)>> 1; // + LPC_PWM1->LER |= 1; // 4)Start updating at next period start + LPC_PWM1->TCR = (1 << 0) || (1 << 3); // 5)Enable counter and PWM +} + +#elif defined(TARGET_LPC1114) + +// CLOCKOUT from pin24(dp18) +// Freq = 48MHz/4 = 12MHz +void clock_out(void) +{ + LPC_SYSCON->CLKOUTCLKSEL = 3; // System clock + LPC_SYSCON->CLKOUTDIV = 4; // div 1/4 + LPC_IOCON->PIO0_1 = 1; // select CLKOUT to P0_1(pin24)/dp18 + LPC_SYSCON->CLKOUTUEN = 1; // enable output +} + +#elif defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) + +void port_mco1_mco2_set(void) +{ + uint32_t temp = 0x00; + + // PA8 -> MCO_1 + temp = ((uint32_t)(GPIO_AF0_MCO) << (((uint32_t)8 & (uint32_t)0x07) * 4)) ; + GPIOA->AFR[8 >> 3] &= ~((uint32_t)0xf << ((uint32_t)(8 & (uint32_t)0x07) * 4)) ; + GPIOA->AFR[8 >> 3] |= temp; + GPIOA->MODER &= ~(GPIO_MODER_MODER0 << (8 * 2)); + GPIOA->MODER |= (0x2 << (8 * 2)); + GPIOA->OSPEEDR |= (0x03 << (8 * 2)); // High speed + // PC9 -> MCO_2 + temp = ((uint32_t)(GPIO_AF0_MCO) << (((uint32_t)9 & (uint32_t)0x07) * 4)) ; + GPIOC->AFR[9 >> 3] &= ~((uint32_t)0xf << ((uint32_t)(9 & (uint32_t)0x07) * 4)) ; + GPIOC->AFR[9 >> 3] |= temp; + GPIOC->MODER &= ~(GPIO_MODER_MODER0 << (9 * 2)); + GPIOC->MODER |= (0x2 << (9 * 2)); + GPIOC->OSPEEDR |= (0x03 << (9 * 2)); // High speed + // Select output clock source + RCC->CFGR &= 0x009fffff; +#if 0 + // MC0_1 output HSE 1/4, MCO_2 output SYSCLK 1/4 + // MCO2 MCO2PRE MCO1PRE MCO1 + RCC->CFGR |= (0x0 << 30) + (0x6 << 27) + (0x6 << 24) + (0x3 << 22); +#else + // MC0_1 output HSE 1/1, MCO_2 output SYSCLK 1/2 + // MCO2 MCO2PRE MCO1PRE MCO1 + RCC->CFGR |= (0x0 << 30) + (0x4 << 27) + (0x0 << 24) + (0x3 << 22); +#endif +} + +#else +#error "No support for this CPU" +#endif \ No newline at end of file