Added one channel mode

Dependents:   CW_Decoder_using_FFT_on_F446

Fork of F446_AD_DA by 不韋 呂

Committer:
kenjiArai
Date:
Sun Feb 05 07:59:14 2017 +0000
Revision:
4:03e91e464ce5
Parent:
1:6b9f2af6613d
added one channel mode (only A0/PA_0 input)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 0:c945b4fe9a48 1 //----------------------------------------------------------
MikamiUitOpen 0:c945b4fe9a48 2 // Simultanuous AD Conversion by interrupt using
MikamiUitOpen 0:c945b4fe9a48 3 // ADC2 and ADC3 on STM32F446 ---- Header
MikamiUitOpen 0:c945b4fe9a48 4 //
MikamiUitOpen 0:c945b4fe9a48 5 // STM32F446 の ADC2, ADC3 を使って同時に AD 変換を開始し,
MikamiUitOpen 0:c945b4fe9a48 6 // 割り込みによりアナログ信号を入力するクラス(ヘッダ)
MikamiUitOpen 0:c945b4fe9a48 7 // AdcDual クラスの派生クラス
MikamiUitOpen 0:c945b4fe9a48 8 //
MikamiUitOpen 1:6b9f2af6613d 9 // 2016/11/12, Copyright (c) 2016 MIKAMI, Naoki
MikamiUitOpen 0:c945b4fe9a48 10 //----------------------------------------------------------
MikamiUitOpen 0:c945b4fe9a48 11
MikamiUitOpen 0:c945b4fe9a48 12 #include "F446_ADC.hpp"
MikamiUitOpen 0:c945b4fe9a48 13
MikamiUitOpen 0:c945b4fe9a48 14 namespace Mikami
MikamiUitOpen 0:c945b4fe9a48 15 {
kenjiArai 4:03e91e464ce5 16
kenjiArai 4:03e91e464ce5 17 #ifndef F446_ADC_DUAL_INTERRUPT_HPP
kenjiArai 4:03e91e464ce5 18 #define F446_ADC_DUAL_INTERRUPT_HPP
kenjiArai 4:03e91e464ce5 19
MikamiUitOpen 0:c945b4fe9a48 20 class AdcDual_Intr : public AdcDual
MikamiUitOpen 0:c945b4fe9a48 21 {
MikamiUitOpen 0:c945b4fe9a48 22 public:
MikamiUitOpen 0:c945b4fe9a48 23 AdcDual_Intr(int frequency) : AdcDual(frequency)
MikamiUitOpen 0:c945b4fe9a48 24 { ADC2->CR1 |= ADC_CR1_EOCIE; }
MikamiUitOpen 0:c945b4fe9a48 25
MikamiUitOpen 1:6b9f2af6613d 26 // -1.0f <= ad1, ad2 <= 1.0f
MikamiUitOpen 1:6b9f2af6613d 27 virtual void Read(float &ad1, float &ad2)
MikamiUitOpen 0:c945b4fe9a48 28 {
MikamiUitOpen 0:c945b4fe9a48 29 ad1 = ToFloat(ADC2->DR);
MikamiUitOpen 0:c945b4fe9a48 30 ad2 = ToFloat(ADC3->DR);
MikamiUitOpen 0:c945b4fe9a48 31 }
MikamiUitOpen 0:c945b4fe9a48 32
MikamiUitOpen 1:6b9f2af6613d 33 // 0 <= ad1, ad2 <= 4095
MikamiUitOpen 1:6b9f2af6613d 34 virtual void Read(uint16_t &ad1, uint16_t &ad2)
MikamiUitOpen 0:c945b4fe9a48 35 {
MikamiUitOpen 0:c945b4fe9a48 36 ad1 = ADC2->DR;
MikamiUitOpen 0:c945b4fe9a48 37 ad2 = ADC3->DR;
MikamiUitOpen 0:c945b4fe9a48 38 }
MikamiUitOpen 0:c945b4fe9a48 39
MikamiUitOpen 0:c945b4fe9a48 40 // Set interrupt vector and enable IRQ of ADC
MikamiUitOpen 0:c945b4fe9a48 41 void SetIntrVec(void (*Func)())
MikamiUitOpen 0:c945b4fe9a48 42 {
MikamiUitOpen 0:c945b4fe9a48 43 NVIC_SetVector(ADC_IRQn, (uint32_t)Func); // See "cmsis_nvic.h"
MikamiUitOpen 0:c945b4fe9a48 44 NVIC_EnableIRQ(ADC_IRQn); // See "core_cm4.h"
MikamiUitOpen 0:c945b4fe9a48 45 }
MikamiUitOpen 0:c945b4fe9a48 46
MikamiUitOpen 0:c945b4fe9a48 47 void DisableAdcIntr()
MikamiUitOpen 0:c945b4fe9a48 48 { NVIC_DisableIRQ(ADC_IRQn); }
MikamiUitOpen 0:c945b4fe9a48 49
MikamiUitOpen 0:c945b4fe9a48 50 private:
MikamiUitOpen 0:c945b4fe9a48 51 // for inhibition of copy constructor
MikamiUitOpen 0:c945b4fe9a48 52 AdcDual_Intr(const AdcDual_Intr&);
MikamiUitOpen 0:c945b4fe9a48 53 // for inhibition of substitute operator
MikamiUitOpen 0:c945b4fe9a48 54 AdcDual_Intr& operator=(const AdcDual_Intr&);
MikamiUitOpen 0:c945b4fe9a48 55 };
kenjiArai 4:03e91e464ce5 56
kenjiArai 4:03e91e464ce5 57 #endif // F446_ADC_DUAL_INTERRUPT_HPP
kenjiArai 4:03e91e464ce5 58
kenjiArai 4:03e91e464ce5 59 //------------------------------------------------------------------------------
kenjiArai 4:03e91e464ce5 60
kenjiArai 4:03e91e464ce5 61 #ifndef F446_ADC_SINGLE_INTERRUPT_HPP
kenjiArai 4:03e91e464ce5 62 #define F446_ADC_SINGLE_INTERRUPT_HPP
kenjiArai 4:03e91e464ce5 63
kenjiArai 4:03e91e464ce5 64 class AdcSingle_Intr : public AdcSingle
kenjiArai 4:03e91e464ce5 65 {
kenjiArai 4:03e91e464ce5 66 public:
kenjiArai 4:03e91e464ce5 67 AdcSingle_Intr(int frequency) : AdcSingle(frequency)
kenjiArai 4:03e91e464ce5 68 { ADC2->CR1 |= ADC_CR1_EOCIE; }
kenjiArai 4:03e91e464ce5 69
kenjiArai 4:03e91e464ce5 70 virtual void Read(float &ad)
kenjiArai 4:03e91e464ce5 71 {
kenjiArai 4:03e91e464ce5 72 ad = ToFloat(ADC2->DR);
kenjiArai 4:03e91e464ce5 73 }
kenjiArai 4:03e91e464ce5 74
kenjiArai 4:03e91e464ce5 75 virtual void Read(uint16_t &ad)
kenjiArai 4:03e91e464ce5 76 {
kenjiArai 4:03e91e464ce5 77 ad = ADC2->DR;
kenjiArai 4:03e91e464ce5 78 }
kenjiArai 4:03e91e464ce5 79
kenjiArai 4:03e91e464ce5 80 // Set interrupt vector and enable IRQ of ADC
kenjiArai 4:03e91e464ce5 81 void SetIntrVec(void (*Func)())
kenjiArai 4:03e91e464ce5 82 {
kenjiArai 4:03e91e464ce5 83 NVIC_SetVector(ADC_IRQn, (uint32_t)Func); // See "cmsis_nvic.h"
kenjiArai 4:03e91e464ce5 84 NVIC_EnableIRQ(ADC_IRQn); // See "core_cm4.h"
kenjiArai 4:03e91e464ce5 85 }
kenjiArai 4:03e91e464ce5 86
kenjiArai 4:03e91e464ce5 87 void DisableAdcIntr()
kenjiArai 4:03e91e464ce5 88 { NVIC_DisableIRQ(ADC_IRQn); }
kenjiArai 4:03e91e464ce5 89
kenjiArai 4:03e91e464ce5 90 private:
kenjiArai 4:03e91e464ce5 91 // for inhibition of copy constructor
kenjiArai 4:03e91e464ce5 92 AdcSingle_Intr(const AdcSingle_Intr&);
kenjiArai 4:03e91e464ce5 93 // for inhibition of substitute operator
kenjiArai 4:03e91e464ce5 94 AdcSingle_Intr& operator=(const AdcSingle_Intr&);
kenjiArai 4:03e91e464ce5 95 };
kenjiArai 4:03e91e464ce5 96 #endif // F446_ADC_SINGLE_INTERRUPT_HPP
kenjiArai 4:03e91e464ce5 97
MikamiUitOpen 0:c945b4fe9a48 98 }
kenjiArai 4:03e91e464ce5 99