CheckRTC.cpp

00001 /*
00002  * mbed Library program
00003  *      Check RTC function and set proper clock if we can set
00004  *      ONLY FOR "Nucleo Board"
00005  *
00006  *  Copyright (c) 2010-2015 Kenji Arai / JH1PJL
00007  *  http://www.page.sannet.ne.jp/kenjia/index.html
00008  *  http://mbed.org/users/kenjiArai/
00009  *      Created:  October   24th, 2014
00010  *      Revised:  May       16th, 2015
00011  *
00012  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
00013  * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
00014  * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
00015  * DAMAGES OR OTHER  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
00016  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
00017  */
00018 
00019 //#define DEBUG         // use Communication with PC(UART)
00020 
00021 //  Include ---------------------------------------------------------------------------------------
00022 #include "mbed.h"
00023 #include "CheckRTC.h"
00024 
00025 //  Definition ------------------------------------------------------------------------------------
00026 #ifdef DEBUG
00027 #define PUTS(x)         pcm.puts(x)
00028 #define PRINTF(...)     pcm.printf(__VA_ARGS__)
00029 #else
00030 #define PUTS(x)         {;}
00031 #define PRINTF(...)     {;}
00032 #endif
00033 
00034 //  Object ----------------------------------------------------------------------------------------
00035 #ifdef DEBUG
00036 Serial pcm(USBTX, USBRX);
00037 #endif
00038 
00039 //  RAM -------------------------------------------------------------------------------------------
00040 
00041 //  ROM / Constant data ---------------------------------------------------------------------------
00042 
00043 //  Function prototypes ---------------------------------------------------------------------------
00044 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_L152RE)
00045 static int32_t Set_RTC_LSI(void);
00046 static int32_t rtc_external_osc_init(void);
00047 static int32_t Set_RTC_LSE(void);
00048 #endif
00049 
00050 //-------------------------------------------------------------------------------------------------
00051 //  Control Program
00052 //-------------------------------------------------------------------------------------------------
00053 int32_t CheckRTC(void)
00054 {
00055 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_L152RE)
00056     if (rtc_external_osc_init() == OK) {
00057         return OK;
00058     } else {
00059         return NG;
00060     }
00061 #elif defined(TARGET_LPC1768) || defined(TARGET_K64F)
00062     return OK;
00063 #else
00064     return UNKNOWN;
00065 #endif
00066 }
00067 
00068 uint32_t get_RTCSEL(void)
00069 {
00070 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE)
00071     return ((RCC->BDCR >> 8) & 0x03);
00072 #elif defined(TARGET_NUCLEO_L152RE)
00073     return ((RCC->CSR >> 16) & 0x03);
00074 #else
00075     return 0;
00076 #endif
00077 }
00078 
00079 #if defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_L152RE)
00080 int32_t Set_RTC_LSE(void)
00081 {
00082     uint32_t timeout = 0;
00083 
00084     //---------------------------- LSE Configuration -------------------------
00085     // Enable Power Clock
00086     __PWR_CLK_ENABLE();
00087     // Enable write access to Backup domain
00088     PWR->CR |= PWR_CR_DBP;
00089     // Wait for Backup domain Write protection disable
00090     timeout = HAL_GetTick() + DBP_TIMEOUT_VALUE;
00091     while((PWR->CR & PWR_CR_DBP) == RESET) {
00092         if(HAL_GetTick() >= timeout) {
00093             PRINTF("Time-Out 1\r\n");
00094             return NG;
00095         }
00096     }
00097     // Reset LSEON and LSEBYP bits before configuring the LSE ----------------
00098     __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
00099     // Get timeout
00100     timeout = HAL_GetTick() + TIMEOUT;
00101     // Wait till LSE is ready
00102     while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) {
00103         if(HAL_GetTick() >= timeout) {
00104             PRINTF("Time-Out 2\r\n");
00105             return NG;
00106         }
00107     }
00108     // Set the new LSE configuration -----------------------------------------
00109     __HAL_RCC_LSE_CONFIG(RCC_LSE_ON);
00110     // Get timeout
00111     timeout = HAL_GetTick() + TIMEOUT;
00112     // Wait till LSE is ready
00113     while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) {
00114         if(HAL_GetTick() >= timeout) {
00115             PRINTF("Time-Out 3\r\n");
00116             return NG;
00117         }
00118     }
00119     PRINTF("OK");
00120     return OK;
00121 }
00122 
00123 int32_t Set_RTC_LSI(void)
00124 {
00125     uint32_t timeout = 0;
00126 
00127     // Enable Power clock
00128     __PWR_CLK_ENABLE();
00129     // Enable access to Backup domain
00130     HAL_PWR_EnableBkUpAccess();
00131     // Reset Backup domain
00132     __HAL_RCC_BACKUPRESET_FORCE();
00133     __HAL_RCC_BACKUPRESET_RELEASE();
00134     // Enable Power Clock
00135     __PWR_CLK_ENABLE();
00136     // Enable write access to Backup domain
00137     PWR->CR |= PWR_CR_DBP;
00138     // Wait for Backup domain Write protection disable
00139     timeout = HAL_GetTick() + DBP_TIMEOUT_VALUE;
00140     while((PWR->CR & PWR_CR_DBP) == RESET) {
00141         if(HAL_GetTick() >= timeout) {
00142             return NG;
00143         }
00144     }
00145     __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
00146     // Enable LSI
00147     __HAL_RCC_LSI_ENABLE();
00148     timeout = HAL_GetTick() + TIMEOUT;
00149     // Wait till LSI is ready
00150     while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) {
00151         if(HAL_GetTick() >= timeout) {
00152             return NG;
00153         }
00154     }
00155     // Connect LSI to RTC
00156     __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
00157     __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
00158     return OK;
00159 }
00160 
00161 int32_t rtc_external_osc_init(void)
00162 {
00163     // Enable Power clock
00164     __PWR_CLK_ENABLE();
00165     // Enable access to Backup domain
00166     HAL_PWR_EnableBkUpAccess();
00167     // Reset Backup domain
00168     __HAL_RCC_BACKUPRESET_FORCE();
00169     __HAL_RCC_BACKUPRESET_RELEASE();
00170     // Enable LSE Oscillator
00171     if (Set_RTC_LSE() == OK) {
00172         // Connect LSE to RTC
00173         __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
00174         __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
00175         return OK;
00176     } else {
00177         Set_RTC_LSI();
00178         return NG;
00179     }
00180 }
00181 #endif