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source/nordic-sdk/components/device/nrf51.h@551:ab7a8de3ff10, 2016-01-11 (annotated)

Committer:: vcoubard
Date:: Mon Jan 11 10:19:10 2016 +0000
Revision:: 551:ab7a8de3ff10
Parent:: 504:2179e57ad950

Synchronized with git rev 6825c511

Author: Rohit Grover

Release 2.1.0

=============



Upgrading to files from v8.1 of the Nordic SDK.

Who changed what in which revision?

User	Revision	Line number	New contents of line
vcoubard	551:ab7a8de3ff10	1	/*
vcoubard	551:ab7a8de3ff10	2	* Copyright (c) Nordic Semiconductor ASA
vcoubard	551:ab7a8de3ff10	3	* All rights reserved.
vcoubard	551:ab7a8de3ff10	4	*
vcoubard	551:ab7a8de3ff10	5	* Redistribution and use in source and binary forms, with or without modification,
vcoubard	551:ab7a8de3ff10	6	* are permitted provided that the following conditions are met:
vcoubard	551:ab7a8de3ff10	7	*
vcoubard	551:ab7a8de3ff10	8	* 1. Redistributions of source code must retain the above copyright notice, this
vcoubard	551:ab7a8de3ff10	9	* list of conditions and the following disclaimer.
vcoubard	551:ab7a8de3ff10	10	*
vcoubard	551:ab7a8de3ff10	11	* 2. Redistributions in binary form must reproduce the above copyright notice, this
vcoubard	551:ab7a8de3ff10	12	* list of conditions and the following disclaimer in the documentation and/or
vcoubard	551:ab7a8de3ff10	13	* other materials provided with the distribution.
vcoubard	551:ab7a8de3ff10	14	*
vcoubard	551:ab7a8de3ff10	15	* 3. Neither the name of Nordic Semiconductor ASA nor the names of other
vcoubard	551:ab7a8de3ff10	16	* contributors to this software may be used to endorse or promote products
vcoubard	551:ab7a8de3ff10	17	* derived from this software without specific prior written permission.
vcoubard	551:ab7a8de3ff10	18	*
vcoubard	551:ab7a8de3ff10	19	*
vcoubard	551:ab7a8de3ff10	20	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
vcoubard	551:ab7a8de3ff10	21	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
vcoubard	551:ab7a8de3ff10	22	* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vcoubard	551:ab7a8de3ff10	23	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
vcoubard	551:ab7a8de3ff10	24	* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
vcoubard	551:ab7a8de3ff10	25	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
vcoubard	551:ab7a8de3ff10	26	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
vcoubard	551:ab7a8de3ff10	27	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
vcoubard	551:ab7a8de3ff10	28	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
vcoubard	551:ab7a8de3ff10	29	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vcoubard	551:ab7a8de3ff10	30	*
vcoubard	551:ab7a8de3ff10	31	*/
vcoubard	551:ab7a8de3ff10	32
vcoubard	551:ab7a8de3ff10	33	/** @addtogroup nRF51
vcoubard	551:ab7a8de3ff10	34	* @{
vcoubard	551:ab7a8de3ff10	35	*/
vcoubard	551:ab7a8de3ff10	36
vcoubard	551:ab7a8de3ff10	37	#ifndef NRF51_H
vcoubard	551:ab7a8de3ff10	38	#define NRF51_H
vcoubard	551:ab7a8de3ff10	39
vcoubard	551:ab7a8de3ff10	40	#ifdef __cplusplus
vcoubard	551:ab7a8de3ff10	41	extern "C" {
vcoubard	551:ab7a8de3ff10	42	#endif
vcoubard	551:ab7a8de3ff10	43
vcoubard	551:ab7a8de3ff10	44
vcoubard	551:ab7a8de3ff10	45	/* ------------------------- Interrupt Number Definition ------------------------ */
vcoubard	551:ab7a8de3ff10	46
vcoubard	551:ab7a8de3ff10	47	typedef enum {
vcoubard	551:ab7a8de3ff10	48	/* ------------------- Cortex-M0 Processor Exceptions Numbers ------------------- */
vcoubard	551:ab7a8de3ff10	49	Reset_IRQn = -15, /!< 1 Reset Vector, invoked on Power up and warm reset /
vcoubard	551:ab7a8de3ff10	50	NonMaskableInt_IRQn = -14, /!< 2 Non maskable Interrupt, cannot be stopped or preempted /
vcoubard	551:ab7a8de3ff10	51	HardFault_IRQn = -13, /!< 3 Hard Fault, all classes of Fault /
vcoubard	551:ab7a8de3ff10	52	SVCall_IRQn = -5, /!< 11 System Service Call via SVC instruction /
vcoubard	551:ab7a8de3ff10	53	DebugMonitor_IRQn = -4, /!< 12 Debug Monitor /
vcoubard	551:ab7a8de3ff10	54	PendSV_IRQn = -2, /!< 14 Pendable request for system service /
vcoubard	551:ab7a8de3ff10	55	SysTick_IRQn = -1, /!< 15 System Tick Timer /
vcoubard	551:ab7a8de3ff10	56	/* ---------------------- nRF51 Specific Interrupt Numbers ---------------------- */
vcoubard	551:ab7a8de3ff10	57	POWER_CLOCK_IRQn = 0, /!< 0 POWER_CLOCK /
vcoubard	551:ab7a8de3ff10	58	RADIO_IRQn = 1, /!< 1 RADIO /
vcoubard	551:ab7a8de3ff10	59	UART0_IRQn = 2, /!< 2 UART0 /
vcoubard	551:ab7a8de3ff10	60	SPI0_TWI0_IRQn = 3, /!< 3 SPI0_TWI0 /
vcoubard	551:ab7a8de3ff10	61	SPI1_TWI1_IRQn = 4, /!< 4 SPI1_TWI1 /
vcoubard	551:ab7a8de3ff10	62	GPIOTE_IRQn = 6, /!< 6 GPIOTE /
vcoubard	551:ab7a8de3ff10	63	ADC_IRQn = 7, /!< 7 ADC /
vcoubard	551:ab7a8de3ff10	64	TIMER0_IRQn = 8, /!< 8 TIMER0 /
vcoubard	551:ab7a8de3ff10	65	TIMER1_IRQn = 9, /!< 9 TIMER1 /
vcoubard	551:ab7a8de3ff10	66	TIMER2_IRQn = 10, /!< 10 TIMER2 /
vcoubard	551:ab7a8de3ff10	67	RTC0_IRQn = 11, /!< 11 RTC0 /
vcoubard	551:ab7a8de3ff10	68	TEMP_IRQn = 12, /!< 12 TEMP /
vcoubard	551:ab7a8de3ff10	69	RNG_IRQn = 13, /!< 13 RNG /
vcoubard	551:ab7a8de3ff10	70	ECB_IRQn = 14, /!< 14 ECB /
vcoubard	551:ab7a8de3ff10	71	CCM_AAR_IRQn = 15, /!< 15 CCM_AAR /
vcoubard	551:ab7a8de3ff10	72	WDT_IRQn = 16, /!< 16 WDT /
vcoubard	551:ab7a8de3ff10	73	RTC1_IRQn = 17, /!< 17 RTC1 /
vcoubard	551:ab7a8de3ff10	74	QDEC_IRQn = 18, /!< 18 QDEC /
vcoubard	551:ab7a8de3ff10	75	LPCOMP_IRQn = 19, /!< 19 LPCOMP /
vcoubard	551:ab7a8de3ff10	76	SWI0_IRQn = 20, /!< 20 SWI0 /
vcoubard	551:ab7a8de3ff10	77	SWI1_IRQn = 21, /!< 21 SWI1 /
vcoubard	551:ab7a8de3ff10	78	SWI2_IRQn = 22, /!< 22 SWI2 /
vcoubard	551:ab7a8de3ff10	79	SWI3_IRQn = 23, /!< 23 SWI3 /
vcoubard	551:ab7a8de3ff10	80	SWI4_IRQn = 24, /!< 24 SWI4 /
vcoubard	551:ab7a8de3ff10	81	SWI5_IRQn = 25 /!< 25 SWI5 /
vcoubard	551:ab7a8de3ff10	82	} IRQn_Type;
vcoubard	551:ab7a8de3ff10	83
vcoubard	551:ab7a8de3ff10	84
vcoubard	551:ab7a8de3ff10	85	/** @addtogroup Configuration_of_CMSIS
vcoubard	551:ab7a8de3ff10	86	* @{
vcoubard	551:ab7a8de3ff10	87	*/
vcoubard	551:ab7a8de3ff10	88
vcoubard	551:ab7a8de3ff10	89
vcoubard	551:ab7a8de3ff10	90	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	91	/* ================ Processor and Core Peripheral Section ================ */
vcoubard	551:ab7a8de3ff10	92	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	93
vcoubard	551:ab7a8de3ff10	94	/* ----------------Configuration of the Cortex-M0 Processor and Core Peripherals---------------- */
vcoubard	551:ab7a8de3ff10	95	#define __CM0_REV 0x0301 /!< Cortex-M0 Core Revision /
vcoubard	551:ab7a8de3ff10	96	#define __MPU_PRESENT 0 /!< MPU present or not /
vcoubard	551:ab7a8de3ff10	97	#define __NVIC_PRIO_BITS 2 /!< Number of Bits used for Priority Levels /
vcoubard	551:ab7a8de3ff10	98	#define __Vendor_SysTickConfig 0 /!< Set to 1 if different SysTick Config is used /
vcoubard	551:ab7a8de3ff10	99	/** @} / / End of group Configuration_of_CMSIS */
vcoubard	551:ab7a8de3ff10	100
vcoubard	551:ab7a8de3ff10	101	#include "core_cm0.h" /!< Cortex-M0 processor and core peripherals /
vcoubard	551:ab7a8de3ff10	102	#include "system_nrf51.h" /!< nRF51 System /
vcoubard	551:ab7a8de3ff10	103
vcoubard	551:ab7a8de3ff10	104
vcoubard	551:ab7a8de3ff10	105	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	106	/* ================ Device Specific Peripheral Section ================ */
vcoubard	551:ab7a8de3ff10	107	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	108
vcoubard	551:ab7a8de3ff10	109
vcoubard	551:ab7a8de3ff10	110	/** @addtogroup Device_Peripheral_Registers
vcoubard	551:ab7a8de3ff10	111	* @{
vcoubard	551:ab7a8de3ff10	112	*/
vcoubard	551:ab7a8de3ff10	113
vcoubard	551:ab7a8de3ff10	114
vcoubard	551:ab7a8de3ff10	115	/* ------------------- Start of section using anonymous unions ------------------ */
vcoubard	551:ab7a8de3ff10	116	#if defined(__CC_ARM)
vcoubard	551:ab7a8de3ff10	117	#pragma push
vcoubard	551:ab7a8de3ff10	118	#pragma anon_unions
vcoubard	551:ab7a8de3ff10	119	#elif defined(__ICCARM__)
vcoubard	551:ab7a8de3ff10	120	#pragma language=extended
vcoubard	551:ab7a8de3ff10	121	#elif defined(__GNUC__)
vcoubard	551:ab7a8de3ff10	122	/* anonymous unions are enabled by default */
vcoubard	551:ab7a8de3ff10	123	#elif defined(__TMS470__)
vcoubard	551:ab7a8de3ff10	124	/* anonymous unions are enabled by default */
vcoubard	551:ab7a8de3ff10	125	#elif defined(__TASKING__)
vcoubard	551:ab7a8de3ff10	126	#pragma warning 586
vcoubard	551:ab7a8de3ff10	127	#else
vcoubard	551:ab7a8de3ff10	128	#warning Not supported compiler type
vcoubard	551:ab7a8de3ff10	129	#endif
vcoubard	551:ab7a8de3ff10	130
vcoubard	551:ab7a8de3ff10	131
vcoubard	551:ab7a8de3ff10	132	typedef struct {
vcoubard	551:ab7a8de3ff10	133	__IO uint32_t CPU0; /!< Configurable priority configuration register for CPU0. /
vcoubard	551:ab7a8de3ff10	134	__IO uint32_t SPIS1; /!< Configurable priority configuration register for SPIS1. /
vcoubard	551:ab7a8de3ff10	135	__IO uint32_t RADIO; /!< Configurable priority configuration register for RADIO. /
vcoubard	551:ab7a8de3ff10	136	__IO uint32_t ECB; /!< Configurable priority configuration register for ECB. /
vcoubard	551:ab7a8de3ff10	137	__IO uint32_t CCM; /!< Configurable priority configuration register for CCM. /
vcoubard	551:ab7a8de3ff10	138	__IO uint32_t AAR; /!< Configurable priority configuration register for AAR. /
vcoubard	551:ab7a8de3ff10	139	} AMLI_RAMPRI_Type;
vcoubard	551:ab7a8de3ff10	140
vcoubard	551:ab7a8de3ff10	141	typedef struct {
vcoubard	551:ab7a8de3ff10	142	__IO uint32_t SCK; /!< Pin select for SCK. /
vcoubard	551:ab7a8de3ff10	143	__IO uint32_t MOSI; /!< Pin select for MOSI. /
vcoubard	551:ab7a8de3ff10	144	__IO uint32_t MISO; /!< Pin select for MISO. /
vcoubard	551:ab7a8de3ff10	145	} SPIM_PSEL_Type;
vcoubard	551:ab7a8de3ff10	146
vcoubard	551:ab7a8de3ff10	147	typedef struct {
vcoubard	551:ab7a8de3ff10	148	__IO uint32_t PTR; /!< Data pointer. /
vcoubard	551:ab7a8de3ff10	149	__IO uint32_t MAXCNT; /!< Maximum number of buffer bytes to receive. /
vcoubard	551:ab7a8de3ff10	150	__I uint32_t AMOUNT; /!< Number of bytes received in the last transaction. /
vcoubard	551:ab7a8de3ff10	151	} SPIM_RXD_Type;
vcoubard	551:ab7a8de3ff10	152
vcoubard	551:ab7a8de3ff10	153	typedef struct {
vcoubard	551:ab7a8de3ff10	154	__IO uint32_t PTR; /!< Data pointer. /
vcoubard	551:ab7a8de3ff10	155	__IO uint32_t MAXCNT; /!< Maximum number of buffer bytes to send. /
vcoubard	551:ab7a8de3ff10	156	__I uint32_t AMOUNT; /!< Number of bytes sent in the last transaction. /
vcoubard	551:ab7a8de3ff10	157	} SPIM_TXD_Type;
vcoubard	551:ab7a8de3ff10	158
vcoubard	551:ab7a8de3ff10	159	typedef struct {
vcoubard	551:ab7a8de3ff10	160	__O uint32_t EN; /!< Enable channel group. /
vcoubard	551:ab7a8de3ff10	161	__O uint32_t DIS; /!< Disable channel group. /
vcoubard	551:ab7a8de3ff10	162	} PPI_TASKS_CHG_Type;
vcoubard	551:ab7a8de3ff10	163
vcoubard	551:ab7a8de3ff10	164	typedef struct {
vcoubard	551:ab7a8de3ff10	165	__IO uint32_t EEP; /!< Channel event end-point. /
vcoubard	551:ab7a8de3ff10	166	__IO uint32_t TEP; /!< Channel task end-point. /
vcoubard	551:ab7a8de3ff10	167	} PPI_CH_Type;
vcoubard	551:ab7a8de3ff10	168
vcoubard	551:ab7a8de3ff10	169	typedef struct {
vcoubard	551:ab7a8de3ff10	170	__I uint32_t PART; /!< Part code /
vcoubard	551:ab7a8de3ff10	171	__I uint32_t VARIANT; /!< Part variant /
vcoubard	551:ab7a8de3ff10	172	__I uint32_t PACKAGE; /!< Package option /
vcoubard	551:ab7a8de3ff10	173	__I uint32_t RAM; /!< RAM variant /
vcoubard	551:ab7a8de3ff10	174	__I uint32_t FLASH; /!< Flash variant /
vcoubard	551:ab7a8de3ff10	175	__I uint32_t RESERVED[3]; /!< Reserved /
vcoubard	551:ab7a8de3ff10	176	} FICR_INFO_Type;
vcoubard	551:ab7a8de3ff10	177
vcoubard	551:ab7a8de3ff10	178
vcoubard	551:ab7a8de3ff10	179	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	180	/* ================ POWER ================ */
vcoubard	551:ab7a8de3ff10	181	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	182
vcoubard	551:ab7a8de3ff10	183
vcoubard	551:ab7a8de3ff10	184	/**
vcoubard	551:ab7a8de3ff10	185	* @brief Power Control. (POWER)
vcoubard	551:ab7a8de3ff10	186	*/
vcoubard	551:ab7a8de3ff10	187
vcoubard	551:ab7a8de3ff10	188	typedef struct { /!< POWER Structure /
vcoubard	551:ab7a8de3ff10	189	__I uint32_t RESERVED0[30];
vcoubard	551:ab7a8de3ff10	190	__O uint32_t TASKS_CONSTLAT; /!< Enable constant latency mode. /
vcoubard	551:ab7a8de3ff10	191	__O uint32_t TASKS_LOWPWR; /!< Enable low power mode (variable latency). /
vcoubard	551:ab7a8de3ff10	192	__I uint32_t RESERVED1[34];
vcoubard	551:ab7a8de3ff10	193	__IO uint32_t EVENTS_POFWARN; /!< Power failure warning. /
vcoubard	551:ab7a8de3ff10	194	__I uint32_t RESERVED2[126];
vcoubard	551:ab7a8de3ff10	195	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	196	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	197	__I uint32_t RESERVED3[61];
vcoubard	551:ab7a8de3ff10	198	__IO uint32_t RESETREAS; /!< Reset reason. /
vcoubard	551:ab7a8de3ff10	199	__I uint32_t RESERVED4[9];
vcoubard	551:ab7a8de3ff10	200	__I uint32_t RAMSTATUS; /!< Ram status register. /
vcoubard	551:ab7a8de3ff10	201	__I uint32_t RESERVED5[53];
vcoubard	551:ab7a8de3ff10	202	__O uint32_t SYSTEMOFF; /!< System off register. /
vcoubard	551:ab7a8de3ff10	203	__I uint32_t RESERVED6[3];
vcoubard	551:ab7a8de3ff10	204	__IO uint32_t POFCON; /!< Power failure configuration. /
vcoubard	551:ab7a8de3ff10	205	__I uint32_t RESERVED7[2];
vcoubard	551:ab7a8de3ff10	206	__IO uint32_t GPREGRET; /*!< General purpose retention register. This register is a retained
vcoubard	551:ab7a8de3ff10	207	register. */
vcoubard	551:ab7a8de3ff10	208	__I uint32_t RESERVED8;
vcoubard	551:ab7a8de3ff10	209	__IO uint32_t RAMON; /!< Ram on/off. /
vcoubard	551:ab7a8de3ff10	210	__I uint32_t RESERVED9[7];
vcoubard	551:ab7a8de3ff10	211	__IO uint32_t RESET; /*!< Pin reset functionality configuration register. This register
vcoubard	551:ab7a8de3ff10	212	is a retained register. */
vcoubard	551:ab7a8de3ff10	213	__I uint32_t RESERVED10[3];
vcoubard	551:ab7a8de3ff10	214	__IO uint32_t RAMONB; /!< Ram on/off. /
vcoubard	551:ab7a8de3ff10	215	__I uint32_t RESERVED11[8];
vcoubard	551:ab7a8de3ff10	216	__IO uint32_t DCDCEN; /!< DCDC converter enable configuration register. /
vcoubard	551:ab7a8de3ff10	217	__I uint32_t RESERVED12[291];
vcoubard	551:ab7a8de3ff10	218	__IO uint32_t DCDCFORCE; /!< DCDC power-up force register. /
vcoubard	551:ab7a8de3ff10	219	} NRF_POWER_Type;
vcoubard	551:ab7a8de3ff10	220
vcoubard	551:ab7a8de3ff10	221
vcoubard	551:ab7a8de3ff10	222	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	223	/* ================ CLOCK ================ */
vcoubard	551:ab7a8de3ff10	224	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	225
vcoubard	551:ab7a8de3ff10	226
vcoubard	551:ab7a8de3ff10	227	/**
vcoubard	551:ab7a8de3ff10	228	* @brief Clock control. (CLOCK)
vcoubard	551:ab7a8de3ff10	229	*/
vcoubard	551:ab7a8de3ff10	230
vcoubard	551:ab7a8de3ff10	231	typedef struct { /!< CLOCK Structure /
vcoubard	551:ab7a8de3ff10	232	__O uint32_t TASKS_HFCLKSTART; /!< Start HFCLK clock source. /
vcoubard	551:ab7a8de3ff10	233	__O uint32_t TASKS_HFCLKSTOP; /!< Stop HFCLK clock source. /
vcoubard	551:ab7a8de3ff10	234	__O uint32_t TASKS_LFCLKSTART; /!< Start LFCLK clock source. /
vcoubard	551:ab7a8de3ff10	235	__O uint32_t TASKS_LFCLKSTOP; /!< Stop LFCLK clock source. /
vcoubard	551:ab7a8de3ff10	236	__O uint32_t TASKS_CAL; /!< Start calibration of LFCLK RC oscillator. /
vcoubard	551:ab7a8de3ff10	237	__O uint32_t TASKS_CTSTART; /!< Start calibration timer. /
vcoubard	551:ab7a8de3ff10	238	__O uint32_t TASKS_CTSTOP; /!< Stop calibration timer. /
vcoubard	551:ab7a8de3ff10	239	__I uint32_t RESERVED0[57];
vcoubard	551:ab7a8de3ff10	240	__IO uint32_t EVENTS_HFCLKSTARTED; /!< HFCLK oscillator started. /
vcoubard	551:ab7a8de3ff10	241	__IO uint32_t EVENTS_LFCLKSTARTED; /!< LFCLK oscillator started. /
vcoubard	551:ab7a8de3ff10	242	__I uint32_t RESERVED1;
vcoubard	551:ab7a8de3ff10	243	__IO uint32_t EVENTS_DONE; /!< Calibration of LFCLK RC oscillator completed. /
vcoubard	551:ab7a8de3ff10	244	__IO uint32_t EVENTS_CTTO; /!< Calibration timer timeout. /
vcoubard	551:ab7a8de3ff10	245	__I uint32_t RESERVED2[124];
vcoubard	551:ab7a8de3ff10	246	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	247	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	248	__I uint32_t RESERVED3[63];
vcoubard	551:ab7a8de3ff10	249	__I uint32_t HFCLKRUN; /!< Task HFCLKSTART trigger status. /
vcoubard	551:ab7a8de3ff10	250	__I uint32_t HFCLKSTAT; /!< High frequency clock status. /
vcoubard	551:ab7a8de3ff10	251	__I uint32_t RESERVED4;
vcoubard	551:ab7a8de3ff10	252	__I uint32_t LFCLKRUN; /!< Task LFCLKSTART triggered status. /
vcoubard	551:ab7a8de3ff10	253	__I uint32_t LFCLKSTAT; /!< Low frequency clock status. /
vcoubard	551:ab7a8de3ff10	254	__I uint32_t LFCLKSRCCOPY; /*!< Clock source for the LFCLK clock, set when task LKCLKSTART is
vcoubard	551:ab7a8de3ff10	255	triggered. */
vcoubard	551:ab7a8de3ff10	256	__I uint32_t RESERVED5[62];
vcoubard	551:ab7a8de3ff10	257	__IO uint32_t LFCLKSRC; /!< Clock source for the LFCLK clock. /
vcoubard	551:ab7a8de3ff10	258	__I uint32_t RESERVED6[7];
vcoubard	551:ab7a8de3ff10	259	__IO uint32_t CTIV; /!< Calibration timer interval. /
vcoubard	551:ab7a8de3ff10	260	__I uint32_t RESERVED7[5];
vcoubard	551:ab7a8de3ff10	261	__IO uint32_t XTALFREQ; /!< Crystal frequency. /
vcoubard	551:ab7a8de3ff10	262	} NRF_CLOCK_Type;
vcoubard	551:ab7a8de3ff10	263
vcoubard	551:ab7a8de3ff10	264
vcoubard	551:ab7a8de3ff10	265	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	266	/* ================ MPU ================ */
vcoubard	551:ab7a8de3ff10	267	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	268
vcoubard	551:ab7a8de3ff10	269
vcoubard	551:ab7a8de3ff10	270	/**
vcoubard	551:ab7a8de3ff10	271	* @brief Memory Protection Unit. (MPU)
vcoubard	551:ab7a8de3ff10	272	*/
vcoubard	551:ab7a8de3ff10	273
vcoubard	551:ab7a8de3ff10	274	typedef struct { /!< MPU Structure /
vcoubard	551:ab7a8de3ff10	275	__I uint32_t RESERVED0[330];
vcoubard	551:ab7a8de3ff10	276	__IO uint32_t PERR0; /!< Configuration of peripherals in mpu regions. /
vcoubard	551:ab7a8de3ff10	277	__IO uint32_t RLENR0; /!< Length of RAM region 0. /
vcoubard	551:ab7a8de3ff10	278	__I uint32_t RESERVED1[52];
vcoubard	551:ab7a8de3ff10	279	__IO uint32_t PROTENSET0; /!< Erase and write protection bit enable set register. /
vcoubard	551:ab7a8de3ff10	280	__IO uint32_t PROTENSET1; /!< Erase and write protection bit enable set register. /
vcoubard	551:ab7a8de3ff10	281	__IO uint32_t DISABLEINDEBUG; /!< Disable erase and write protection mechanism in debug mode. /
vcoubard	551:ab7a8de3ff10	282	__IO uint32_t PROTBLOCKSIZE; /!< Erase and write protection block size. /
vcoubard	551:ab7a8de3ff10	283	} NRF_MPU_Type;
vcoubard	551:ab7a8de3ff10	284
vcoubard	551:ab7a8de3ff10	285
vcoubard	551:ab7a8de3ff10	286	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	287	/* ================ PU ================ */
vcoubard	551:ab7a8de3ff10	288	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	289
vcoubard	551:ab7a8de3ff10	290
vcoubard	551:ab7a8de3ff10	291	/**
vcoubard	551:ab7a8de3ff10	292	* @brief Patch unit. (PU)
vcoubard	551:ab7a8de3ff10	293	*/
vcoubard	551:ab7a8de3ff10	294
vcoubard	551:ab7a8de3ff10	295	typedef struct { /!< PU Structure /
vcoubard	551:ab7a8de3ff10	296	__I uint32_t RESERVED0[448];
vcoubard	551:ab7a8de3ff10	297	__IO uint32_t REPLACEADDR[8]; /!< Address of first instruction to replace. /
vcoubard	551:ab7a8de3ff10	298	__I uint32_t RESERVED1[24];
vcoubard	551:ab7a8de3ff10	299	__IO uint32_t PATCHADDR[8]; /!< Relative address of patch instructions. /
vcoubard	551:ab7a8de3ff10	300	__I uint32_t RESERVED2[24];
vcoubard	551:ab7a8de3ff10	301	__IO uint32_t PATCHEN; /!< Patch enable register. /
vcoubard	551:ab7a8de3ff10	302	__IO uint32_t PATCHENSET; /!< Patch enable register. /
vcoubard	551:ab7a8de3ff10	303	__IO uint32_t PATCHENCLR; /!< Patch disable register. /
vcoubard	551:ab7a8de3ff10	304	} NRF_PU_Type;
vcoubard	551:ab7a8de3ff10	305
vcoubard	551:ab7a8de3ff10	306
vcoubard	551:ab7a8de3ff10	307	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	308	/* ================ AMLI ================ */
vcoubard	551:ab7a8de3ff10	309	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	310
vcoubard	551:ab7a8de3ff10	311
vcoubard	551:ab7a8de3ff10	312	/**
vcoubard	551:ab7a8de3ff10	313	* @brief AHB Multi-Layer Interface. (AMLI)
vcoubard	551:ab7a8de3ff10	314	*/
vcoubard	551:ab7a8de3ff10	315
vcoubard	551:ab7a8de3ff10	316	typedef struct { /!< AMLI Structure /
vcoubard	551:ab7a8de3ff10	317	__I uint32_t RESERVED0[896];
vcoubard	551:ab7a8de3ff10	318	AMLI_RAMPRI_Type RAMPRI; /!< RAM configurable priority configuration structure. /
vcoubard	551:ab7a8de3ff10	319	} NRF_AMLI_Type;
vcoubard	551:ab7a8de3ff10	320
vcoubard	551:ab7a8de3ff10	321
vcoubard	551:ab7a8de3ff10	322	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	323	/* ================ RADIO ================ */
vcoubard	551:ab7a8de3ff10	324	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	325
vcoubard	551:ab7a8de3ff10	326
vcoubard	551:ab7a8de3ff10	327	/**
vcoubard	551:ab7a8de3ff10	328	* @brief The radio. (RADIO)
vcoubard	551:ab7a8de3ff10	329	*/
vcoubard	551:ab7a8de3ff10	330
vcoubard	551:ab7a8de3ff10	331	typedef struct { /!< RADIO Structure /
vcoubard	551:ab7a8de3ff10	332	__O uint32_t TASKS_TXEN; /!< Enable radio in TX mode. /
vcoubard	551:ab7a8de3ff10	333	__O uint32_t TASKS_RXEN; /!< Enable radio in RX mode. /
vcoubard	551:ab7a8de3ff10	334	__O uint32_t TASKS_START; /!< Start radio. /
vcoubard	551:ab7a8de3ff10	335	__O uint32_t TASKS_STOP; /!< Stop radio. /
vcoubard	551:ab7a8de3ff10	336	__O uint32_t TASKS_DISABLE; /!< Disable radio. /
vcoubard	551:ab7a8de3ff10	337	__O uint32_t TASKS_RSSISTART; /!< Start the RSSI and take one sample of the receive signal strength. /
vcoubard	551:ab7a8de3ff10	338	__O uint32_t TASKS_RSSISTOP; /!< Stop the RSSI measurement. /
vcoubard	551:ab7a8de3ff10	339	__O uint32_t TASKS_BCSTART; /!< Start the bit counter. /
vcoubard	551:ab7a8de3ff10	340	__O uint32_t TASKS_BCSTOP; /!< Stop the bit counter. /
vcoubard	551:ab7a8de3ff10	341	__I uint32_t RESERVED0[55];
vcoubard	551:ab7a8de3ff10	342	__IO uint32_t EVENTS_READY; /!< Ready event. /
vcoubard	551:ab7a8de3ff10	343	__IO uint32_t EVENTS_ADDRESS; /!< Address event. /
vcoubard	551:ab7a8de3ff10	344	__IO uint32_t EVENTS_PAYLOAD; /!< Payload event. /
vcoubard	551:ab7a8de3ff10	345	__IO uint32_t EVENTS_END; /!< End event. /
vcoubard	551:ab7a8de3ff10	346	__IO uint32_t EVENTS_DISABLED; /!< Disable event. /
vcoubard	551:ab7a8de3ff10	347	__IO uint32_t EVENTS_DEVMATCH; /!< A device address match occurred on the last received packet. /
vcoubard	551:ab7a8de3ff10	348	__IO uint32_t EVENTS_DEVMISS; /!< No device address match occurred on the last received packet. /
vcoubard	551:ab7a8de3ff10	349	__IO uint32_t EVENTS_RSSIEND; /*!< Sampling of the receive signal strength complete. A new RSSI
vcoubard	551:ab7a8de3ff10	350	sample is ready for readout at the RSSISAMPLE register. */
vcoubard	551:ab7a8de3ff10	351	__I uint32_t RESERVED1[2];
vcoubard	551:ab7a8de3ff10	352	__IO uint32_t EVENTS_BCMATCH; /!< Bit counter reached bit count value specified in BC register. /
vcoubard	551:ab7a8de3ff10	353	__I uint32_t RESERVED2[53];
vcoubard	551:ab7a8de3ff10	354	__IO uint32_t SHORTS; /!< Shortcuts for the radio. /
vcoubard	551:ab7a8de3ff10	355	__I uint32_t RESERVED3[64];
vcoubard	551:ab7a8de3ff10	356	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	357	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	358	__I uint32_t RESERVED4[61];
vcoubard	551:ab7a8de3ff10	359	__I uint32_t CRCSTATUS; /!< CRC status of received packet. /
vcoubard	551:ab7a8de3ff10	360	__I uint32_t CD; /!< Carrier detect. /
vcoubard	551:ab7a8de3ff10	361	__I uint32_t RXMATCH; /!< Received address. /
vcoubard	551:ab7a8de3ff10	362	__I uint32_t RXCRC; /!< Received CRC. /
vcoubard	551:ab7a8de3ff10	363	__I uint32_t DAI; /!< Device address match index. /
vcoubard	551:ab7a8de3ff10	364	__I uint32_t RESERVED5[60];
vcoubard	551:ab7a8de3ff10	365	__IO uint32_t PACKETPTR; /!< Packet pointer. Decision point: START task. /
vcoubard	551:ab7a8de3ff10	366	__IO uint32_t FREQUENCY; /!< Frequency. /
vcoubard	551:ab7a8de3ff10	367	__IO uint32_t TXPOWER; /!< Output power. /
vcoubard	551:ab7a8de3ff10	368	__IO uint32_t MODE; /!< Data rate and modulation. /
vcoubard	551:ab7a8de3ff10	369	__IO uint32_t PCNF0; /!< Packet configuration 0. /
vcoubard	551:ab7a8de3ff10	370	__IO uint32_t PCNF1; /!< Packet configuration 1. /
vcoubard	551:ab7a8de3ff10	371	__IO uint32_t BASE0; /!< Radio base address 0. Decision point: START task. /
vcoubard	551:ab7a8de3ff10	372	__IO uint32_t BASE1; /!< Radio base address 1. Decision point: START task. /
vcoubard	551:ab7a8de3ff10	373	__IO uint32_t PREFIX0; /!< Prefixes bytes for logical addresses 0 to 3. /
vcoubard	551:ab7a8de3ff10	374	__IO uint32_t PREFIX1; /!< Prefixes bytes for logical addresses 4 to 7. /
vcoubard	551:ab7a8de3ff10	375	__IO uint32_t TXADDRESS; /!< Transmit address select. /
vcoubard	551:ab7a8de3ff10	376	__IO uint32_t RXADDRESSES; /!< Receive address select. /
vcoubard	551:ab7a8de3ff10	377	__IO uint32_t CRCCNF; /!< CRC configuration. /
vcoubard	551:ab7a8de3ff10	378	__IO uint32_t CRCPOLY; /!< CRC polynomial. /
vcoubard	551:ab7a8de3ff10	379	__IO uint32_t CRCINIT; /!< CRC initial value. /
vcoubard	551:ab7a8de3ff10	380	__IO uint32_t TEST; /!< Test features enable register. /
vcoubard	551:ab7a8de3ff10	381	__IO uint32_t TIFS; /!< Inter Frame Spacing in microseconds. /
vcoubard	551:ab7a8de3ff10	382	__I uint32_t RSSISAMPLE; /!< RSSI sample. /
vcoubard	551:ab7a8de3ff10	383	__I uint32_t RESERVED6;
vcoubard	551:ab7a8de3ff10	384	__I uint32_t STATE; /!< Current radio state. /
vcoubard	551:ab7a8de3ff10	385	__IO uint32_t DATAWHITEIV; /!< Data whitening initial value. /
vcoubard	551:ab7a8de3ff10	386	__I uint32_t RESERVED7[2];
vcoubard	551:ab7a8de3ff10	387	__IO uint32_t BCC; /!< Bit counter compare. /
vcoubard	551:ab7a8de3ff10	388	__I uint32_t RESERVED8[39];
vcoubard	551:ab7a8de3ff10	389	__IO uint32_t DAB[8]; /!< Device address base segment. /
vcoubard	551:ab7a8de3ff10	390	__IO uint32_t DAP[8]; /!< Device address prefix. /
vcoubard	551:ab7a8de3ff10	391	__IO uint32_t DACNF; /!< Device address match configuration. /
vcoubard	551:ab7a8de3ff10	392	__I uint32_t RESERVED9[56];
vcoubard	551:ab7a8de3ff10	393	__IO uint32_t OVERRIDE0; /!< Trim value override register 0. /
vcoubard	551:ab7a8de3ff10	394	__IO uint32_t OVERRIDE1; /!< Trim value override register 1. /
vcoubard	551:ab7a8de3ff10	395	__IO uint32_t OVERRIDE2; /!< Trim value override register 2. /
vcoubard	551:ab7a8de3ff10	396	__IO uint32_t OVERRIDE3; /!< Trim value override register 3. /
vcoubard	551:ab7a8de3ff10	397	__IO uint32_t OVERRIDE4; /!< Trim value override register 4. /
vcoubard	551:ab7a8de3ff10	398	__I uint32_t RESERVED10[561];
vcoubard	551:ab7a8de3ff10	399	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	400	} NRF_RADIO_Type;
vcoubard	551:ab7a8de3ff10	401
vcoubard	551:ab7a8de3ff10	402
vcoubard	551:ab7a8de3ff10	403	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	404	/* ================ UART ================ */
vcoubard	551:ab7a8de3ff10	405	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	406
vcoubard	551:ab7a8de3ff10	407
vcoubard	551:ab7a8de3ff10	408	/**
vcoubard	551:ab7a8de3ff10	409	* @brief Universal Asynchronous Receiver/Transmitter. (UART)
vcoubard	551:ab7a8de3ff10	410	*/
vcoubard	551:ab7a8de3ff10	411
vcoubard	551:ab7a8de3ff10	412	typedef struct { /!< UART Structure /
vcoubard	551:ab7a8de3ff10	413	__O uint32_t TASKS_STARTRX; /!< Start UART receiver. /
vcoubard	551:ab7a8de3ff10	414	__O uint32_t TASKS_STOPRX; /!< Stop UART receiver. /
vcoubard	551:ab7a8de3ff10	415	__O uint32_t TASKS_STARTTX; /!< Start UART transmitter. /
vcoubard	551:ab7a8de3ff10	416	__O uint32_t TASKS_STOPTX; /!< Stop UART transmitter. /
vcoubard	551:ab7a8de3ff10	417	__I uint32_t RESERVED0[3];
vcoubard	551:ab7a8de3ff10	418	__O uint32_t TASKS_SUSPEND; /!< Suspend UART. /
vcoubard	551:ab7a8de3ff10	419	__I uint32_t RESERVED1[56];
vcoubard	551:ab7a8de3ff10	420	__IO uint32_t EVENTS_CTS; /!< CTS activated. /
vcoubard	551:ab7a8de3ff10	421	__IO uint32_t EVENTS_NCTS; /!< CTS deactivated. /
vcoubard	551:ab7a8de3ff10	422	__IO uint32_t EVENTS_RXDRDY; /!< Data received in RXD. /
vcoubard	551:ab7a8de3ff10	423	__I uint32_t RESERVED2[4];
vcoubard	551:ab7a8de3ff10	424	__IO uint32_t EVENTS_TXDRDY; /!< Data sent from TXD. /
vcoubard	551:ab7a8de3ff10	425	__I uint32_t RESERVED3;
vcoubard	551:ab7a8de3ff10	426	__IO uint32_t EVENTS_ERROR; /!< Error detected. /
vcoubard	551:ab7a8de3ff10	427	__I uint32_t RESERVED4[7];
vcoubard	551:ab7a8de3ff10	428	__IO uint32_t EVENTS_RXTO; /!< Receiver timeout. /
vcoubard	551:ab7a8de3ff10	429	__I uint32_t RESERVED5[46];
vcoubard	551:ab7a8de3ff10	430	__IO uint32_t SHORTS; /!< Shortcuts for UART. /
vcoubard	551:ab7a8de3ff10	431	__I uint32_t RESERVED6[64];
vcoubard	551:ab7a8de3ff10	432	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	433	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	434	__I uint32_t RESERVED7[93];
vcoubard	551:ab7a8de3ff10	435	__IO uint32_t ERRORSRC; /!< Error source. Write error field to 1 to clear error. /
vcoubard	551:ab7a8de3ff10	436	__I uint32_t RESERVED8[31];
vcoubard	551:ab7a8de3ff10	437	__IO uint32_t ENABLE; /!< Enable UART and acquire IOs. /
vcoubard	551:ab7a8de3ff10	438	__I uint32_t RESERVED9;
vcoubard	551:ab7a8de3ff10	439	__IO uint32_t PSELRTS; /!< Pin select for RTS. /
vcoubard	551:ab7a8de3ff10	440	__IO uint32_t PSELTXD; /!< Pin select for TXD. /
vcoubard	551:ab7a8de3ff10	441	__IO uint32_t PSELCTS; /!< Pin select for CTS. /
vcoubard	551:ab7a8de3ff10	442	__IO uint32_t PSELRXD; /!< Pin select for RXD. /
vcoubard	551:ab7a8de3ff10	443	__I uint32_t RXD; /*!< RXD register. On read action the buffer pointer is displaced.
vcoubard	551:ab7a8de3ff10	444	Once read the character is consumed. If read when no character
vcoubard	551:ab7a8de3ff10	445	available, the UART will stop working. */
vcoubard	551:ab7a8de3ff10	446	__O uint32_t TXD; /!< TXD register. /
vcoubard	551:ab7a8de3ff10	447	__I uint32_t RESERVED10;
vcoubard	551:ab7a8de3ff10	448	__IO uint32_t BAUDRATE; /!< UART Baudrate. /
vcoubard	551:ab7a8de3ff10	449	__I uint32_t RESERVED11[17];
vcoubard	551:ab7a8de3ff10	450	__IO uint32_t CONFIG; /!< Configuration of parity and hardware flow control register. /
vcoubard	551:ab7a8de3ff10	451	__I uint32_t RESERVED12[675];
vcoubard	551:ab7a8de3ff10	452	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	453	} NRF_UART_Type;
vcoubard	551:ab7a8de3ff10	454
vcoubard	551:ab7a8de3ff10	455
vcoubard	551:ab7a8de3ff10	456	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	457	/* ================ SPI ================ */
vcoubard	551:ab7a8de3ff10	458	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	459
vcoubard	551:ab7a8de3ff10	460
vcoubard	551:ab7a8de3ff10	461	/**
vcoubard	551:ab7a8de3ff10	462	* @brief SPI master 0. (SPI)
vcoubard	551:ab7a8de3ff10	463	*/
vcoubard	551:ab7a8de3ff10	464
vcoubard	551:ab7a8de3ff10	465	typedef struct { /!< SPI Structure /
vcoubard	551:ab7a8de3ff10	466	__I uint32_t RESERVED0[66];
vcoubard	551:ab7a8de3ff10	467	__IO uint32_t EVENTS_READY; /!< TXD byte sent and RXD byte received. /
vcoubard	551:ab7a8de3ff10	468	__I uint32_t RESERVED1[126];
vcoubard	551:ab7a8de3ff10	469	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	470	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	471	__I uint32_t RESERVED2[125];
vcoubard	551:ab7a8de3ff10	472	__IO uint32_t ENABLE; /!< Enable SPI. /
vcoubard	551:ab7a8de3ff10	473	__I uint32_t RESERVED3;
vcoubard	551:ab7a8de3ff10	474	__IO uint32_t PSELSCK; /!< Pin select for SCK. /
vcoubard	551:ab7a8de3ff10	475	__IO uint32_t PSELMOSI; /!< Pin select for MOSI. /
vcoubard	551:ab7a8de3ff10	476	__IO uint32_t PSELMISO; /!< Pin select for MISO. /
vcoubard	551:ab7a8de3ff10	477	__I uint32_t RESERVED4;
vcoubard	551:ab7a8de3ff10	478	__I uint32_t RXD; /!< RX data. /
vcoubard	551:ab7a8de3ff10	479	__IO uint32_t TXD; /!< TX data. /
vcoubard	551:ab7a8de3ff10	480	__I uint32_t RESERVED5;
vcoubard	551:ab7a8de3ff10	481	__IO uint32_t FREQUENCY; /!< SPI frequency /
vcoubard	551:ab7a8de3ff10	482	__I uint32_t RESERVED6[11];
vcoubard	551:ab7a8de3ff10	483	__IO uint32_t CONFIG; /!< Configuration register. /
vcoubard	551:ab7a8de3ff10	484	__I uint32_t RESERVED7[681];
vcoubard	551:ab7a8de3ff10	485	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	486	} NRF_SPI_Type;
vcoubard	551:ab7a8de3ff10	487
vcoubard	551:ab7a8de3ff10	488
vcoubard	551:ab7a8de3ff10	489	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	490	/* ================ TWI ================ */
vcoubard	551:ab7a8de3ff10	491	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	492
vcoubard	551:ab7a8de3ff10	493
vcoubard	551:ab7a8de3ff10	494	/**
vcoubard	551:ab7a8de3ff10	495	* @brief Two-wire interface master 0. (TWI)
vcoubard	551:ab7a8de3ff10	496	*/
vcoubard	551:ab7a8de3ff10	497
vcoubard	551:ab7a8de3ff10	498	typedef struct { /!< TWI Structure /
vcoubard	551:ab7a8de3ff10	499	__O uint32_t TASKS_STARTRX; /!< Start 2-Wire master receive sequence. /
vcoubard	551:ab7a8de3ff10	500	__I uint32_t RESERVED0;
vcoubard	551:ab7a8de3ff10	501	__O uint32_t TASKS_STARTTX; /!< Start 2-Wire master transmit sequence. /
vcoubard	551:ab7a8de3ff10	502	__I uint32_t RESERVED1[2];
vcoubard	551:ab7a8de3ff10	503	__O uint32_t TASKS_STOP; /!< Stop 2-Wire transaction. /
vcoubard	551:ab7a8de3ff10	504	__I uint32_t RESERVED2;
vcoubard	551:ab7a8de3ff10	505	__O uint32_t TASKS_SUSPEND; /!< Suspend 2-Wire transaction. /
vcoubard	551:ab7a8de3ff10	506	__O uint32_t TASKS_RESUME; /!< Resume 2-Wire transaction. /
vcoubard	551:ab7a8de3ff10	507	__I uint32_t RESERVED3[56];
vcoubard	551:ab7a8de3ff10	508	__IO uint32_t EVENTS_STOPPED; /!< Two-wire stopped. /
vcoubard	551:ab7a8de3ff10	509	__IO uint32_t EVENTS_RXDREADY; /!< Two-wire ready to deliver new RXD byte received. /
vcoubard	551:ab7a8de3ff10	510	__I uint32_t RESERVED4[4];
vcoubard	551:ab7a8de3ff10	511	__IO uint32_t EVENTS_TXDSENT; /!< Two-wire finished sending last TXD byte. /
vcoubard	551:ab7a8de3ff10	512	__I uint32_t RESERVED5;
vcoubard	551:ab7a8de3ff10	513	__IO uint32_t EVENTS_ERROR; /!< Two-wire error detected. /
vcoubard	551:ab7a8de3ff10	514	__I uint32_t RESERVED6[4];
vcoubard	551:ab7a8de3ff10	515	__IO uint32_t EVENTS_BB; /!< Two-wire byte boundary. /
vcoubard	551:ab7a8de3ff10	516	__I uint32_t RESERVED7[3];
vcoubard	551:ab7a8de3ff10	517	__IO uint32_t EVENTS_SUSPENDED; /!< Two-wire suspended. /
vcoubard	551:ab7a8de3ff10	518	__I uint32_t RESERVED8[45];
vcoubard	551:ab7a8de3ff10	519	__IO uint32_t SHORTS; /!< Shortcuts for TWI. /
vcoubard	551:ab7a8de3ff10	520	__I uint32_t RESERVED9[64];
vcoubard	551:ab7a8de3ff10	521	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	522	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	523	__I uint32_t RESERVED10[110];
vcoubard	551:ab7a8de3ff10	524	__IO uint32_t ERRORSRC; /!< Two-wire error source. Write error field to 1 to clear error. /
vcoubard	551:ab7a8de3ff10	525	__I uint32_t RESERVED11[14];
vcoubard	551:ab7a8de3ff10	526	__IO uint32_t ENABLE; /!< Enable two-wire master. /
vcoubard	551:ab7a8de3ff10	527	__I uint32_t RESERVED12;
vcoubard	551:ab7a8de3ff10	528	__IO uint32_t PSELSCL; /!< Pin select for SCL. /
vcoubard	551:ab7a8de3ff10	529	__IO uint32_t PSELSDA; /!< Pin select for SDA. /
vcoubard	551:ab7a8de3ff10	530	__I uint32_t RESERVED13[2];
vcoubard	551:ab7a8de3ff10	531	__I uint32_t RXD; /!< RX data register. /
vcoubard	551:ab7a8de3ff10	532	__IO uint32_t TXD; /!< TX data register. /
vcoubard	551:ab7a8de3ff10	533	__I uint32_t RESERVED14;
vcoubard	551:ab7a8de3ff10	534	__IO uint32_t FREQUENCY; /!< Two-wire frequency. /
vcoubard	551:ab7a8de3ff10	535	__I uint32_t RESERVED15[24];
vcoubard	551:ab7a8de3ff10	536	__IO uint32_t ADDRESS; /!< Address used in the two-wire transfer. /
vcoubard	551:ab7a8de3ff10	537	__I uint32_t RESERVED16[668];
vcoubard	551:ab7a8de3ff10	538	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	539	} NRF_TWI_Type;
vcoubard	551:ab7a8de3ff10	540
vcoubard	551:ab7a8de3ff10	541
vcoubard	551:ab7a8de3ff10	542	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	543	/* ================ SPIS ================ */
vcoubard	551:ab7a8de3ff10	544	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	545
vcoubard	551:ab7a8de3ff10	546
vcoubard	551:ab7a8de3ff10	547	/**
vcoubard	551:ab7a8de3ff10	548	* @brief SPI slave 1. (SPIS)
vcoubard	551:ab7a8de3ff10	549	*/
vcoubard	551:ab7a8de3ff10	550
vcoubard	551:ab7a8de3ff10	551	typedef struct { /!< SPIS Structure /
vcoubard	551:ab7a8de3ff10	552	__I uint32_t RESERVED0[9];
vcoubard	551:ab7a8de3ff10	553	__O uint32_t TASKS_ACQUIRE; /!< Acquire SPI semaphore. /
vcoubard	551:ab7a8de3ff10	554	__O uint32_t TASKS_RELEASE; /!< Release SPI semaphore. /
vcoubard	551:ab7a8de3ff10	555	__I uint32_t RESERVED1[54];
vcoubard	551:ab7a8de3ff10	556	__IO uint32_t EVENTS_END; /!< Granted transaction completed. /
vcoubard	551:ab7a8de3ff10	557	__I uint32_t RESERVED2[8];
vcoubard	551:ab7a8de3ff10	558	__IO uint32_t EVENTS_ACQUIRED; /!< Semaphore acquired. /
vcoubard	551:ab7a8de3ff10	559	__I uint32_t RESERVED3[53];
vcoubard	551:ab7a8de3ff10	560	__IO uint32_t SHORTS; /!< Shortcuts for SPIS. /
vcoubard	551:ab7a8de3ff10	561	__I uint32_t RESERVED4[64];
vcoubard	551:ab7a8de3ff10	562	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	563	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	564	__I uint32_t RESERVED5[61];
vcoubard	551:ab7a8de3ff10	565	__I uint32_t SEMSTAT; /!< Semaphore status. /
vcoubard	551:ab7a8de3ff10	566	__I uint32_t RESERVED6[15];
vcoubard	551:ab7a8de3ff10	567	__IO uint32_t STATUS; /!< Status from last transaction. /
vcoubard	551:ab7a8de3ff10	568	__I uint32_t RESERVED7[47];
vcoubard	551:ab7a8de3ff10	569	__IO uint32_t ENABLE; /!< Enable SPIS. /
vcoubard	551:ab7a8de3ff10	570	__I uint32_t RESERVED8;
vcoubard	551:ab7a8de3ff10	571	__IO uint32_t PSELSCK; /!< Pin select for SCK. /
vcoubard	551:ab7a8de3ff10	572	__IO uint32_t PSELMISO; /!< Pin select for MISO. /
vcoubard	551:ab7a8de3ff10	573	__IO uint32_t PSELMOSI; /!< Pin select for MOSI. /
vcoubard	551:ab7a8de3ff10	574	__IO uint32_t PSELCSN; /!< Pin select for CSN. /
vcoubard	551:ab7a8de3ff10	575	__I uint32_t RESERVED9[7];
vcoubard	551:ab7a8de3ff10	576	__IO uint32_t RXDPTR; /!< RX data pointer. /
vcoubard	551:ab7a8de3ff10	577	__IO uint32_t MAXRX; /!< Maximum number of bytes in the receive buffer. /
vcoubard	551:ab7a8de3ff10	578	__I uint32_t AMOUNTRX; /!< Number of bytes received in last granted transaction. /
vcoubard	551:ab7a8de3ff10	579	__I uint32_t RESERVED10;
vcoubard	551:ab7a8de3ff10	580	__IO uint32_t TXDPTR; /!< TX data pointer. /
vcoubard	551:ab7a8de3ff10	581	__IO uint32_t MAXTX; /!< Maximum number of bytes in the transmit buffer. /
vcoubard	551:ab7a8de3ff10	582	__I uint32_t AMOUNTTX; /!< Number of bytes transmitted in last granted transaction. /
vcoubard	551:ab7a8de3ff10	583	__I uint32_t RESERVED11;
vcoubard	551:ab7a8de3ff10	584	__IO uint32_t CONFIG; /!< Configuration register. /
vcoubard	551:ab7a8de3ff10	585	__I uint32_t RESERVED12;
vcoubard	551:ab7a8de3ff10	586	__IO uint32_t DEF; /!< Default character. /
vcoubard	551:ab7a8de3ff10	587	__I uint32_t RESERVED13[24];
vcoubard	551:ab7a8de3ff10	588	__IO uint32_t ORC; /!< Over-read character. /
vcoubard	551:ab7a8de3ff10	589	__I uint32_t RESERVED14[654];
vcoubard	551:ab7a8de3ff10	590	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	591	} NRF_SPIS_Type;
vcoubard	551:ab7a8de3ff10	592
vcoubard	551:ab7a8de3ff10	593
vcoubard	551:ab7a8de3ff10	594	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	595	/* ================ SPIM ================ */
vcoubard	551:ab7a8de3ff10	596	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	597
vcoubard	551:ab7a8de3ff10	598
vcoubard	551:ab7a8de3ff10	599	/**
vcoubard	551:ab7a8de3ff10	600	* @brief SPI master with easyDMA 1. (SPIM)
vcoubard	551:ab7a8de3ff10	601	*/
vcoubard	551:ab7a8de3ff10	602
vcoubard	551:ab7a8de3ff10	603	typedef struct { /!< SPIM Structure /
vcoubard	551:ab7a8de3ff10	604	__I uint32_t RESERVED0[4];
vcoubard	551:ab7a8de3ff10	605	__O uint32_t TASKS_START; /!< Start SPI transaction. /
vcoubard	551:ab7a8de3ff10	606	__O uint32_t TASKS_STOP; /!< Stop SPI transaction. /
vcoubard	551:ab7a8de3ff10	607	__I uint32_t RESERVED1;
vcoubard	551:ab7a8de3ff10	608	__O uint32_t TASKS_SUSPEND; /!< Suspend SPI transaction. /
vcoubard	551:ab7a8de3ff10	609	__O uint32_t TASKS_RESUME; /!< Resume SPI transaction. /
vcoubard	551:ab7a8de3ff10	610	__I uint32_t RESERVED2[56];
vcoubard	551:ab7a8de3ff10	611	__IO uint32_t EVENTS_STOPPED; /!< SPI transaction has stopped. /
vcoubard	551:ab7a8de3ff10	612	__I uint32_t RESERVED3[2];
vcoubard	551:ab7a8de3ff10	613	__IO uint32_t EVENTS_ENDRX; /!< End of RXD buffer reached. /
vcoubard	551:ab7a8de3ff10	614	__I uint32_t RESERVED4;
vcoubard	551:ab7a8de3ff10	615	__IO uint32_t EVENTS_END; /!< End of RXD buffer and TXD buffer reached. /
vcoubard	551:ab7a8de3ff10	616	__I uint32_t RESERVED5;
vcoubard	551:ab7a8de3ff10	617	__IO uint32_t EVENTS_ENDTX; /!< End of TXD buffer reached. /
vcoubard	551:ab7a8de3ff10	618	__I uint32_t RESERVED6[10];
vcoubard	551:ab7a8de3ff10	619	__IO uint32_t EVENTS_STARTED; /!< Transaction started. /
vcoubard	551:ab7a8de3ff10	620	__I uint32_t RESERVED7[44];
vcoubard	551:ab7a8de3ff10	621	__IO uint32_t SHORTS; /!< Shortcuts for SPIM. /
vcoubard	551:ab7a8de3ff10	622	__I uint32_t RESERVED8[64];
vcoubard	551:ab7a8de3ff10	623	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	624	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	625	__I uint32_t RESERVED9[125];
vcoubard	551:ab7a8de3ff10	626	__IO uint32_t ENABLE; /!< Enable SPIM. /
vcoubard	551:ab7a8de3ff10	627	__I uint32_t RESERVED10;
vcoubard	551:ab7a8de3ff10	628	SPIM_PSEL_Type PSEL; /!< Pin select configuration. /
vcoubard	551:ab7a8de3ff10	629	__I uint32_t RESERVED11;
vcoubard	551:ab7a8de3ff10	630	__I uint32_t RXDDATA; /!< RXD register. /
vcoubard	551:ab7a8de3ff10	631	__IO uint32_t TXDDATA; /!< TXD register. /
vcoubard	551:ab7a8de3ff10	632	__I uint32_t RESERVED12;
vcoubard	551:ab7a8de3ff10	633	__IO uint32_t FREQUENCY; /!< SPI frequency. /
vcoubard	551:ab7a8de3ff10	634	__I uint32_t RESERVED13[3];
vcoubard	551:ab7a8de3ff10	635	SPIM_RXD_Type RXD; /!< RXD EasyDMA configuration and status. /
vcoubard	551:ab7a8de3ff10	636	__I uint32_t RESERVED14;
vcoubard	551:ab7a8de3ff10	637	SPIM_TXD_Type TXD; /!< TXD EasyDMA configuration and status. /
vcoubard	551:ab7a8de3ff10	638	__I uint32_t RESERVED15;
vcoubard	551:ab7a8de3ff10	639	__IO uint32_t CONFIG; /!< Configuration register. /
vcoubard	551:ab7a8de3ff10	640	__I uint32_t RESERVED16[26];
vcoubard	551:ab7a8de3ff10	641	__IO uint32_t ORC; /!< Over-read character. /
vcoubard	551:ab7a8de3ff10	642	__I uint32_t RESERVED17[654];
vcoubard	551:ab7a8de3ff10	643	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	644	} NRF_SPIM_Type;
vcoubard	551:ab7a8de3ff10	645
vcoubard	551:ab7a8de3ff10	646
vcoubard	551:ab7a8de3ff10	647	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	648	/* ================ GPIOTE ================ */
vcoubard	551:ab7a8de3ff10	649	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	650
vcoubard	551:ab7a8de3ff10	651
vcoubard	551:ab7a8de3ff10	652	/**
vcoubard	551:ab7a8de3ff10	653	* @brief GPIO tasks and events. (GPIOTE)
vcoubard	551:ab7a8de3ff10	654	*/
vcoubard	551:ab7a8de3ff10	655
vcoubard	551:ab7a8de3ff10	656	typedef struct { /!< GPIOTE Structure /
vcoubard	551:ab7a8de3ff10	657	__O uint32_t TASKS_OUT[4]; /!< Tasks asssociated with GPIOTE channels. /
vcoubard	551:ab7a8de3ff10	658	__I uint32_t RESERVED0[60];
vcoubard	551:ab7a8de3ff10	659	__IO uint32_t EVENTS_IN[4]; /!< Tasks asssociated with GPIOTE channels. /
vcoubard	551:ab7a8de3ff10	660	__I uint32_t RESERVED1[27];
vcoubard	551:ab7a8de3ff10	661	__IO uint32_t EVENTS_PORT; /!< Event generated from multiple pins. /
vcoubard	551:ab7a8de3ff10	662	__I uint32_t RESERVED2[97];
vcoubard	551:ab7a8de3ff10	663	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	664	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	665	__I uint32_t RESERVED3[129];
vcoubard	551:ab7a8de3ff10	666	__IO uint32_t CONFIG[4]; /!< Channel configuration registers. /
vcoubard	551:ab7a8de3ff10	667	__I uint32_t RESERVED4[695];
vcoubard	551:ab7a8de3ff10	668	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	669	} NRF_GPIOTE_Type;
vcoubard	551:ab7a8de3ff10	670
vcoubard	551:ab7a8de3ff10	671
vcoubard	551:ab7a8de3ff10	672	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	673	/* ================ ADC ================ */
vcoubard	551:ab7a8de3ff10	674	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	675
vcoubard	551:ab7a8de3ff10	676
vcoubard	551:ab7a8de3ff10	677	/**
vcoubard	551:ab7a8de3ff10	678	* @brief Analog to digital converter. (ADC)
vcoubard	551:ab7a8de3ff10	679	*/
vcoubard	551:ab7a8de3ff10	680
vcoubard	551:ab7a8de3ff10	681	typedef struct { /!< ADC Structure /
vcoubard	551:ab7a8de3ff10	682	__O uint32_t TASKS_START; /!< Start an ADC conversion. /
vcoubard	551:ab7a8de3ff10	683	__O uint32_t TASKS_STOP; /!< Stop ADC. /
vcoubard	551:ab7a8de3ff10	684	__I uint32_t RESERVED0[62];
vcoubard	551:ab7a8de3ff10	685	__IO uint32_t EVENTS_END; /!< ADC conversion complete. /
vcoubard	551:ab7a8de3ff10	686	__I uint32_t RESERVED1[128];
vcoubard	551:ab7a8de3ff10	687	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	688	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	689	__I uint32_t RESERVED2[61];
vcoubard	551:ab7a8de3ff10	690	__I uint32_t BUSY; /!< ADC busy register. /
vcoubard	551:ab7a8de3ff10	691	__I uint32_t RESERVED3[63];
vcoubard	551:ab7a8de3ff10	692	__IO uint32_t ENABLE; /!< ADC enable. /
vcoubard	551:ab7a8de3ff10	693	__IO uint32_t CONFIG; /!< ADC configuration register. /
vcoubard	551:ab7a8de3ff10	694	__I uint32_t RESULT; /!< Result of ADC conversion. /
vcoubard	551:ab7a8de3ff10	695	__I uint32_t RESERVED4[700];
vcoubard	551:ab7a8de3ff10	696	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	697	} NRF_ADC_Type;
vcoubard	551:ab7a8de3ff10	698
vcoubard	551:ab7a8de3ff10	699
vcoubard	551:ab7a8de3ff10	700	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	701	/* ================ TIMER ================ */
vcoubard	551:ab7a8de3ff10	702	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	703
vcoubard	551:ab7a8de3ff10	704
vcoubard	551:ab7a8de3ff10	705	/**
vcoubard	551:ab7a8de3ff10	706	* @brief Timer 0. (TIMER)
vcoubard	551:ab7a8de3ff10	707	*/
vcoubard	551:ab7a8de3ff10	708
vcoubard	551:ab7a8de3ff10	709	typedef struct { /!< TIMER Structure /
vcoubard	551:ab7a8de3ff10	710	__O uint32_t TASKS_START; /!< Start Timer. /
vcoubard	551:ab7a8de3ff10	711	__O uint32_t TASKS_STOP; /!< Stop Timer. /
vcoubard	551:ab7a8de3ff10	712	__O uint32_t TASKS_COUNT; /!< Increment Timer (In counter mode). /
vcoubard	551:ab7a8de3ff10	713	__O uint32_t TASKS_CLEAR; /!< Clear timer. /
vcoubard	551:ab7a8de3ff10	714	__O uint32_t TASKS_SHUTDOWN; /!< Shutdown timer. /
vcoubard	551:ab7a8de3ff10	715	__I uint32_t RESERVED0[11];
vcoubard	551:ab7a8de3ff10	716	__O uint32_t TASKS_CAPTURE[4]; /!< Capture Timer value to CC[n] registers. /
vcoubard	551:ab7a8de3ff10	717	__I uint32_t RESERVED1[60];
vcoubard	551:ab7a8de3ff10	718	__IO uint32_t EVENTS_COMPARE[4]; /!< Compare event on CC[n] match. /
vcoubard	551:ab7a8de3ff10	719	__I uint32_t RESERVED2[44];
vcoubard	551:ab7a8de3ff10	720	__IO uint32_t SHORTS; /!< Shortcuts for Timer. /
vcoubard	551:ab7a8de3ff10	721	__I uint32_t RESERVED3[64];
vcoubard	551:ab7a8de3ff10	722	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	723	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	724	__I uint32_t RESERVED4[126];
vcoubard	551:ab7a8de3ff10	725	__IO uint32_t MODE; /!< Timer Mode selection. /
vcoubard	551:ab7a8de3ff10	726	__IO uint32_t BITMODE; /!< Sets timer behaviour. /
vcoubard	551:ab7a8de3ff10	727	__I uint32_t RESERVED5;
vcoubard	551:ab7a8de3ff10	728	__IO uint32_t PRESCALER; /*!< 4-bit prescaler to source clock frequency (max value 9). Source
vcoubard	551:ab7a8de3ff10	729	clock frequency is divided by 2^SCALE. */
vcoubard	551:ab7a8de3ff10	730	__I uint32_t RESERVED6[11];
vcoubard	551:ab7a8de3ff10	731	__IO uint32_t CC[4]; /!< Capture/compare registers. /
vcoubard	551:ab7a8de3ff10	732	__I uint32_t RESERVED7[683];
vcoubard	551:ab7a8de3ff10	733	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	734	} NRF_TIMER_Type;
vcoubard	551:ab7a8de3ff10	735
vcoubard	551:ab7a8de3ff10	736
vcoubard	551:ab7a8de3ff10	737	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	738	/* ================ RTC ================ */
vcoubard	551:ab7a8de3ff10	739	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	740
vcoubard	551:ab7a8de3ff10	741
vcoubard	551:ab7a8de3ff10	742	/**
vcoubard	551:ab7a8de3ff10	743	* @brief Real time counter 0. (RTC)
vcoubard	551:ab7a8de3ff10	744	*/
vcoubard	551:ab7a8de3ff10	745
vcoubard	551:ab7a8de3ff10	746	typedef struct { /!< RTC Structure /
vcoubard	551:ab7a8de3ff10	747	__O uint32_t TASKS_START; /!< Start RTC Counter. /
vcoubard	551:ab7a8de3ff10	748	__O uint32_t TASKS_STOP; /!< Stop RTC Counter. /
vcoubard	551:ab7a8de3ff10	749	__O uint32_t TASKS_CLEAR; /!< Clear RTC Counter. /
vcoubard	551:ab7a8de3ff10	750	__O uint32_t TASKS_TRIGOVRFLW; /!< Set COUNTER to 0xFFFFFFF0. /
vcoubard	551:ab7a8de3ff10	751	__I uint32_t RESERVED0[60];
vcoubard	551:ab7a8de3ff10	752	__IO uint32_t EVENTS_TICK; /!< Event on COUNTER increment. /
vcoubard	551:ab7a8de3ff10	753	__IO uint32_t EVENTS_OVRFLW; /!< Event on COUNTER overflow. /
vcoubard	551:ab7a8de3ff10	754	__I uint32_t RESERVED1[14];
vcoubard	551:ab7a8de3ff10	755	__IO uint32_t EVENTS_COMPARE[4]; /!< Compare event on CC[n] match. /
vcoubard	551:ab7a8de3ff10	756	__I uint32_t RESERVED2[109];
vcoubard	551:ab7a8de3ff10	757	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	758	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	759	__I uint32_t RESERVED3[13];
vcoubard	551:ab7a8de3ff10	760	__IO uint32_t EVTEN; /!< Configures event enable routing to PPI for each RTC event. /
vcoubard	551:ab7a8de3ff10	761	__IO uint32_t EVTENSET; /*!< Enable events routing to PPI. The reading of this register gives
vcoubard	551:ab7a8de3ff10	762	the value of EVTEN. */
vcoubard	551:ab7a8de3ff10	763	__IO uint32_t EVTENCLR; /*!< Disable events routing to PPI. The reading of this register
vcoubard	551:ab7a8de3ff10	764	gives the value of EVTEN. */
vcoubard	551:ab7a8de3ff10	765	__I uint32_t RESERVED4[110];
vcoubard	551:ab7a8de3ff10	766	__I uint32_t COUNTER; /!< Current COUNTER value. /
vcoubard	551:ab7a8de3ff10	767	__IO uint32_t PRESCALER; /*!< 12-bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).
vcoubard	551:ab7a8de3ff10	768	Must be written when RTC is STOPed. */
vcoubard	551:ab7a8de3ff10	769	__I uint32_t RESERVED5[13];
vcoubard	551:ab7a8de3ff10	770	__IO uint32_t CC[4]; /!< Capture/compare registers. /
vcoubard	551:ab7a8de3ff10	771	__I uint32_t RESERVED6[683];
vcoubard	551:ab7a8de3ff10	772	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	773	} NRF_RTC_Type;
vcoubard	551:ab7a8de3ff10	774
vcoubard	551:ab7a8de3ff10	775
vcoubard	551:ab7a8de3ff10	776	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	777	/* ================ TEMP ================ */
vcoubard	551:ab7a8de3ff10	778	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	779
vcoubard	551:ab7a8de3ff10	780
vcoubard	551:ab7a8de3ff10	781	/**
vcoubard	551:ab7a8de3ff10	782	* @brief Temperature Sensor. (TEMP)
vcoubard	551:ab7a8de3ff10	783	*/
vcoubard	551:ab7a8de3ff10	784
vcoubard	551:ab7a8de3ff10	785	typedef struct { /!< TEMP Structure /
vcoubard	551:ab7a8de3ff10	786	__O uint32_t TASKS_START; /!< Start temperature measurement. /
vcoubard	551:ab7a8de3ff10	787	__O uint32_t TASKS_STOP; /!< Stop temperature measurement. /
vcoubard	551:ab7a8de3ff10	788	__I uint32_t RESERVED0[62];
vcoubard	551:ab7a8de3ff10	789	__IO uint32_t EVENTS_DATARDY; /!< Temperature measurement complete, data ready event. /
vcoubard	551:ab7a8de3ff10	790	__I uint32_t RESERVED1[128];
vcoubard	551:ab7a8de3ff10	791	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	792	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	793	__I uint32_t RESERVED2[127];
vcoubard	551:ab7a8de3ff10	794	__I int32_t TEMP; /!< Die temperature in degC, 2's complement format, 0.25 degC pecision. /
vcoubard	551:ab7a8de3ff10	795	__I uint32_t RESERVED3[700];
vcoubard	551:ab7a8de3ff10	796	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	797	} NRF_TEMP_Type;
vcoubard	551:ab7a8de3ff10	798
vcoubard	551:ab7a8de3ff10	799
vcoubard	551:ab7a8de3ff10	800	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	801	/* ================ RNG ================ */
vcoubard	551:ab7a8de3ff10	802	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	803
vcoubard	551:ab7a8de3ff10	804
vcoubard	551:ab7a8de3ff10	805	/**
vcoubard	551:ab7a8de3ff10	806	* @brief Random Number Generator. (RNG)
vcoubard	551:ab7a8de3ff10	807	*/
vcoubard	551:ab7a8de3ff10	808
vcoubard	551:ab7a8de3ff10	809	typedef struct { /!< RNG Structure /
vcoubard	551:ab7a8de3ff10	810	__O uint32_t TASKS_START; /!< Start the random number generator. /
vcoubard	551:ab7a8de3ff10	811	__O uint32_t TASKS_STOP; /!< Stop the random number generator. /
vcoubard	551:ab7a8de3ff10	812	__I uint32_t RESERVED0[62];
vcoubard	551:ab7a8de3ff10	813	__IO uint32_t EVENTS_VALRDY; /!< New random number generated and written to VALUE register. /
vcoubard	551:ab7a8de3ff10	814	__I uint32_t RESERVED1[63];
vcoubard	551:ab7a8de3ff10	815	__IO uint32_t SHORTS; /!< Shortcuts for the RNG. /
vcoubard	551:ab7a8de3ff10	816	__I uint32_t RESERVED2[64];
vcoubard	551:ab7a8de3ff10	817	__IO uint32_t INTENSET; /!< Interrupt enable set register /
vcoubard	551:ab7a8de3ff10	818	__IO uint32_t INTENCLR; /!< Interrupt enable clear register /
vcoubard	551:ab7a8de3ff10	819	__I uint32_t RESERVED3[126];
vcoubard	551:ab7a8de3ff10	820	__IO uint32_t CONFIG; /!< Configuration register. /
vcoubard	551:ab7a8de3ff10	821	__I uint32_t VALUE; /!< RNG random number. /
vcoubard	551:ab7a8de3ff10	822	__I uint32_t RESERVED4[700];
vcoubard	551:ab7a8de3ff10	823	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	824	} NRF_RNG_Type;
vcoubard	551:ab7a8de3ff10	825
vcoubard	551:ab7a8de3ff10	826
vcoubard	551:ab7a8de3ff10	827	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	828	/* ================ ECB ================ */
vcoubard	551:ab7a8de3ff10	829	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	830
vcoubard	551:ab7a8de3ff10	831
vcoubard	551:ab7a8de3ff10	832	/**
vcoubard	551:ab7a8de3ff10	833	* @brief AES ECB Mode Encryption. (ECB)
vcoubard	551:ab7a8de3ff10	834	*/
vcoubard	551:ab7a8de3ff10	835
vcoubard	551:ab7a8de3ff10	836	typedef struct { /!< ECB Structure /
vcoubard	551:ab7a8de3ff10	837	__O uint32_t TASKS_STARTECB; /*!< Start ECB block encrypt. If a crypto operation is running, this
vcoubard	551:ab7a8de3ff10	838	will not initiate a new encryption and the ERRORECB event will
vcoubard	551:ab7a8de3ff10	839	be triggered. */
vcoubard	551:ab7a8de3ff10	840	__O uint32_t TASKS_STOPECB; /*!< Stop current ECB encryption. If a crypto operation is running,
vcoubard	551:ab7a8de3ff10	841	this will will trigger the ERRORECB event. */
vcoubard	551:ab7a8de3ff10	842	__I uint32_t RESERVED0[62];
vcoubard	551:ab7a8de3ff10	843	__IO uint32_t EVENTS_ENDECB; /!< ECB block encrypt complete. /
vcoubard	551:ab7a8de3ff10	844	__IO uint32_t EVENTS_ERRORECB; /*!< ECB block encrypt aborted due to a STOPECB task or due to an
vcoubard	551:ab7a8de3ff10	845	error. */
vcoubard	551:ab7a8de3ff10	846	__I uint32_t RESERVED1[127];
vcoubard	551:ab7a8de3ff10	847	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	848	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	849	__I uint32_t RESERVED2[126];
vcoubard	551:ab7a8de3ff10	850	__IO uint32_t ECBDATAPTR; /!< ECB block encrypt memory pointer. /
vcoubard	551:ab7a8de3ff10	851	__I uint32_t RESERVED3[701];
vcoubard	551:ab7a8de3ff10	852	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	853	} NRF_ECB_Type;
vcoubard	551:ab7a8de3ff10	854
vcoubard	551:ab7a8de3ff10	855
vcoubard	551:ab7a8de3ff10	856	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	857	/* ================ AAR ================ */
vcoubard	551:ab7a8de3ff10	858	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	859
vcoubard	551:ab7a8de3ff10	860
vcoubard	551:ab7a8de3ff10	861	/**
vcoubard	551:ab7a8de3ff10	862	* @brief Accelerated Address Resolver. (AAR)
vcoubard	551:ab7a8de3ff10	863	*/
vcoubard	551:ab7a8de3ff10	864
vcoubard	551:ab7a8de3ff10	865	typedef struct { /!< AAR Structure /
vcoubard	551:ab7a8de3ff10	866	__O uint32_t TASKS_START; /*!< Start resolving addresses based on IRKs specified in the IRK
vcoubard	551:ab7a8de3ff10	867	data structure. */
vcoubard	551:ab7a8de3ff10	868	__I uint32_t RESERVED0;
vcoubard	551:ab7a8de3ff10	869	__O uint32_t TASKS_STOP; /!< Stop resolving addresses. /
vcoubard	551:ab7a8de3ff10	870	__I uint32_t RESERVED1[61];
vcoubard	551:ab7a8de3ff10	871	__IO uint32_t EVENTS_END; /!< Address resolution procedure completed. /
vcoubard	551:ab7a8de3ff10	872	__IO uint32_t EVENTS_RESOLVED; /!< Address resolved. /
vcoubard	551:ab7a8de3ff10	873	__IO uint32_t EVENTS_NOTRESOLVED; /!< Address not resolved. /
vcoubard	551:ab7a8de3ff10	874	__I uint32_t RESERVED2[126];
vcoubard	551:ab7a8de3ff10	875	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	876	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	877	__I uint32_t RESERVED3[61];
vcoubard	551:ab7a8de3ff10	878	__I uint32_t STATUS; /!< Resolution status. /
vcoubard	551:ab7a8de3ff10	879	__I uint32_t RESERVED4[63];
vcoubard	551:ab7a8de3ff10	880	__IO uint32_t ENABLE; /!< Enable AAR. /
vcoubard	551:ab7a8de3ff10	881	__IO uint32_t NIRK; /!< Number of Identity root Keys in the IRK data structure. /
vcoubard	551:ab7a8de3ff10	882	__IO uint32_t IRKPTR; /!< Pointer to the IRK data structure. /
vcoubard	551:ab7a8de3ff10	883	__I uint32_t RESERVED5;
vcoubard	551:ab7a8de3ff10	884	__IO uint32_t ADDRPTR; /!< Pointer to the resolvable address (6 bytes). /
vcoubard	551:ab7a8de3ff10	885	__IO uint32_t SCRATCHPTR; /*!< Pointer to a "scratch" data area used for temporary storage
vcoubard	551:ab7a8de3ff10	886	during resolution. A minimum of 3 bytes must be reserved. */
vcoubard	551:ab7a8de3ff10	887	__I uint32_t RESERVED6[697];
vcoubard	551:ab7a8de3ff10	888	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	889	} NRF_AAR_Type;
vcoubard	551:ab7a8de3ff10	890
vcoubard	551:ab7a8de3ff10	891
vcoubard	551:ab7a8de3ff10	892	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	893	/* ================ CCM ================ */
vcoubard	551:ab7a8de3ff10	894	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	895
vcoubard	551:ab7a8de3ff10	896
vcoubard	551:ab7a8de3ff10	897	/**
vcoubard	551:ab7a8de3ff10	898	* @brief AES CCM Mode Encryption. (CCM)
vcoubard	551:ab7a8de3ff10	899	*/
vcoubard	551:ab7a8de3ff10	900
vcoubard	551:ab7a8de3ff10	901	typedef struct { /!< CCM Structure /
vcoubard	551:ab7a8de3ff10	902	__O uint32_t TASKS_KSGEN; /*!< Start generation of key-stream. This operation will stop by
vcoubard	551:ab7a8de3ff10	903	itself when completed. */
vcoubard	551:ab7a8de3ff10	904	__O uint32_t TASKS_CRYPT; /*!< Start encrypt/decrypt. This operation will stop by itself when
vcoubard	551:ab7a8de3ff10	905	completed. */
vcoubard	551:ab7a8de3ff10	906	__O uint32_t TASKS_STOP; /!< Stop encrypt/decrypt. /
vcoubard	551:ab7a8de3ff10	907	__I uint32_t RESERVED0[61];
vcoubard	551:ab7a8de3ff10	908	__IO uint32_t EVENTS_ENDKSGEN; /!< Keystream generation completed. /
vcoubard	551:ab7a8de3ff10	909	__IO uint32_t EVENTS_ENDCRYPT; /!< Encrypt/decrypt completed. /
vcoubard	551:ab7a8de3ff10	910	__IO uint32_t EVENTS_ERROR; /!< Error happened. /
vcoubard	551:ab7a8de3ff10	911	__I uint32_t RESERVED1[61];
vcoubard	551:ab7a8de3ff10	912	__IO uint32_t SHORTS; /!< Shortcuts for the CCM. /
vcoubard	551:ab7a8de3ff10	913	__I uint32_t RESERVED2[64];
vcoubard	551:ab7a8de3ff10	914	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	915	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	916	__I uint32_t RESERVED3[61];
vcoubard	551:ab7a8de3ff10	917	__I uint32_t MICSTATUS; /!< CCM RX MIC check result. /
vcoubard	551:ab7a8de3ff10	918	__I uint32_t RESERVED4[63];
vcoubard	551:ab7a8de3ff10	919	__IO uint32_t ENABLE; /!< CCM enable. /
vcoubard	551:ab7a8de3ff10	920	__IO uint32_t MODE; /!< Operation mode. /
vcoubard	551:ab7a8de3ff10	921	__IO uint32_t CNFPTR; /!< Pointer to a data structure holding AES key and NONCE vector. /
vcoubard	551:ab7a8de3ff10	922	__IO uint32_t INPTR; /!< Pointer to the input packet. /
vcoubard	551:ab7a8de3ff10	923	__IO uint32_t OUTPTR; /!< Pointer to the output packet. /
vcoubard	551:ab7a8de3ff10	924	__IO uint32_t SCRATCHPTR; /*!< Pointer to a "scratch" data area used for temporary storage
vcoubard	551:ab7a8de3ff10	925	during resolution. A minimum of 43 bytes must be reserved. */
vcoubard	551:ab7a8de3ff10	926	__I uint32_t RESERVED5[697];
vcoubard	551:ab7a8de3ff10	927	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	928	} NRF_CCM_Type;
vcoubard	551:ab7a8de3ff10	929
vcoubard	551:ab7a8de3ff10	930
vcoubard	551:ab7a8de3ff10	931	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	932	/* ================ WDT ================ */
vcoubard	551:ab7a8de3ff10	933	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	934
vcoubard	551:ab7a8de3ff10	935
vcoubard	551:ab7a8de3ff10	936	/**
vcoubard	551:ab7a8de3ff10	937	* @brief Watchdog Timer. (WDT)
vcoubard	551:ab7a8de3ff10	938	*/
vcoubard	551:ab7a8de3ff10	939
vcoubard	551:ab7a8de3ff10	940	typedef struct { /!< WDT Structure /
vcoubard	551:ab7a8de3ff10	941	__O uint32_t TASKS_START; /!< Start the watchdog. /
vcoubard	551:ab7a8de3ff10	942	__I uint32_t RESERVED0[63];
vcoubard	551:ab7a8de3ff10	943	__IO uint32_t EVENTS_TIMEOUT; /!< Watchdog timeout. /
vcoubard	551:ab7a8de3ff10	944	__I uint32_t RESERVED1[128];
vcoubard	551:ab7a8de3ff10	945	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	946	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	947	__I uint32_t RESERVED2[61];
vcoubard	551:ab7a8de3ff10	948	__I uint32_t RUNSTATUS; /!< Watchdog running status. /
vcoubard	551:ab7a8de3ff10	949	__I uint32_t REQSTATUS; /!< Request status. /
vcoubard	551:ab7a8de3ff10	950	__I uint32_t RESERVED3[63];
vcoubard	551:ab7a8de3ff10	951	__IO uint32_t CRV; /!< Counter reload value in number of 32kiHz clock cycles. /
vcoubard	551:ab7a8de3ff10	952	__IO uint32_t RREN; /!< Reload request enable. /
vcoubard	551:ab7a8de3ff10	953	__IO uint32_t CONFIG; /!< Configuration register. /
vcoubard	551:ab7a8de3ff10	954	__I uint32_t RESERVED4[60];
vcoubard	551:ab7a8de3ff10	955	__O uint32_t RR[8]; /!< Reload requests registers. /
vcoubard	551:ab7a8de3ff10	956	__I uint32_t RESERVED5[631];
vcoubard	551:ab7a8de3ff10	957	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	958	} NRF_WDT_Type;
vcoubard	551:ab7a8de3ff10	959
vcoubard	551:ab7a8de3ff10	960
vcoubard	551:ab7a8de3ff10	961	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	962	/* ================ QDEC ================ */
vcoubard	551:ab7a8de3ff10	963	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	964
vcoubard	551:ab7a8de3ff10	965
vcoubard	551:ab7a8de3ff10	966	/**
vcoubard	551:ab7a8de3ff10	967	* @brief Rotary decoder. (QDEC)
vcoubard	551:ab7a8de3ff10	968	*/
vcoubard	551:ab7a8de3ff10	969
vcoubard	551:ab7a8de3ff10	970	typedef struct { /!< QDEC Structure /
vcoubard	551:ab7a8de3ff10	971	__O uint32_t TASKS_START; /!< Start the quadrature decoder. /
vcoubard	551:ab7a8de3ff10	972	__O uint32_t TASKS_STOP; /!< Stop the quadrature decoder. /
vcoubard	551:ab7a8de3ff10	973	__O uint32_t TASKS_READCLRACC; /*!< Transfers the content from ACC registers to ACCREAD registers,
vcoubard	551:ab7a8de3ff10	974	and clears the ACC registers. */
vcoubard	551:ab7a8de3ff10	975	__I uint32_t RESERVED0[61];
vcoubard	551:ab7a8de3ff10	976	__IO uint32_t EVENTS_SAMPLERDY; /!< A new sample is written to the sample register. /
vcoubard	551:ab7a8de3ff10	977	__IO uint32_t EVENTS_REPORTRDY; /*!< REPORTPER number of samples accumulated in ACC register, and
vcoubard	551:ab7a8de3ff10	978	ACC register different than zero. */
vcoubard	551:ab7a8de3ff10	979	__IO uint32_t EVENTS_ACCOF; /!< ACC or ACCDBL register overflow. /
vcoubard	551:ab7a8de3ff10	980	__I uint32_t RESERVED1[61];
vcoubard	551:ab7a8de3ff10	981	__IO uint32_t SHORTS; /!< Shortcuts for the QDEC. /
vcoubard	551:ab7a8de3ff10	982	__I uint32_t RESERVED2[64];
vcoubard	551:ab7a8de3ff10	983	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	984	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	985	__I uint32_t RESERVED3[125];
vcoubard	551:ab7a8de3ff10	986	__IO uint32_t ENABLE; /!< Enable the QDEC. /
vcoubard	551:ab7a8de3ff10	987	__IO uint32_t LEDPOL; /!< LED output pin polarity. /
vcoubard	551:ab7a8de3ff10	988	__IO uint32_t SAMPLEPER; /!< Sample period. /
vcoubard	551:ab7a8de3ff10	989	__I int32_t SAMPLE; /!< Motion sample value. /
vcoubard	551:ab7a8de3ff10	990	__IO uint32_t REPORTPER; /!< Number of samples to generate an EVENT_REPORTRDY. /
vcoubard	551:ab7a8de3ff10	991	__I int32_t ACC; /!< Accumulated valid transitions register. /
vcoubard	551:ab7a8de3ff10	992	__I int32_t ACCREAD; /*!< Snapshot of ACC register. Value generated by the TASKS_READCLEACC
vcoubard	551:ab7a8de3ff10	993	task. */
vcoubard	551:ab7a8de3ff10	994	__IO uint32_t PSELLED; /!< Pin select for LED output. /
vcoubard	551:ab7a8de3ff10	995	__IO uint32_t PSELA; /!< Pin select for phase A input. /
vcoubard	551:ab7a8de3ff10	996	__IO uint32_t PSELB; /!< Pin select for phase B input. /
vcoubard	551:ab7a8de3ff10	997	__IO uint32_t DBFEN; /!< Enable debouncer input filters. /
vcoubard	551:ab7a8de3ff10	998	__I uint32_t RESERVED4[5];
vcoubard	551:ab7a8de3ff10	999	__IO uint32_t LEDPRE; /!< Time LED is switched ON before the sample. /
vcoubard	551:ab7a8de3ff10	1000	__I uint32_t ACCDBL; /!< Accumulated double (error) transitions register. /
vcoubard	551:ab7a8de3ff10	1001	__I uint32_t ACCDBLREAD; /*!< Snapshot of ACCDBL register. Value generated by the TASKS_READCLEACC
vcoubard	551:ab7a8de3ff10	1002	task. */
vcoubard	551:ab7a8de3ff10	1003	__I uint32_t RESERVED5[684];
vcoubard	551:ab7a8de3ff10	1004	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	1005	} NRF_QDEC_Type;
vcoubard	551:ab7a8de3ff10	1006
vcoubard	551:ab7a8de3ff10	1007
vcoubard	551:ab7a8de3ff10	1008	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1009	/* ================ LPCOMP ================ */
vcoubard	551:ab7a8de3ff10	1010	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1011
vcoubard	551:ab7a8de3ff10	1012
vcoubard	551:ab7a8de3ff10	1013	/**
vcoubard	551:ab7a8de3ff10	1014	* @brief Low power comparator. (LPCOMP)
vcoubard	551:ab7a8de3ff10	1015	*/
vcoubard	551:ab7a8de3ff10	1016
vcoubard	551:ab7a8de3ff10	1017	typedef struct { /!< LPCOMP Structure /
vcoubard	551:ab7a8de3ff10	1018	__O uint32_t TASKS_START; /!< Start the comparator. /
vcoubard	551:ab7a8de3ff10	1019	__O uint32_t TASKS_STOP; /!< Stop the comparator. /
vcoubard	551:ab7a8de3ff10	1020	__O uint32_t TASKS_SAMPLE; /!< Sample comparator value. /
vcoubard	551:ab7a8de3ff10	1021	__I uint32_t RESERVED0[61];
vcoubard	551:ab7a8de3ff10	1022	__IO uint32_t EVENTS_READY; /!< LPCOMP is ready and output is valid. /
vcoubard	551:ab7a8de3ff10	1023	__IO uint32_t EVENTS_DOWN; /!< Input voltage crossed the threshold going down. /
vcoubard	551:ab7a8de3ff10	1024	__IO uint32_t EVENTS_UP; /!< Input voltage crossed the threshold going up. /
vcoubard	551:ab7a8de3ff10	1025	__IO uint32_t EVENTS_CROSS; /!< Input voltage crossed the threshold in any direction. /
vcoubard	551:ab7a8de3ff10	1026	__I uint32_t RESERVED1[60];
vcoubard	551:ab7a8de3ff10	1027	__IO uint32_t SHORTS; /!< Shortcuts for the LPCOMP. /
vcoubard	551:ab7a8de3ff10	1028	__I uint32_t RESERVED2[64];
vcoubard	551:ab7a8de3ff10	1029	__IO uint32_t INTENSET; /!< Interrupt enable set register. /
vcoubard	551:ab7a8de3ff10	1030	__IO uint32_t INTENCLR; /!< Interrupt enable clear register. /
vcoubard	551:ab7a8de3ff10	1031	__I uint32_t RESERVED3[61];
vcoubard	551:ab7a8de3ff10	1032	__I uint32_t RESULT; /!< Result of last compare. /
vcoubard	551:ab7a8de3ff10	1033	__I uint32_t RESERVED4[63];
vcoubard	551:ab7a8de3ff10	1034	__IO uint32_t ENABLE; /!< Enable the LPCOMP. /
vcoubard	551:ab7a8de3ff10	1035	__IO uint32_t PSEL; /!< Input pin select. /
vcoubard	551:ab7a8de3ff10	1036	__IO uint32_t REFSEL; /!< Reference select. /
vcoubard	551:ab7a8de3ff10	1037	__IO uint32_t EXTREFSEL; /!< External reference select. /
vcoubard	551:ab7a8de3ff10	1038	__I uint32_t RESERVED5[4];
vcoubard	551:ab7a8de3ff10	1039	__IO uint32_t ANADETECT; /!< Analog detect configuration. /
vcoubard	551:ab7a8de3ff10	1040	__I uint32_t RESERVED6[694];
vcoubard	551:ab7a8de3ff10	1041	__IO uint32_t POWER; /!< Peripheral power control. /
vcoubard	551:ab7a8de3ff10	1042	} NRF_LPCOMP_Type;
vcoubard	551:ab7a8de3ff10	1043
vcoubard	551:ab7a8de3ff10	1044
vcoubard	551:ab7a8de3ff10	1045	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1046	/* ================ SWI ================ */
vcoubard	551:ab7a8de3ff10	1047	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1048
vcoubard	551:ab7a8de3ff10	1049
vcoubard	551:ab7a8de3ff10	1050	/**
vcoubard	551:ab7a8de3ff10	1051	* @brief SW Interrupts. (SWI)
vcoubard	551:ab7a8de3ff10	1052	*/
vcoubard	551:ab7a8de3ff10	1053
vcoubard	551:ab7a8de3ff10	1054	typedef struct { /!< SWI Structure /
vcoubard	551:ab7a8de3ff10	1055	__I uint32_t UNUSED; /!< Unused. /
vcoubard	551:ab7a8de3ff10	1056	} NRF_SWI_Type;
vcoubard	551:ab7a8de3ff10	1057
vcoubard	551:ab7a8de3ff10	1058
vcoubard	551:ab7a8de3ff10	1059	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1060	/* ================ NVMC ================ */
vcoubard	551:ab7a8de3ff10	1061	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1062
vcoubard	551:ab7a8de3ff10	1063
vcoubard	551:ab7a8de3ff10	1064	/**
vcoubard	551:ab7a8de3ff10	1065	* @brief Non Volatile Memory Controller. (NVMC)
vcoubard	551:ab7a8de3ff10	1066	*/
vcoubard	551:ab7a8de3ff10	1067
vcoubard	551:ab7a8de3ff10	1068	typedef struct { /!< NVMC Structure /
vcoubard	551:ab7a8de3ff10	1069	__I uint32_t RESERVED0[256];
vcoubard	551:ab7a8de3ff10	1070	__I uint32_t READY; /!< Ready flag. /
vcoubard	551:ab7a8de3ff10	1071	__I uint32_t RESERVED1[64];
vcoubard	551:ab7a8de3ff10	1072	__IO uint32_t CONFIG; /!< Configuration register. /
vcoubard	551:ab7a8de3ff10	1073	__IO uint32_t ERASEPAGE; /!< Register for erasing a non-protected non-volatile memory page. /
vcoubard	551:ab7a8de3ff10	1074	__IO uint32_t ERASEALL; /!< Register for erasing all non-volatile user memory. /
vcoubard	551:ab7a8de3ff10	1075	__IO uint32_t ERASEPROTECTEDPAGE; /!< Register for erasing a protected non-volatile memory page. /
vcoubard	551:ab7a8de3ff10	1076	__IO uint32_t ERASEUICR; /!< Register for start erasing User Information Congfiguration Registers. /
vcoubard	551:ab7a8de3ff10	1077	} NRF_NVMC_Type;
vcoubard	551:ab7a8de3ff10	1078
vcoubard	551:ab7a8de3ff10	1079
vcoubard	551:ab7a8de3ff10	1080	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1081	/* ================ PPI ================ */
vcoubard	551:ab7a8de3ff10	1082	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1083
vcoubard	551:ab7a8de3ff10	1084
vcoubard	551:ab7a8de3ff10	1085	/**
vcoubard	551:ab7a8de3ff10	1086	* @brief PPI controller. (PPI)
vcoubard	551:ab7a8de3ff10	1087	*/
vcoubard	551:ab7a8de3ff10	1088
vcoubard	551:ab7a8de3ff10	1089	typedef struct { /!< PPI Structure /
vcoubard	551:ab7a8de3ff10	1090	PPI_TASKS_CHG_Type TASKS_CHG[4]; /!< Channel group tasks. /
vcoubard	551:ab7a8de3ff10	1091	__I uint32_t RESERVED0[312];
vcoubard	551:ab7a8de3ff10	1092	__IO uint32_t CHEN; /!< Channel enable. /
vcoubard	551:ab7a8de3ff10	1093	__IO uint32_t CHENSET; /!< Channel enable set. /
vcoubard	551:ab7a8de3ff10	1094	__IO uint32_t CHENCLR; /!< Channel enable clear. /
vcoubard	551:ab7a8de3ff10	1095	__I uint32_t RESERVED1;
vcoubard	551:ab7a8de3ff10	1096	PPI_CH_Type CH[16]; /!< PPI Channel. /
vcoubard	551:ab7a8de3ff10	1097	__I uint32_t RESERVED2[156];
vcoubard	551:ab7a8de3ff10	1098	__IO uint32_t CHG[4]; /!< Channel group configuration. /
vcoubard	551:ab7a8de3ff10	1099	} NRF_PPI_Type;
vcoubard	551:ab7a8de3ff10	1100
vcoubard	551:ab7a8de3ff10	1101
vcoubard	551:ab7a8de3ff10	1102	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1103	/* ================ FICR ================ */
vcoubard	551:ab7a8de3ff10	1104	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1105
vcoubard	551:ab7a8de3ff10	1106
vcoubard	551:ab7a8de3ff10	1107	/**
vcoubard	551:ab7a8de3ff10	1108	* @brief Factory Information Configuration. (FICR)
vcoubard	551:ab7a8de3ff10	1109	*/
vcoubard	551:ab7a8de3ff10	1110
vcoubard	551:ab7a8de3ff10	1111	typedef struct { /!< FICR Structure /
vcoubard	551:ab7a8de3ff10	1112	__I uint32_t RESERVED0[4];
vcoubard	551:ab7a8de3ff10	1113	__I uint32_t CODEPAGESIZE; /!< Code memory page size in bytes. /
vcoubard	551:ab7a8de3ff10	1114	__I uint32_t CODESIZE; /!< Code memory size in pages. /
vcoubard	551:ab7a8de3ff10	1115	__I uint32_t RESERVED1[4];
vcoubard	551:ab7a8de3ff10	1116	__I uint32_t CLENR0; /!< Length of code region 0 in bytes. /
vcoubard	551:ab7a8de3ff10	1117	__I uint32_t PPFC; /!< Pre-programmed factory code present. /
vcoubard	551:ab7a8de3ff10	1118	__I uint32_t RESERVED2;
vcoubard	551:ab7a8de3ff10	1119	__I uint32_t NUMRAMBLOCK; /!< Number of individualy controllable RAM blocks. /
vcoubard	551:ab7a8de3ff10	1120
vcoubard	551:ab7a8de3ff10	1121	union {
vcoubard	551:ab7a8de3ff10	1122	__I uint32_t SIZERAMBLOCK[4]; /*!< Deprecated array of size of RAM block in bytes. This name is
vcoubard	551:ab7a8de3ff10	1123	kept for backward compatinility purposes. Use SIZERAMBLOCKS
vcoubard	551:ab7a8de3ff10	1124	instead. */
vcoubard	551:ab7a8de3ff10	1125	__I uint32_t SIZERAMBLOCKS; /!< Size of RAM blocks in bytes. /
vcoubard	551:ab7a8de3ff10	1126	};
vcoubard	551:ab7a8de3ff10	1127	__I uint32_t RESERVED3[5];
vcoubard	551:ab7a8de3ff10	1128	__I uint32_t CONFIGID; /!< Configuration identifier. /
vcoubard	551:ab7a8de3ff10	1129	__I uint32_t DEVICEID[2]; /!< Device identifier. /
vcoubard	551:ab7a8de3ff10	1130	__I uint32_t RESERVED4[6];
vcoubard	551:ab7a8de3ff10	1131	__I uint32_t ER[4]; /!< Encryption root. /
vcoubard	551:ab7a8de3ff10	1132	__I uint32_t IR[4]; /!< Identity root. /
vcoubard	551:ab7a8de3ff10	1133	__I uint32_t DEVICEADDRTYPE; /!< Device address type. /
vcoubard	551:ab7a8de3ff10	1134	__I uint32_t DEVICEADDR[2]; /!< Device address. /
vcoubard	551:ab7a8de3ff10	1135	__I uint32_t OVERRIDEEN; /!< Radio calibration override enable. /
vcoubard	551:ab7a8de3ff10	1136	__I uint32_t NRF_1MBIT[5]; /*!< Override values for the OVERRIDEn registers in RADIO for NRF_1Mbit
vcoubard	551:ab7a8de3ff10	1137	mode. */
vcoubard	551:ab7a8de3ff10	1138	__I uint32_t RESERVED5[10];
vcoubard	551:ab7a8de3ff10	1139	__I uint32_t BLE_1MBIT[5]; /*!< Override values for the OVERRIDEn registers in RADIO for BLE_1Mbit
vcoubard	551:ab7a8de3ff10	1140	mode. */
vcoubard	551:ab7a8de3ff10	1141	FICR_INFO_Type INFO; /!< Device info /
vcoubard	551:ab7a8de3ff10	1142	} NRF_FICR_Type;
vcoubard	551:ab7a8de3ff10	1143
vcoubard	551:ab7a8de3ff10	1144
vcoubard	551:ab7a8de3ff10	1145	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1146	/* ================ UICR ================ */
vcoubard	551:ab7a8de3ff10	1147	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1148
vcoubard	551:ab7a8de3ff10	1149
vcoubard	551:ab7a8de3ff10	1150	/**
vcoubard	551:ab7a8de3ff10	1151	* @brief User Information Configuration. (UICR)
vcoubard	551:ab7a8de3ff10	1152	*/
vcoubard	551:ab7a8de3ff10	1153
vcoubard	551:ab7a8de3ff10	1154	typedef struct { /!< UICR Structure /
vcoubard	551:ab7a8de3ff10	1155	__IO uint32_t CLENR0; /!< Length of code region 0. /
vcoubard	551:ab7a8de3ff10	1156	__IO uint32_t RBPCONF; /!< Readback protection configuration. /
vcoubard	551:ab7a8de3ff10	1157	__IO uint32_t XTALFREQ; /!< Reset value for CLOCK XTALFREQ register. /
vcoubard	551:ab7a8de3ff10	1158	__I uint32_t RESERVED0;
vcoubard	551:ab7a8de3ff10	1159	__I uint32_t FWID; /!< Firmware ID. /
vcoubard	551:ab7a8de3ff10	1160	__IO uint32_t BOOTLOADERADDR; /!< Bootloader start address. /
vcoubard	551:ab7a8de3ff10	1161	} NRF_UICR_Type;
vcoubard	551:ab7a8de3ff10	1162
vcoubard	551:ab7a8de3ff10	1163
vcoubard	551:ab7a8de3ff10	1164	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1165	/* ================ GPIO ================ */
vcoubard	551:ab7a8de3ff10	1166	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1167
vcoubard	551:ab7a8de3ff10	1168
vcoubard	551:ab7a8de3ff10	1169	/**
vcoubard	551:ab7a8de3ff10	1170	* @brief General purpose input and output. (GPIO)
vcoubard	551:ab7a8de3ff10	1171	*/
vcoubard	551:ab7a8de3ff10	1172
vcoubard	551:ab7a8de3ff10	1173	typedef struct { /!< GPIO Structure /
vcoubard	551:ab7a8de3ff10	1174	__I uint32_t RESERVED0[321];
vcoubard	551:ab7a8de3ff10	1175	__IO uint32_t OUT; /!< Write GPIO port. /
vcoubard	551:ab7a8de3ff10	1176	__IO uint32_t OUTSET; /!< Set individual bits in GPIO port. /
vcoubard	551:ab7a8de3ff10	1177	__IO uint32_t OUTCLR; /!< Clear individual bits in GPIO port. /
vcoubard	551:ab7a8de3ff10	1178	__I uint32_t IN; /!< Read GPIO port. /
vcoubard	551:ab7a8de3ff10	1179	__IO uint32_t DIR; /!< Direction of GPIO pins. /
vcoubard	551:ab7a8de3ff10	1180	__IO uint32_t DIRSET; /!< DIR set register. /
vcoubard	551:ab7a8de3ff10	1181	__IO uint32_t DIRCLR; /!< DIR clear register. /
vcoubard	551:ab7a8de3ff10	1182	__I uint32_t RESERVED1[120];
vcoubard	551:ab7a8de3ff10	1183	__IO uint32_t PIN_CNF[32]; /!< Configuration of GPIO pins. /
vcoubard	551:ab7a8de3ff10	1184	} NRF_GPIO_Type;
vcoubard	551:ab7a8de3ff10	1185
vcoubard	551:ab7a8de3ff10	1186
vcoubard	551:ab7a8de3ff10	1187	/* -------------------- End of section using anonymous unions ------------------- */
vcoubard	551:ab7a8de3ff10	1188	#if defined(__CC_ARM)
vcoubard	551:ab7a8de3ff10	1189	#pragma pop
vcoubard	551:ab7a8de3ff10	1190	#elif defined(__ICCARM__)
vcoubard	551:ab7a8de3ff10	1191	/* leave anonymous unions enabled */
vcoubard	551:ab7a8de3ff10	1192	#elif defined(__GNUC__)
vcoubard	551:ab7a8de3ff10	1193	/* anonymous unions are enabled by default */
vcoubard	551:ab7a8de3ff10	1194	#elif defined(__TMS470__)
vcoubard	551:ab7a8de3ff10	1195	/* anonymous unions are enabled by default */
vcoubard	551:ab7a8de3ff10	1196	#elif defined(__TASKING__)
vcoubard	551:ab7a8de3ff10	1197	#pragma warning restore
vcoubard	551:ab7a8de3ff10	1198	#else
vcoubard	551:ab7a8de3ff10	1199	#warning Not supported compiler type
vcoubard	551:ab7a8de3ff10	1200	#endif
vcoubard	551:ab7a8de3ff10	1201
vcoubard	551:ab7a8de3ff10	1202
vcoubard	551:ab7a8de3ff10	1203
vcoubard	551:ab7a8de3ff10	1204
vcoubard	551:ab7a8de3ff10	1205	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1206	/* ================ Peripheral memory map ================ */
vcoubard	551:ab7a8de3ff10	1207	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1208
vcoubard	551:ab7a8de3ff10	1209	#define NRF_POWER_BASE 0x40000000UL
vcoubard	551:ab7a8de3ff10	1210	#define NRF_CLOCK_BASE 0x40000000UL
vcoubard	551:ab7a8de3ff10	1211	#define NRF_MPU_BASE 0x40000000UL
vcoubard	551:ab7a8de3ff10	1212	#define NRF_PU_BASE 0x40000000UL
vcoubard	551:ab7a8de3ff10	1213	#define NRF_AMLI_BASE 0x40000000UL
vcoubard	551:ab7a8de3ff10	1214	#define NRF_RADIO_BASE 0x40001000UL
vcoubard	551:ab7a8de3ff10	1215	#define NRF_UART0_BASE 0x40002000UL
vcoubard	551:ab7a8de3ff10	1216	#define NRF_SPI0_BASE 0x40003000UL
vcoubard	551:ab7a8de3ff10	1217	#define NRF_TWI0_BASE 0x40003000UL
vcoubard	551:ab7a8de3ff10	1218	#define NRF_SPI1_BASE 0x40004000UL
vcoubard	551:ab7a8de3ff10	1219	#define NRF_TWI1_BASE 0x40004000UL
vcoubard	551:ab7a8de3ff10	1220	#define NRF_SPIS1_BASE 0x40004000UL
vcoubard	551:ab7a8de3ff10	1221	#define NRF_SPIM1_BASE 0x40004000UL
vcoubard	551:ab7a8de3ff10	1222	#define NRF_GPIOTE_BASE 0x40006000UL
vcoubard	551:ab7a8de3ff10	1223	#define NRF_ADC_BASE 0x40007000UL
vcoubard	551:ab7a8de3ff10	1224	#define NRF_TIMER0_BASE 0x40008000UL
vcoubard	551:ab7a8de3ff10	1225	#define NRF_TIMER1_BASE 0x40009000UL
vcoubard	551:ab7a8de3ff10	1226	#define NRF_TIMER2_BASE 0x4000A000UL
vcoubard	551:ab7a8de3ff10	1227	#define NRF_RTC0_BASE 0x4000B000UL
vcoubard	551:ab7a8de3ff10	1228	#define NRF_TEMP_BASE 0x4000C000UL
vcoubard	551:ab7a8de3ff10	1229	#define NRF_RNG_BASE 0x4000D000UL
vcoubard	551:ab7a8de3ff10	1230	#define NRF_ECB_BASE 0x4000E000UL
vcoubard	551:ab7a8de3ff10	1231	#define NRF_AAR_BASE 0x4000F000UL
vcoubard	551:ab7a8de3ff10	1232	#define NRF_CCM_BASE 0x4000F000UL
vcoubard	551:ab7a8de3ff10	1233	#define NRF_WDT_BASE 0x40010000UL
vcoubard	551:ab7a8de3ff10	1234	#define NRF_RTC1_BASE 0x40011000UL
vcoubard	551:ab7a8de3ff10	1235	#define NRF_QDEC_BASE 0x40012000UL
vcoubard	551:ab7a8de3ff10	1236	#define NRF_LPCOMP_BASE 0x40013000UL
vcoubard	551:ab7a8de3ff10	1237	#define NRF_SWI_BASE 0x40014000UL
vcoubard	551:ab7a8de3ff10	1238	#define NRF_NVMC_BASE 0x4001E000UL
vcoubard	551:ab7a8de3ff10	1239	#define NRF_PPI_BASE 0x4001F000UL
vcoubard	551:ab7a8de3ff10	1240	#define NRF_FICR_BASE 0x10000000UL
vcoubard	551:ab7a8de3ff10	1241	#define NRF_UICR_BASE 0x10001000UL
vcoubard	551:ab7a8de3ff10	1242	#define NRF_GPIO_BASE 0x50000000UL
vcoubard	551:ab7a8de3ff10	1243
vcoubard	551:ab7a8de3ff10	1244
vcoubard	551:ab7a8de3ff10	1245	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1246	/* ================ Peripheral declaration ================ */
vcoubard	551:ab7a8de3ff10	1247	/* ================================================================================ */
vcoubard	551:ab7a8de3ff10	1248
vcoubard	551:ab7a8de3ff10	1249	#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE)
vcoubard	551:ab7a8de3ff10	1250	#define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE)
vcoubard	551:ab7a8de3ff10	1251	#define NRF_MPU ((NRF_MPU_Type *) NRF_MPU_BASE)
vcoubard	551:ab7a8de3ff10	1252	#define NRF_PU ((NRF_PU_Type *) NRF_PU_BASE)
vcoubard	551:ab7a8de3ff10	1253	#define NRF_AMLI ((NRF_AMLI_Type *) NRF_AMLI_BASE)
vcoubard	551:ab7a8de3ff10	1254	#define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE)
vcoubard	551:ab7a8de3ff10	1255	#define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE)
vcoubard	551:ab7a8de3ff10	1256	#define NRF_SPI0 ((NRF_SPI_Type *) NRF_SPI0_BASE)
vcoubard	551:ab7a8de3ff10	1257	#define NRF_TWI0 ((NRF_TWI_Type *) NRF_TWI0_BASE)
vcoubard	551:ab7a8de3ff10	1258	#define NRF_SPI1 ((NRF_SPI_Type *) NRF_SPI1_BASE)
vcoubard	551:ab7a8de3ff10	1259	#define NRF_TWI1 ((NRF_TWI_Type *) NRF_TWI1_BASE)
vcoubard	551:ab7a8de3ff10	1260	#define NRF_SPIS1 ((NRF_SPIS_Type *) NRF_SPIS1_BASE)
vcoubard	551:ab7a8de3ff10	1261	#define NRF_SPIM1 ((NRF_SPIM_Type *) NRF_SPIM1_BASE)
vcoubard	551:ab7a8de3ff10	1262	#define NRF_GPIOTE ((NRF_GPIOTE_Type *) NRF_GPIOTE_BASE)
vcoubard	551:ab7a8de3ff10	1263	#define NRF_ADC ((NRF_ADC_Type *) NRF_ADC_BASE)
vcoubard	551:ab7a8de3ff10	1264	#define NRF_TIMER0 ((NRF_TIMER_Type *) NRF_TIMER0_BASE)
vcoubard	551:ab7a8de3ff10	1265	#define NRF_TIMER1 ((NRF_TIMER_Type *) NRF_TIMER1_BASE)
vcoubard	551:ab7a8de3ff10	1266	#define NRF_TIMER2 ((NRF_TIMER_Type *) NRF_TIMER2_BASE)
vcoubard	551:ab7a8de3ff10	1267	#define NRF_RTC0 ((NRF_RTC_Type *) NRF_RTC0_BASE)
vcoubard	551:ab7a8de3ff10	1268	#define NRF_TEMP ((NRF_TEMP_Type *) NRF_TEMP_BASE)
vcoubard	551:ab7a8de3ff10	1269	#define NRF_RNG ((NRF_RNG_Type *) NRF_RNG_BASE)
vcoubard	551:ab7a8de3ff10	1270	#define NRF_ECB ((NRF_ECB_Type *) NRF_ECB_BASE)
vcoubard	551:ab7a8de3ff10	1271	#define NRF_AAR ((NRF_AAR_Type *) NRF_AAR_BASE)
vcoubard	551:ab7a8de3ff10	1272	#define NRF_CCM ((NRF_CCM_Type *) NRF_CCM_BASE)
vcoubard	551:ab7a8de3ff10	1273	#define NRF_WDT ((NRF_WDT_Type *) NRF_WDT_BASE)
vcoubard	551:ab7a8de3ff10	1274	#define NRF_RTC1 ((NRF_RTC_Type *) NRF_RTC1_BASE)
vcoubard	551:ab7a8de3ff10	1275	#define NRF_QDEC ((NRF_QDEC_Type *) NRF_QDEC_BASE)
vcoubard	551:ab7a8de3ff10	1276	#define NRF_LPCOMP ((NRF_LPCOMP_Type *) NRF_LPCOMP_BASE)
vcoubard	551:ab7a8de3ff10	1277	#define NRF_SWI ((NRF_SWI_Type *) NRF_SWI_BASE)
vcoubard	551:ab7a8de3ff10	1278	#define NRF_NVMC ((NRF_NVMC_Type *) NRF_NVMC_BASE)
vcoubard	551:ab7a8de3ff10	1279	#define NRF_PPI ((NRF_PPI_Type *) NRF_PPI_BASE)
vcoubard	551:ab7a8de3ff10	1280	#define NRF_FICR ((NRF_FICR_Type *) NRF_FICR_BASE)
vcoubard	551:ab7a8de3ff10	1281	#define NRF_UICR ((NRF_UICR_Type *) NRF_UICR_BASE)
vcoubard	551:ab7a8de3ff10	1282	#define NRF_GPIO ((NRF_GPIO_Type *) NRF_GPIO_BASE)
vcoubard	551:ab7a8de3ff10	1283
vcoubard	551:ab7a8de3ff10	1284
vcoubard	551:ab7a8de3ff10	1285	/** @} / / End of group Device_Peripheral_Registers */
vcoubard	551:ab7a8de3ff10	1286	/** @} / / End of group nRF51 */
vcoubard	551:ab7a8de3ff10	1287	/** @} / / End of group Nordic Semiconductor */
vcoubard	551:ab7a8de3ff10	1288
vcoubard	551:ab7a8de3ff10	1289	#ifdef __cplusplus
vcoubard	551:ab7a8de3ff10	1290	}
vcoubard	551:ab7a8de3ff10	1291	#endif
vcoubard	551:ab7a8de3ff10	1292
vcoubard	551:ab7a8de3ff10	1293
vcoubard	551:ab7a8de3ff10	1294	#endif /* nRF51_H */

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Type:	Library
Created:	24 Jan 2017
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Commits:	641
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source/nordic-sdk/components/device/nrf51.h@551:ab7a8de3ff10, 2016-01-11 (annotated)

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source/nordic-sdk/components/device/nrf51.h@551:ab7a8de3ff10, 2016-01-11 (annotated)

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