Kashish Haresh Shah / Mbed 2 deprecated HXCClientShield

HXC Client Shield Repository.

Dependencies:   mbed

Driver/hw_usart.c@0:bacc6e701fb4, 2021-03-29 (annotated)

Committer:
kashish_mbed
Date:
Mon Mar 29 15:37:08 2021 +0000
Revision:
0:bacc6e701fb4
Initial Commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kashish_mbed 0:bacc6e701fb4 1 /******************************************************************************
kashish_mbed 0:bacc6e701fb4 2 * File : hw_usart.c
kashish_mbed 0:bacc6e701fb4 3 * Author : Fahad Mirza (Haxiot)
kashish_mbed 0:bacc6e701fb4 4 * Date : 08-January-2018
kashish_mbed 0:bacc6e701fb4 5 * Brief : Configuration of the USART instances.
kashish_mbed 0:bacc6e701fb4 6 ******************************************************************************
kashish_mbed 0:bacc6e701fb4 7 * @attention
kashish_mbed 0:bacc6e701fb4 8 *
kashish_mbed 0:bacc6e701fb4 9 * <h2><center>&copy; Copyright (c) 2017 Haxiot. All rights reserved.</center></h2>
kashish_mbed 0:bacc6e701fb4 10 *
kashish_mbed 0:bacc6e701fb4 11 * Redistribution and use in source and binary forms, with or without
kashish_mbed 0:bacc6e701fb4 12 * modification, are permitted, provided that the following conditions are met:
kashish_mbed 0:bacc6e701fb4 13 *
kashish_mbed 0:bacc6e701fb4 14 * 1. Redistribution of source code must retain the above copyright notice,
kashish_mbed 0:bacc6e701fb4 15 * this list of conditions and the following disclaimer.
kashish_mbed 0:bacc6e701fb4 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
kashish_mbed 0:bacc6e701fb4 17 * this list of conditions and the following disclaimer in the documentation
kashish_mbed 0:bacc6e701fb4 18 * and/or other materials provided with the distribution.
kashish_mbed 0:bacc6e701fb4 19 * 3. Neither the name of STMicroelectronics nor the names of other
kashish_mbed 0:bacc6e701fb4 20 * contributors to this software may be used to endorse or promote products
kashish_mbed 0:bacc6e701fb4 21 * derived from this software without specific written permission.
kashish_mbed 0:bacc6e701fb4 22 * 4. Redistribution and use of this software other than as permitted under
kashish_mbed 0:bacc6e701fb4 23 * this license is void and will automatically terminate your rights under
kashish_mbed 0:bacc6e701fb4 24 * this license.
kashish_mbed 0:bacc6e701fb4 25 *
kashish_mbed 0:bacc6e701fb4 26 * THIS SOFTWARE IS PROVIDED BY HAXIOT AND CONTRIBUTORS "AS IS"
kashish_mbed 0:bacc6e701fb4 27 * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
kashish_mbed 0:bacc6e701fb4 28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
kashish_mbed 0:bacc6e701fb4 29 * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
kashish_mbed 0:bacc6e701fb4 30 * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
kashish_mbed 0:bacc6e701fb4 31 * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
kashish_mbed 0:bacc6e701fb4 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
kashish_mbed 0:bacc6e701fb4 33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
kashish_mbed 0:bacc6e701fb4 34 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
kashish_mbed 0:bacc6e701fb4 35 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
kashish_mbed 0:bacc6e701fb4 36 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
kashish_mbed 0:bacc6e701fb4 37 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
kashish_mbed 0:bacc6e701fb4 38 *
kashish_mbed 0:bacc6e701fb4 39 ******************************************************************************
kashish_mbed 0:bacc6e701fb4 40 */
kashish_mbed 0:bacc6e701fb4 41
kashish_mbed 0:bacc6e701fb4 42 /*---- Includes ----------------------------------------------*/
kashish_mbed 0:bacc6e701fb4 43 #include "hw.h"
kashish_mbed 0:bacc6e701fb4 44 #include "low_power_manager.h"
kashish_mbed 0:bacc6e701fb4 45 #include "time_server.h"
kashish_mbed 0:bacc6e701fb4 46
kashish_mbed 0:bacc6e701fb4 47 /*---- Private variable --------------------------------------------------------*/
kashish_mbed 0:bacc6e701fb4 48 static struct
kashish_mbed 0:bacc6e701fb4 49 {
kashish_mbed 0:bacc6e701fb4 50 char buffTx[256]; /* structure have to be simplified*/
kashish_mbed 0:bacc6e701fb4 51 char buffRx[256];
kashish_mbed 0:bacc6e701fb4 52 int rx_idx_free;
kashish_mbed 0:bacc6e701fb4 53 int rx_idx_toread;
kashish_mbed 0:bacc6e701fb4 54 HW_LockTypeDef Lock;
kashish_mbed 0:bacc6e701fb4 55 __IO HAL_UART_StateTypeDef gState;
kashish_mbed 0:bacc6e701fb4 56 __IO HAL_UART_StateTypeDef RxState;
kashish_mbed 0:bacc6e701fb4 57 } uart_context;
kashish_mbed 0:bacc6e701fb4 58
kashish_mbed 0:bacc6e701fb4 59 /*---- private function --------------------------------------------------------*/
kashish_mbed 0:bacc6e701fb4 60 static void receive(char rx);
kashish_mbed 0:bacc6e701fb4 61
kashish_mbed 0:bacc6e701fb4 62 /*---- private Global variables ------------------------------------------------*/
kashish_mbed 0:bacc6e701fb4 63 static UART_HandleTypeDef hxcUart;
kashish_mbed 0:bacc6e701fb4 64
kashish_mbed 0:bacc6e701fb4 65
kashish_mbed 0:bacc6e701fb4 66 /*---- Function Definitions ----------------------------------------------------*/
kashish_mbed 0:bacc6e701fb4 67
kashish_mbed 0:bacc6e701fb4 68 bool HW_UART_Modem_Init(uint32_t BaudRate)
kashish_mbed 0:bacc6e701fb4 69 {
kashish_mbed 0:bacc6e701fb4 70 hxcUart.Instance = HXC_USARTX;
kashish_mbed 0:bacc6e701fb4 71 hxcUart.Init.BaudRate = BaudRate;
kashish_mbed 0:bacc6e701fb4 72 hxcUart.Init.WordLength = UART_WORDLENGTH_8B;
kashish_mbed 0:bacc6e701fb4 73 hxcUart.Init.StopBits = UART_STOPBITS_1;
kashish_mbed 0:bacc6e701fb4 74 hxcUart.Init.Parity = UART_PARITY_NONE;
kashish_mbed 0:bacc6e701fb4 75 hxcUart.Init.Mode = UART_MODE_TX_RX;
kashish_mbed 0:bacc6e701fb4 76 hxcUart.Init.HwFlowCtl = UART_HWCONTROL_NONE;
kashish_mbed 0:bacc6e701fb4 77 hxcUart.Init.OverSampling = UART_OVERSAMPLING_16;
kashish_mbed 0:bacc6e701fb4 78 hxcUart.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
kashish_mbed 0:bacc6e701fb4 79 hxcUart.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
kashish_mbed 0:bacc6e701fb4 80 hxcUart.gState = HAL_UART_STATE_RESET;
kashish_mbed 0:bacc6e701fb4 81
kashish_mbed 0:bacc6e701fb4 82
kashish_mbed 0:bacc6e701fb4 83 if(HAL_UART_Init(&hxcUart) != HAL_OK)
kashish_mbed 0:bacc6e701fb4 84 {
kashish_mbed 0:bacc6e701fb4 85 // Initialization Error
kashish_mbed 0:bacc6e701fb4 86 return false;
kashish_mbed 0:bacc6e701fb4 87 }
kashish_mbed 0:bacc6e701fb4 88
kashish_mbed 0:bacc6e701fb4 89 /* Computation of UART mask to apply to RDR register */
kashish_mbed 0:bacc6e701fb4 90 UART_MASK_COMPUTATION(&hxcUart);
kashish_mbed 0:bacc6e701fb4 91 /*******************************************************************/
kashish_mbed 0:bacc6e701fb4 92 /*see Application Note AN4991 : how to wake up an STM32L0 MCU from */
kashish_mbed 0:bacc6e701fb4 93 /*low power mode with the USART or the LPUART */
kashish_mbed 0:bacc6e701fb4 94 /*******************************************************************/
kashish_mbed 0:bacc6e701fb4 95
kashish_mbed 0:bacc6e701fb4 96 /* Enable the UART Parity Error and Data Register not empty Interrupts */
kashish_mbed 0:bacc6e701fb4 97 SET_BIT(hxcUart.Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
kashish_mbed 0:bacc6e701fb4 98 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
kashish_mbed 0:bacc6e701fb4 99 SET_BIT(hxcUart.Instance->CR3, USART_CR3_EIE);
kashish_mbed 0:bacc6e701fb4 100
kashish_mbed 0:bacc6e701fb4 101 /*Enable UART Stop Mode*/
kashish_mbed 0:bacc6e701fb4 102 HAL_UARTEx_EnableStopMode(&hxcUart);
kashish_mbed 0:bacc6e701fb4 103
kashish_mbed 0:bacc6e701fb4 104 // Enable wakeup from stop mode active on start bit detection
kashish_mbed 0:bacc6e701fb4 105 MODIFY_REG(hxcUart.Instance->CR3, USART_CR3_WUS, USART_CR3_WUS_1);
kashish_mbed 0:bacc6e701fb4 106
kashish_mbed 0:bacc6e701fb4 107 // Enable Wake Up from Stop Mode Interrupt
kashish_mbed 0:bacc6e701fb4 108 SET_BIT(hxcUart.Instance->CR3, USART_CR3_WUFIE);
kashish_mbed 0:bacc6e701fb4 109
kashish_mbed 0:bacc6e701fb4 110 hxcUart.ErrorCode = HAL_UART_ERROR_NONE;
kashish_mbed 0:bacc6e701fb4 111 hxcUart.RxState = HAL_UART_STATE_READY;
kashish_mbed 0:bacc6e701fb4 112
kashish_mbed 0:bacc6e701fb4 113 return true;
kashish_mbed 0:bacc6e701fb4 114 }
kashish_mbed 0:bacc6e701fb4 115
kashish_mbed 0:bacc6e701fb4 116 void HAL_UART_MspInit(UART_HandleTypeDef* huart)
kashish_mbed 0:bacc6e701fb4 117 {
kashish_mbed 0:bacc6e701fb4 118 GPIO_InitTypeDef GPIO_InitStruct;
kashish_mbed 0:bacc6e701fb4 119 /***************************************************************/
kashish_mbed 0:bacc6e701fb4 120 /* GPIO Configuration for UART2 or for LPUART1 */
kashish_mbed 0:bacc6e701fb4 121 /* for USART1 use: */
kashish_mbed 0:bacc6e701fb4 122 /* PA10 ------> USART1_RX */
kashish_mbed 0:bacc6e701fb4 123 /* PA9 ------> USART1_TX */
kashish_mbed 0:bacc6e701fb4 124 /* else for USART2 use: */
kashish_mbed 0:bacc6e701fb4 125 /* PA2 ------> USART2_TX */
kashish_mbed 0:bacc6e701fb4 126 /* PA3 ------> USART2_RX */
kashish_mbed 0:bacc6e701fb4 127 /***************************************************************/
kashish_mbed 0:bacc6e701fb4 128
kashish_mbed 0:bacc6e701fb4 129 /* We need both instances. One UART is used for HXC and
kashish_mbed 0:bacc6e701fb4 130 * another one is used for debug printf. As HAL_UART_Init()
kashish_mbed 0:bacc6e701fb4 131 * uses HAL_UART_MspInit(), we needed to cover both instances.
kashish_mbed 0:bacc6e701fb4 132 */
kashish_mbed 0:bacc6e701fb4 133 if(huart->Instance == USART1)
kashish_mbed 0:bacc6e701fb4 134 {
kashish_mbed 0:bacc6e701fb4 135 // Peripheral clock enable
kashish_mbed 0:bacc6e701fb4 136 __HAL_RCC_USART1_CLK_ENABLE();
kashish_mbed 0:bacc6e701fb4 137 __HAL_RCC_GPIOA_CLK_ENABLE();
kashish_mbed 0:bacc6e701fb4 138 GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
kashish_mbed 0:bacc6e701fb4 139 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
kashish_mbed 0:bacc6e701fb4 140 GPIO_InitStruct.Pull = GPIO_NOPULL;
kashish_mbed 0:bacc6e701fb4 141 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
kashish_mbed 0:bacc6e701fb4 142 GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
kashish_mbed 0:bacc6e701fb4 143 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
kashish_mbed 0:bacc6e701fb4 144 }
kashish_mbed 0:bacc6e701fb4 145 else if(huart->Instance == USART2)
kashish_mbed 0:bacc6e701fb4 146 {
kashish_mbed 0:bacc6e701fb4 147 // Peripheral clock enable
kashish_mbed 0:bacc6e701fb4 148 __HAL_RCC_USART2_CLK_ENABLE();
kashish_mbed 0:bacc6e701fb4 149 __HAL_RCC_GPIOA_CLK_ENABLE();
kashish_mbed 0:bacc6e701fb4 150 GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
kashish_mbed 0:bacc6e701fb4 151 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
kashish_mbed 0:bacc6e701fb4 152 GPIO_InitStruct.Pull = GPIO_NOPULL;
kashish_mbed 0:bacc6e701fb4 153 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
kashish_mbed 0:bacc6e701fb4 154 GPIO_InitStruct.Alternate = GPIO_AF4_USART2;
kashish_mbed 0:bacc6e701fb4 155 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
kashish_mbed 0:bacc6e701fb4 156 }
kashish_mbed 0:bacc6e701fb4 157 if(huart->Instance == HXC_USARTX)
kashish_mbed 0:bacc6e701fb4 158 {
kashish_mbed 0:bacc6e701fb4 159 // Peripheral interrupt init
kashish_mbed 0:bacc6e701fb4 160 HAL_NVIC_SetPriority(HXC_USARTX_IRQn, 0, 0);
kashish_mbed 0:bacc6e701fb4 161 HAL_NVIC_EnableIRQ(HXC_USARTX_IRQn);
kashish_mbed 0:bacc6e701fb4 162 }
kashish_mbed 0:bacc6e701fb4 163 }
kashish_mbed 0:bacc6e701fb4 164
kashish_mbed 0:bacc6e701fb4 165 void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
kashish_mbed 0:bacc6e701fb4 166 {
kashish_mbed 0:bacc6e701fb4 167
kashish_mbed 0:bacc6e701fb4 168 if(huart->Instance == USART1)
kashish_mbed 0:bacc6e701fb4 169 {
kashish_mbed 0:bacc6e701fb4 170 /* Peripheral clock disable */
kashish_mbed 0:bacc6e701fb4 171 __HAL_RCC_USART1_CLK_DISABLE();
kashish_mbed 0:bacc6e701fb4 172 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
kashish_mbed 0:bacc6e701fb4 173 }
kashish_mbed 0:bacc6e701fb4 174 else if(huart->Instance == USART2)
kashish_mbed 0:bacc6e701fb4 175 {
kashish_mbed 0:bacc6e701fb4 176 /* Peripheral clock disable */
kashish_mbed 0:bacc6e701fb4 177 __HAL_RCC_USART2_CLK_DISABLE();
kashish_mbed 0:bacc6e701fb4 178 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
kashish_mbed 0:bacc6e701fb4 179 }
kashish_mbed 0:bacc6e701fb4 180
kashish_mbed 0:bacc6e701fb4 181 if(huart->Instance == HXC_USARTX)
kashish_mbed 0:bacc6e701fb4 182 {
kashish_mbed 0:bacc6e701fb4 183 /* Peripheral interrupt Deinit*/
kashish_mbed 0:bacc6e701fb4 184 HAL_NVIC_DisableIRQ(HXC_USARTX_IRQn);
kashish_mbed 0:bacc6e701fb4 185 }
kashish_mbed 0:bacc6e701fb4 186 }
kashish_mbed 0:bacc6e701fb4 187
kashish_mbed 0:bacc6e701fb4 188
kashish_mbed 0:bacc6e701fb4 189 void HW_UART_Modem_DeInit(void)
kashish_mbed 0:bacc6e701fb4 190 {
kashish_mbed 0:bacc6e701fb4 191 HAL_UART_DeInit(&hxcUart);
kashish_mbed 0:bacc6e701fb4 192 }
kashish_mbed 0:bacc6e701fb4 193
kashish_mbed 0:bacc6e701fb4 194
kashish_mbed 0:bacc6e701fb4 195 bool HW_UART_Modem_Receive_IT (uint8_t *aRxBuffer)
kashish_mbed 0:bacc6e701fb4 196 {
kashish_mbed 0:bacc6e701fb4 197 return ( HAL_UART_Receive_IT(&hxcUart, aRxBuffer, 1) == HAL_OK );
kashish_mbed 0:bacc6e701fb4 198 }
kashish_mbed 0:bacc6e701fb4 199
kashish_mbed 0:bacc6e701fb4 200
kashish_mbed 0:bacc6e701fb4 201 /******************************************************************************
kashish_mbed 0:bacc6e701fb4 202 * @brief Handler on Rx IRQ
kashish_mbed 0:bacc6e701fb4 203 * @param handle to the UART
kashish_mbed 0:bacc6e701fb4 204 * @retval void
kashish_mbed 0:bacc6e701fb4 205 ******************************************************************************/
kashish_mbed 0:bacc6e701fb4 206 void HW_UART_Modem_IRQHandler(void)
kashish_mbed 0:bacc6e701fb4 207 {
kashish_mbed 0:bacc6e701fb4 208 UART_HandleTypeDef *huart = &hxcUart; //ToDo
kashish_mbed 0:bacc6e701fb4 209 uint32_t isrflags = READ_REG(huart->Instance->ISR);
kashish_mbed 0:bacc6e701fb4 210 uint32_t cr1its = READ_REG(huart->Instance->CR1);
kashish_mbed 0:bacc6e701fb4 211 uint32_t cr3its = READ_REG(huart->Instance->CR3);;
kashish_mbed 0:bacc6e701fb4 212 uint32_t errorflags;
kashish_mbed 0:bacc6e701fb4 213 char rxByte = '\0';
kashish_mbed 0:bacc6e701fb4 214 int rx_ready = 0;
kashish_mbed 0:bacc6e701fb4 215
kashish_mbed 0:bacc6e701fb4 216 huart->RxState = HAL_UART_STATE_BUSY_RX;
kashish_mbed 0:bacc6e701fb4 217
kashish_mbed 0:bacc6e701fb4 218 /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
kashish_mbed 0:bacc6e701fb4 219 if(((isrflags & USART_ISR_WUF) != RESET) && ((cr3its & USART_CR3_WUFIE) != RESET))
kashish_mbed 0:bacc6e701fb4 220 {
kashish_mbed 0:bacc6e701fb4 221 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_WUF);
kashish_mbed 0:bacc6e701fb4 222
kashish_mbed 0:bacc6e701fb4 223 /* forbid stop mode */
kashish_mbed 0:bacc6e701fb4 224 LPM_SetStopMode(LPM_UART_RX_Id , LPM_Disable );
kashish_mbed 0:bacc6e701fb4 225
kashish_mbed 0:bacc6e701fb4 226 /* Enable the UART Data Register not empty Interrupts */
kashish_mbed 0:bacc6e701fb4 227 SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE);
kashish_mbed 0:bacc6e701fb4 228
kashish_mbed 0:bacc6e701fb4 229 /* Set the UART state ready to be able to start again the process */
kashish_mbed 0:bacc6e701fb4 230 huart->gState = HAL_UART_STATE_READY;
kashish_mbed 0:bacc6e701fb4 231 huart->RxState = HAL_UART_STATE_READY;
kashish_mbed 0:bacc6e701fb4 232 }
kashish_mbed 0:bacc6e701fb4 233
kashish_mbed 0:bacc6e701fb4 234 /* UART in mode Receiver ---------------------------------------------------*/
kashish_mbed 0:bacc6e701fb4 235 if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
kashish_mbed 0:bacc6e701fb4 236 {
kashish_mbed 0:bacc6e701fb4 237 /* Check that a Rx process is ongoing */
kashish_mbed 0:bacc6e701fb4 238 if(huart->RxState == HAL_UART_STATE_BUSY_RX)
kashish_mbed 0:bacc6e701fb4 239 {
kashish_mbed 0:bacc6e701fb4 240 /*RXNE flag is auto cleared by reading the data*/
kashish_mbed 0:bacc6e701fb4 241 rxByte = (uint8_t)READ_REG(huart->Instance->RDR);
kashish_mbed 0:bacc6e701fb4 242
kashish_mbed 0:bacc6e701fb4 243 /* allow stop mode*/
kashish_mbed 0:bacc6e701fb4 244 LPM_SetStopMode(LPM_UART_RX_Id , LPM_Enable );
kashish_mbed 0:bacc6e701fb4 245
kashish_mbed 0:bacc6e701fb4 246 huart->RxState = HAL_UART_STATE_READY;
kashish_mbed 0:bacc6e701fb4 247 rx_ready = 1; /* not used RxTC callback*/
kashish_mbed 0:bacc6e701fb4 248 }
kashish_mbed 0:bacc6e701fb4 249 else
kashish_mbed 0:bacc6e701fb4 250 {
kashish_mbed 0:bacc6e701fb4 251 // Clear RXNE interrupt flag
kashish_mbed 0:bacc6e701fb4 252 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
kashish_mbed 0:bacc6e701fb4 253 return;
kashish_mbed 0:bacc6e701fb4 254 }
kashish_mbed 0:bacc6e701fb4 255 }
kashish_mbed 0:bacc6e701fb4 256
kashish_mbed 0:bacc6e701fb4 257 // If error occurs
kashish_mbed 0:bacc6e701fb4 258 errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
kashish_mbed 0:bacc6e701fb4 259 if (errorflags != RESET)
kashish_mbed 0:bacc6e701fb4 260 {
kashish_mbed 0:bacc6e701fb4 261 // Error on receiving
kashish_mbed 0:bacc6e701fb4 262 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF);
kashish_mbed 0:bacc6e701fb4 263 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF);
kashish_mbed 0:bacc6e701fb4 264 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
kashish_mbed 0:bacc6e701fb4 265 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF);
kashish_mbed 0:bacc6e701fb4 266 // we skip the overrun case
kashish_mbed 0:bacc6e701fb4 267 rx_ready = 1;
kashish_mbed 0:bacc6e701fb4 268 }
kashish_mbed 0:bacc6e701fb4 269
kashish_mbed 0:bacc6e701fb4 270 if(rx_ready)
kashish_mbed 0:bacc6e701fb4 271 {
kashish_mbed 0:bacc6e701fb4 272 // Put received character in the ring buffer
kashish_mbed 0:bacc6e701fb4 273 receive(rxByte);
kashish_mbed 0:bacc6e701fb4 274 }
kashish_mbed 0:bacc6e701fb4 275 }
kashish_mbed 0:bacc6e701fb4 276
kashish_mbed 0:bacc6e701fb4 277 /******************************************************************************
kashish_mbed 0:bacc6e701fb4 278 * @Brief : Read a complete string until <CR><LF>
kashish_mbed 0:bacc6e701fb4 279 * @Param : rxBuffer - pointer for received characters
kashish_mbed 0:bacc6e701fb4 280 * rxBufferSize - size of the rxBuffer
kashish_mbed 0:bacc6e701fb4 281 * @Retval: Return the number of characters received
kashish_mbed 0:bacc6e701fb4 282 ******************************************************************************/
kashish_mbed 0:bacc6e701fb4 283 uint8_t HW_UART_Modem_GetCharactersUntilNewLine(char *rxBuffer, uint8_t rxBufferSize, uint32_t timeout)
kashish_mbed 0:bacc6e701fb4 284 {
kashish_mbed 0:bacc6e701fb4 285 uint8_t len = 0;
kashish_mbed 0:bacc6e701fb4 286 uint32_t currentTime = TimerGetCurrentTime();
kashish_mbed 0:bacc6e701fb4 287
kashish_mbed 0:bacc6e701fb4 288 while(len < (rxBufferSize - 1)) // Keep 1 byte for NULL
kashish_mbed 0:bacc6e701fb4 289 {
kashish_mbed 0:bacc6e701fb4 290 if(HW_UART_Modem_IsNewCharReceived() == false)
kashish_mbed 0:bacc6e701fb4 291 {
kashish_mbed 0:bacc6e701fb4 292 if(TimerGetElapsedTime(currentTime) > timeout)
kashish_mbed 0:bacc6e701fb4 293 {
kashish_mbed 0:bacc6e701fb4 294 break;
kashish_mbed 0:bacc6e701fb4 295 }
kashish_mbed 0:bacc6e701fb4 296 }
kashish_mbed 0:bacc6e701fb4 297 else
kashish_mbed 0:bacc6e701fb4 298 {
kashish_mbed 0:bacc6e701fb4 299 rxBuffer[len++] = (char)HW_UART_Modem_GetNewChar();
kashish_mbed 0:bacc6e701fb4 300 if(rxBuffer[len - 1] == '\n')
kashish_mbed 0:bacc6e701fb4 301 {
kashish_mbed 0:bacc6e701fb4 302 break;
kashish_mbed 0:bacc6e701fb4 303 }
kashish_mbed 0:bacc6e701fb4 304 }
kashish_mbed 0:bacc6e701fb4 305 }
kashish_mbed 0:bacc6e701fb4 306
kashish_mbed 0:bacc6e701fb4 307 rxBuffer[len] = '\0';
kashish_mbed 0:bacc6e701fb4 308 return len;
kashish_mbed 0:bacc6e701fb4 309 }
kashish_mbed 0:bacc6e701fb4 310
kashish_mbed 0:bacc6e701fb4 311 /******************************************************************************
kashish_mbed 0:bacc6e701fb4 312 * @brief To check if data has been received
kashish_mbed 0:bacc6e701fb4 313 * @param none
kashish_mbed 0:bacc6e701fb4 314 * @retval false no data / true data
kashish_mbed 0:bacc6e701fb4 315 ******************************************************************************/
kashish_mbed 0:bacc6e701fb4 316 bool HW_UART_Modem_IsNewCharReceived(void)
kashish_mbed 0:bacc6e701fb4 317 {
kashish_mbed 0:bacc6e701fb4 318 bool status;
kashish_mbed 0:bacc6e701fb4 319 // ToDo : why STM used separate PRIMASK()?
kashish_mbed 0:bacc6e701fb4 320
kashish_mbed 0:bacc6e701fb4 321 //BACKUP_PRIMASK();
kashish_mbed 0:bacc6e701fb4 322 uint32_t primask_bit= __get_PRIMASK();
kashish_mbed 0:bacc6e701fb4 323 //DISABLE_IRQ();
kashish_mbed 0:bacc6e701fb4 324 __disable_irq();
kashish_mbed 0:bacc6e701fb4 325
kashish_mbed 0:bacc6e701fb4 326 status = ((uart_context.rx_idx_toread == uart_context.rx_idx_free) ? false : true);
kashish_mbed 0:bacc6e701fb4 327
kashish_mbed 0:bacc6e701fb4 328 //RESTORE_PRIMASK();
kashish_mbed 0:bacc6e701fb4 329 __set_PRIMASK(primask_bit);
kashish_mbed 0:bacc6e701fb4 330 return status;
kashish_mbed 0:bacc6e701fb4 331 }
kashish_mbed 0:bacc6e701fb4 332
kashish_mbed 0:bacc6e701fb4 333 /******************************************************************************
kashish_mbed 0:bacc6e701fb4 334 * @brief Get the received character
kashish_mbed 0:bacc6e701fb4 335 * @param none
kashish_mbed 0:bacc6e701fb4 336 * @retval Return the data received
kashish_mbed 0:bacc6e701fb4 337 ******************************************************************************/
kashish_mbed 0:bacc6e701fb4 338 uint8_t HW_UART_Modem_GetNewChar(void)
kashish_mbed 0:bacc6e701fb4 339 {
kashish_mbed 0:bacc6e701fb4 340 uint8_t NewChar;
kashish_mbed 0:bacc6e701fb4 341
kashish_mbed 0:bacc6e701fb4 342 // BACKUP_PRIMASK();
kashish_mbed 0:bacc6e701fb4 343 uint32_t primask_bit= __get_PRIMASK();
kashish_mbed 0:bacc6e701fb4 344 // DISABLE_IRQ();
kashish_mbed 0:bacc6e701fb4 345 __disable_irq();
kashish_mbed 0:bacc6e701fb4 346
kashish_mbed 0:bacc6e701fb4 347 NewChar = uart_context.buffRx[uart_context.rx_idx_toread];
kashish_mbed 0:bacc6e701fb4 348 uart_context.rx_idx_toread = (uart_context.rx_idx_toread + 1) % sizeof(uart_context.buffRx);
kashish_mbed 0:bacc6e701fb4 349
kashish_mbed 0:bacc6e701fb4 350 // RESTORE_PRIMASK();
kashish_mbed 0:bacc6e701fb4 351 __set_PRIMASK(primask_bit);
kashish_mbed 0:bacc6e701fb4 352 return NewChar;
kashish_mbed 0:bacc6e701fb4 353 }
kashish_mbed 0:bacc6e701fb4 354
kashish_mbed 0:bacc6e701fb4 355 /******************************************************************************
kashish_mbed 0:bacc6e701fb4 356 * @brief Reset read and write index of the circular buffer
kashish_mbed 0:bacc6e701fb4 357 * @param none
kashish_mbed 0:bacc6e701fb4 358 * @retval none
kashish_mbed 0:bacc6e701fb4 359 ******************************************************************************/
kashish_mbed 0:bacc6e701fb4 360 void HW_UART_ResetBuffer(void)
kashish_mbed 0:bacc6e701fb4 361 {
kashish_mbed 0:bacc6e701fb4 362 BACKUP_PRIMASK();
kashish_mbed 0:bacc6e701fb4 363 DISABLE_IRQ();
kashish_mbed 0:bacc6e701fb4 364
kashish_mbed 0:bacc6e701fb4 365 uart_context.rx_idx_toread = uart_context.rx_idx_free;
kashish_mbed 0:bacc6e701fb4 366
kashish_mbed 0:bacc6e701fb4 367 RESTORE_PRIMASK();
kashish_mbed 0:bacc6e701fb4 368 }
kashish_mbed 0:bacc6e701fb4 369
kashish_mbed 0:bacc6e701fb4 370 /******************************************************************************
kashish_mbed 0:bacc6e701fb4 371 * @Brief : Send bytes
kashish_mbed 0:bacc6e701fb4 372 * @param : ToDo
kashish_mbed 0:bacc6e701fb4 373 * @Retval: True - if the operation is successful
kashish_mbed 0:bacc6e701fb4 374 * False - if the operation isn't successful
kashish_mbed 0:bacc6e701fb4 375 ******************************************************************************/
kashish_mbed 0:bacc6e701fb4 376 bool HW_UART_Modem_SendBytes(const char *pData, uint16_t size)
kashish_mbed 0:bacc6e701fb4 377 {
kashish_mbed 0:bacc6e701fb4 378 if (HAL_UART_Transmit(&hxcUart, (uint8_t *)pData, size, 5000) != HAL_OK)
kashish_mbed 0:bacc6e701fb4 379 {
kashish_mbed 0:bacc6e701fb4 380 return false;
kashish_mbed 0:bacc6e701fb4 381 }
kashish_mbed 0:bacc6e701fb4 382
kashish_mbed 0:bacc6e701fb4 383 return true;
kashish_mbed 0:bacc6e701fb4 384 }
kashish_mbed 0:bacc6e701fb4 385
kashish_mbed 0:bacc6e701fb4 386
kashish_mbed 0:bacc6e701fb4 387 void HW_UART_Modem_Ready(void)
kashish_mbed 0:bacc6e701fb4 388 {
kashish_mbed 0:bacc6e701fb4 389 hxcUart.gState = HAL_UART_STATE_READY;
kashish_mbed 0:bacc6e701fb4 390 hxcUart.RxState = HAL_UART_STATE_READY;
kashish_mbed 0:bacc6e701fb4 391 }
kashish_mbed 0:bacc6e701fb4 392
kashish_mbed 0:bacc6e701fb4 393
kashish_mbed 0:bacc6e701fb4 394 /******************************************************************************
kashish_mbed 0:bacc6e701fb4 395 * @brief Store in ring buffer the received character
kashish_mbed 0:bacc6e701fb4 396 * @param none
kashish_mbed 0:bacc6e701fb4 397 * @retval none
kashish_mbed 0:bacc6e701fb4 398 ******************************************************************************/
kashish_mbed 0:bacc6e701fb4 399 static void receive(char rx)
kashish_mbed 0:bacc6e701fb4 400 {
kashish_mbed 0:bacc6e701fb4 401 int next_free;
kashish_mbed 0:bacc6e701fb4 402
kashish_mbed 0:bacc6e701fb4 403 /** no need to clear the RXNE flag because it is auto cleared by reading the data*/
kashish_mbed 0:bacc6e701fb4 404 uart_context.buffRx[uart_context.rx_idx_free] = rx;
kashish_mbed 0:bacc6e701fb4 405 next_free = (uart_context.rx_idx_free + 1) % sizeof(uart_context.buffRx);
kashish_mbed 0:bacc6e701fb4 406 if (next_free != uart_context.rx_idx_toread)
kashish_mbed 0:bacc6e701fb4 407 {
kashish_mbed 0:bacc6e701fb4 408 /* this is ok to read as there is no buffer overflow in input */
kashish_mbed 0:bacc6e701fb4 409 uart_context.rx_idx_free = next_free;
kashish_mbed 0:bacc6e701fb4 410 }
kashish_mbed 0:bacc6e701fb4 411 // else
kashish_mbed 0:bacc6e701fb4 412 // {
kashish_mbed 0:bacc6e701fb4 413 // /* force the end of a command in case of overflow so that we can process it */
kashish_mbed 0:bacc6e701fb4 414 // uart_context.buffRx[uart_context.rx_idx_free] = '\r';
kashish_mbed 0:bacc6e701fb4 415 // PRINTF("uart_context.buffRx buffer overflow %d\r\n");
kashish_mbed 0:bacc6e701fb4 416 // }
kashish_mbed 0:bacc6e701fb4 417 }
kashish_mbed 0:bacc6e701fb4 418
kashish_mbed 0:bacc6e701fb4 419 /**
kashish_mbed 0:bacc6e701fb4 420 * @}
kashish_mbed 0:bacc6e701fb4 421 */
kashish_mbed 0:bacc6e701fb4 422
kashish_mbed 0:bacc6e701fb4 423 /**
kashish_mbed 0:bacc6e701fb4 424 * @}
kashish_mbed 0:bacc6e701fb4 425 */
kashish_mbed 0:bacc6e701fb4 426
kashish_mbed 0:bacc6e701fb4 427 /************************ (C) COPYRIGHT Haxiot *****END OF FILE****/
kashish_mbed 0:bacc6e701fb4 428