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vedio_gr_peach

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drivers/vdec/src/r_vdec_register.h@4:aeefe5171463, 2016-06-30 (annotated)

Committer:
dkato
Date:
Thu Jun 30 11:00:37 2016 +0000
Revision:
4:aeefe5171463
Parent:
0:853f5b7408a7 
Add ARGB4444 to graphics layer read format.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:853f5b7408a7 1 /*******************************************************************************
dkato 0:853f5b7408a7 2 * DISCLAIMER
dkato 0:853f5b7408a7 3 * This software is supplied by Renesas Electronics Corporation and is only
dkato 0:853f5b7408a7 4 * intended for use with Renesas products. No other uses are authorized. This
dkato 0:853f5b7408a7 5 * software is owned by Renesas Electronics Corporation and is protected under
dkato 0:853f5b7408a7 6 * all applicable laws, including copyright laws.
dkato 0:853f5b7408a7 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
dkato 0:853f5b7408a7 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
dkato 0:853f5b7408a7 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
dkato 0:853f5b7408a7 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
dkato 0:853f5b7408a7 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
dkato 0:853f5b7408a7 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
dkato 0:853f5b7408a7 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
dkato 0:853f5b7408a7 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
dkato 0:853f5b7408a7 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
dkato 0:853f5b7408a7 16 * Renesas reserves the right, without notice, to make changes to this software
dkato 0:853f5b7408a7 17 * and to discontinue the availability of this software. By using this software,
dkato 0:853f5b7408a7 18 * you agree to the additional terms and conditions found by accessing the
dkato 0:853f5b7408a7 19 * following link:
dkato 0:853f5b7408a7 20 * http://www.renesas.com/disclaimer
dkato 0:853f5b7408a7 21 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
dkato 0:853f5b7408a7 22 *******************************************************************************/
dkato 0:853f5b7408a7 23 /**************************************************************************//**
dkato 0:853f5b7408a7 24 * @file r_vdec_register.h
dkato 0:853f5b7408a7 25 * @version 1.00
dkato 0:853f5b7408a7 26 * $Rev: 199 $
dkato 0:853f5b7408a7 27 * $Date:: 2014-05-23 16:33:52 +0900#$
dkato 0:853f5b7408a7 28 * @brief VDEC driver register setup definitions
dkato 0:853f5b7408a7 29 ******************************************************************************/
dkato 0:853f5b7408a7 30
dkato 0:853f5b7408a7 31 #ifndef R_VDEC_REGISTER_H
dkato 0:853f5b7408a7 32 #define R_VDEC_REGISTER_H
dkato 0:853f5b7408a7 33
dkato 0:853f5b7408a7 34 /******************************************************************************
dkato 0:853f5b7408a7 35 Includes <System Includes> , "Project Includes"
dkato 0:853f5b7408a7 36 ******************************************************************************/
dkato 0:853f5b7408a7 37 #include "r_vdec.h"
dkato 0:853f5b7408a7 38 #include "r_vdec_user.h"
dkato 0:853f5b7408a7 39
dkato 0:853f5b7408a7 40
dkato 0:853f5b7408a7 41 /******************************************************************************
dkato 0:853f5b7408a7 42 Macro definitions
dkato 0:853f5b7408a7 43 ******************************************************************************/
dkato 0:853f5b7408a7 44
dkato 0:853f5b7408a7 45 /******************************************************************************
dkato 0:853f5b7408a7 46 Typedef definitions
dkato 0:853f5b7408a7 47 ******************************************************************************/
dkato 0:853f5b7408a7 48 /*! VDEC register address list */
dkato 0:853f5b7408a7 49 typedef struct {
dkato 0:853f5b7408a7 50 volatile uint16_t * adccr1;
dkato 0:853f5b7408a7 51 volatile uint16_t * tgcr1;
dkato 0:853f5b7408a7 52 volatile uint16_t * tgcr2;
dkato 0:853f5b7408a7 53 volatile uint16_t * tgcr3;
dkato 0:853f5b7408a7 54 volatile uint16_t * synscr1;
dkato 0:853f5b7408a7 55 volatile uint16_t * synscr2;
dkato 0:853f5b7408a7 56 volatile uint16_t * synscr3;
dkato 0:853f5b7408a7 57 volatile uint16_t * synscr4;
dkato 0:853f5b7408a7 58 volatile uint16_t * synscr5;
dkato 0:853f5b7408a7 59 volatile uint16_t * hafccr1;
dkato 0:853f5b7408a7 60 volatile uint16_t * hafccr2;
dkato 0:853f5b7408a7 61 volatile uint16_t * hafccr3;
dkato 0:853f5b7408a7 62 volatile uint16_t * vcdwcr1;
dkato 0:853f5b7408a7 63 volatile uint16_t * dcpcr1;
dkato 0:853f5b7408a7 64 volatile uint16_t * dcpcr2;
dkato 0:853f5b7408a7 65 volatile uint16_t * dcpcr3;
dkato 0:853f5b7408a7 66 volatile uint16_t * dcpcr4;
dkato 0:853f5b7408a7 67 volatile uint16_t * dcpcr5;
dkato 0:853f5b7408a7 68 volatile uint16_t * dcpcr6;
dkato 0:853f5b7408a7 69 volatile uint16_t * dcpcr7;
dkato 0:853f5b7408a7 70 volatile uint16_t * dcpcr8;
dkato 0:853f5b7408a7 71 volatile uint16_t * nsdcr;
dkato 0:853f5b7408a7 72 volatile uint16_t * btlcr;
dkato 0:853f5b7408a7 73 volatile uint16_t * btgpcr;
dkato 0:853f5b7408a7 74 volatile uint16_t * acccr1;
dkato 0:853f5b7408a7 75 volatile uint16_t * acccr2;
dkato 0:853f5b7408a7 76 volatile uint16_t * acccr3;
dkato 0:853f5b7408a7 77 volatile uint16_t * tintcr;
dkato 0:853f5b7408a7 78 volatile uint16_t * ycdcr;
dkato 0:853f5b7408a7 79 volatile uint16_t * agccr1;
dkato 0:853f5b7408a7 80 volatile uint16_t * agccr2;
dkato 0:853f5b7408a7 81 volatile uint16_t * pklimitcr;
dkato 0:853f5b7408a7 82 volatile uint16_t * rgorcr1;
dkato 0:853f5b7408a7 83 volatile uint16_t * rgorcr2;
dkato 0:853f5b7408a7 84 volatile uint16_t * rgorcr3;
dkato 0:853f5b7408a7 85 volatile uint16_t * rgorcr4;
dkato 0:853f5b7408a7 86 volatile uint16_t * rgorcr5;
dkato 0:853f5b7408a7 87 volatile uint16_t * rgorcr6;
dkato 0:853f5b7408a7 88 volatile uint16_t * rgorcr7;
dkato 0:853f5b7408a7 89 volatile uint16_t * afcpfcr;
dkato 0:853f5b7408a7 90 volatile uint16_t * rupdcr;
dkato 0:853f5b7408a7 91 volatile uint16_t * vsyncsr;
dkato 0:853f5b7408a7 92 volatile uint16_t * hsyncsr;
dkato 0:853f5b7408a7 93 volatile uint16_t * dcpsr1;
dkato 0:853f5b7408a7 94 volatile uint16_t * dcpsr2;
dkato 0:853f5b7408a7 95 volatile uint16_t * nsdsr;
dkato 0:853f5b7408a7 96 volatile uint16_t * cromasr1;
dkato 0:853f5b7408a7 97 volatile uint16_t * cromasr2;
dkato 0:853f5b7408a7 98 volatile uint16_t * syncssr;
dkato 0:853f5b7408a7 99 volatile uint16_t * agccsr1;
dkato 0:853f5b7408a7 100 volatile uint16_t * agccsr2;
dkato 0:853f5b7408a7 101 volatile uint16_t * ycscr3;
dkato 0:853f5b7408a7 102 volatile uint16_t * ycscr4;
dkato 0:853f5b7408a7 103 volatile uint16_t * ycscr5;
dkato 0:853f5b7408a7 104 volatile uint16_t * ycscr6;
dkato 0:853f5b7408a7 105 volatile uint16_t * ycscr7;
dkato 0:853f5b7408a7 106 volatile uint16_t * ycscr8;
dkato 0:853f5b7408a7 107 volatile uint16_t * ycscr9;
dkato 0:853f5b7408a7 108 volatile uint16_t * ycscr11;
dkato 0:853f5b7408a7 109 volatile uint16_t * ycscr12;
dkato 0:853f5b7408a7 110 volatile uint16_t * dcpcr9;
dkato 0:853f5b7408a7 111 volatile uint16_t * ygaincr;
dkato 0:853f5b7408a7 112 volatile uint16_t * cbgaincr;
dkato 0:853f5b7408a7 113 volatile uint16_t * crgaincr;
dkato 0:853f5b7408a7 114 volatile uint16_t * pga_update;
dkato 0:853f5b7408a7 115 volatile uint16_t * pgacr;
dkato 0:853f5b7408a7 116 volatile uint16_t * adccr2;
dkato 0:853f5b7408a7 117 } vdec_reg_address_t;
dkato 0:853f5b7408a7 118
dkato 0:853f5b7408a7 119 /*! VDEC register address list (for 2D filter tap coefficient) */
dkato 0:853f5b7408a7 120 typedef struct {
dkato 0:853f5b7408a7 121 volatile uint16_t * yctwa_f[VDEC_CHRFIL_TAPCOEF_NUM];
dkato 0:853f5b7408a7 122 volatile uint16_t * yctwb_f[VDEC_CHRFIL_TAPCOEF_NUM];
dkato 0:853f5b7408a7 123 volatile uint16_t * yctna_f[VDEC_CHRFIL_TAPCOEF_NUM];
dkato 0:853f5b7408a7 124 volatile uint16_t * yctnb_f[VDEC_CHRFIL_TAPCOEF_NUM];
dkato 0:853f5b7408a7 125 } vdec_filter_reg_address_t;
dkato 0:853f5b7408a7 126
dkato 0:853f5b7408a7 127
dkato 0:853f5b7408a7 128 /******************************************************************************
dkato 0:853f5b7408a7 129 Variable Externs
dkato 0:853f5b7408a7 130 ******************************************************************************/
dkato 0:853f5b7408a7 131 extern const vdec_reg_address_t vdec_reg_address[VDEC_CHANNEL_NUM];
dkato 0:853f5b7408a7 132 extern const vdec_filter_reg_address_t vdec_filter_reg_address[VDEC_CHANNEL_NUM];
dkato 0:853f5b7408a7 133
dkato 0:853f5b7408a7 134
dkato 0:853f5b7408a7 135 /******************************************************************************
dkato 0:853f5b7408a7 136 Functions Prototypes
dkato 0:853f5b7408a7 137 ******************************************************************************/
dkato 0:853f5b7408a7 138 void VDEC_Initialize(const vdec_channel_t ch, const vdec_adc_vinsel_t vinsel);
dkato 0:853f5b7408a7 139 void VDEC_ActivePeriod(const vdec_channel_t ch, const vdec_active_period_t * const param);
dkato 0:853f5b7408a7 140 void VDEC_SyncSeparation(const vdec_channel_t ch, const vdec_sync_separation_t * const param);
dkato 0:853f5b7408a7 141 void VDEC_YcSeparation(const vdec_channel_t ch, const vdec_yc_separation_t * const param);
dkato 0:853f5b7408a7 142 void VDEC_ChromaDecoding(const vdec_channel_t ch, const vdec_chroma_decoding_t * const param);
dkato 0:853f5b7408a7 143 void VDEC_DigitalClamp(const vdec_channel_t ch, const vdec_degital_clamp_t * const param);
dkato 0:853f5b7408a7 144 void VDEC_Output(const vdec_channel_t ch, const vdec_output_t * const param);
dkato 0:853f5b7408a7 145 void VDEC_Query(
dkato 0:853f5b7408a7 146 const vdec_channel_t ch,
dkato 0:853f5b7408a7 147 vdec_q_sync_sep_t * const q_sync_sep,
dkato 0:853f5b7408a7 148 vdec_q_agc_t * const q_agc,
dkato 0:853f5b7408a7 149 vdec_q_chroma_dec_t * const q_chroma_dec,
dkato 0:853f5b7408a7 150 vdec_q_digital_clamp_t * const q_digital_clamp);
dkato 0:853f5b7408a7 151
dkato 0:853f5b7408a7 152
dkato 0:853f5b7408a7 153 #endif /* R_VDEC_REGISTER_H */