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drivers/vdc5/include/r_vdc5_user.h@4:aeefe5171463, 2016-06-30 (annotated)

Committer:
dkato
Date:
Thu Jun 30 11:00:37 2016 +0000
Revision:
4:aeefe5171463
Parent:
0:853f5b7408a7 
Add ARGB4444 to graphics layer read format.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:853f5b7408a7 1 /*******************************************************************************
dkato 0:853f5b7408a7 2 * DISCLAIMER
dkato 0:853f5b7408a7 3 * This software is supplied by Renesas Electronics Corporation and is only
dkato 0:853f5b7408a7 4 * intended for use with Renesas products. No other uses are authorized. This
dkato 0:853f5b7408a7 5 * software is owned by Renesas Electronics Corporation and is protected under
dkato 0:853f5b7408a7 6 * all applicable laws, including copyright laws.
dkato 0:853f5b7408a7 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
dkato 0:853f5b7408a7 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
dkato 0:853f5b7408a7 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
dkato 0:853f5b7408a7 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
dkato 0:853f5b7408a7 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
dkato 0:853f5b7408a7 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
dkato 0:853f5b7408a7 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
dkato 0:853f5b7408a7 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
dkato 0:853f5b7408a7 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
dkato 0:853f5b7408a7 16 * Renesas reserves the right, without notice, to make changes to this software
dkato 0:853f5b7408a7 17 * and to discontinue the availability of this software. By using this software,
dkato 0:853f5b7408a7 18 * you agree to the additional terms and conditions found by accessing the
dkato 0:853f5b7408a7 19 * following link:
dkato 0:853f5b7408a7 20 * http://www.renesas.com/disclaimer
dkato 0:853f5b7408a7 21 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
dkato 0:853f5b7408a7 22 *******************************************************************************/
dkato 0:853f5b7408a7 23 /**************************************************************************//**
dkato 0:853f5b7408a7 24 * @file r_vdc5_user.h
dkato 0:853f5b7408a7 25 * @version 1.00
dkato 0:853f5b7408a7 26 * $Rev: 199 $
dkato 0:853f5b7408a7 27 * $Date:: 2014-05-23 16:33:52 +0900#$
dkato 0:853f5b7408a7 28 * @brief VDC5 driver user-defined header
dkato 0:853f5b7408a7 29 ******************************************************************************/
dkato 0:853f5b7408a7 30
dkato 0:853f5b7408a7 31 #ifndef R_VDC5_USER_H
dkato 0:853f5b7408a7 32 #define R_VDC5_USER_H
dkato 0:853f5b7408a7 33
dkato 0:853f5b7408a7 34 /******************************************************************************
dkato 0:853f5b7408a7 35 Includes <System Includes> , "Project Includes"
dkato 0:853f5b7408a7 36 ******************************************************************************/
dkato 0:853f5b7408a7 37 #include "r_typedefs.h"
dkato 0:853f5b7408a7 38 #include "iodefine.h"
dkato 0:853f5b7408a7 39
dkato 0:853f5b7408a7 40
dkato 0:853f5b7408a7 41 /******************************************************************************
dkato 0:853f5b7408a7 42 Macro definitions
dkato 0:853f5b7408a7 43 ******************************************************************************/
dkato 0:853f5b7408a7 44 /*! Compilation switch to enable parameter check functions<br>
dkato 0:853f5b7408a7 45 If this definition is enabled, the parameter check in each API function will be performed. */
dkato 0:853f5b7408a7 46 #define R_VDC5_CHECK_PARAMETERS
dkato 0:853f5b7408a7 47
dkato 0:853f5b7408a7 48
dkato 0:853f5b7408a7 49 /*! GBR to YCbCr conversion <br>
dkato 0:853f5b7408a7 50 * Matrix coefficient (typical value) for SMPTE 293M
dkato 0:853f5b7408a7 51 * - Y = 0.299 * R + 0.587 * G + 0.114 * B
dkato 0:853f5b7408a7 52 * - Cb = -0.169 * R - 0.331 * G + 0.500 * B
dkato 0:853f5b7408a7 53 * - Cr = 0.500 * R - 0.419 * G - 0.081 * B
dkato 0:853f5b7408a7 54 * @note
dkato 0:853f5b7408a7 55 * Coefficient values are represented in 11-bit two's complement integer
dkato 0:853f5b7408a7 56 * - DEFINITION = int(COEF * 256 + 0.5)
dkato 0:853f5b7408a7 57 */
dkato 0:853f5b7408a7 58 typedef enum {
dkato 0:853f5b7408a7 59 VDC5_COLORCONV_Y_R = (77u),
dkato 0:853f5b7408a7 60 VDC5_COLORCONV_Y_G = (150u),
dkato 0:853f5b7408a7 61 VDC5_COLORCONV_Y_B = (29u),
dkato 0:853f5b7408a7 62 VDC5_COLORCONV_CB_R = (2005u),
dkato 0:853f5b7408a7 63 VDC5_COLORCONV_CB_G = (1963u),
dkato 0:853f5b7408a7 64 VDC5_COLORCONV_CB_B = (128u),
dkato 0:853f5b7408a7 65 VDC5_COLORCONV_CR_R = (128u),
dkato 0:853f5b7408a7 66 VDC5_COLORCONV_CR_G = (1941u),
dkato 0:853f5b7408a7 67 VDC5_COLORCONV_CR_B = (2027u)
dkato 0:853f5b7408a7 68 } vdc5_colcnv_rgb_ycbcr_t;
dkato 0:853f5b7408a7 69
dkato 0:853f5b7408a7 70 /*! YCbCr to GBR conversion <br>
dkato 0:853f5b7408a7 71 * Matrix coefficient (typical value) for SMPTE 293M
dkato 0:853f5b7408a7 72 * - G = 1.0 * Y - 0.344 * Cb - 0.714 * Cr
dkato 0:853f5b7408a7 73 * - B = 1.0 * Y + 1.772 * Cb + 0.0 * Cr
dkato 0:853f5b7408a7 74 * - R = 1.0 * Y + 0.0 * Cb + 1.402 * Cr
dkato 0:853f5b7408a7 75 * @note
dkato 0:853f5b7408a7 76 * Coefficient values are represented in 11-bit two's complement integer
dkato 0:853f5b7408a7 77 * - DEFINITION = int(COEF * 256 + 0.5)
dkato 0:853f5b7408a7 78 */
dkato 0:853f5b7408a7 79 typedef enum {
dkato 0:853f5b7408a7 80 VDC5_COLORCONV_G_Y = (256u),
dkato 0:853f5b7408a7 81 VDC5_COLORCONV_G_CB = (1960u),
dkato 0:853f5b7408a7 82 VDC5_COLORCONV_G_CR = (1865u),
dkato 0:853f5b7408a7 83 VDC5_COLORCONV_B_Y = (256u),
dkato 0:853f5b7408a7 84 VDC5_COLORCONV_B_CB = (454u),
dkato 0:853f5b7408a7 85 VDC5_COLORCONV_B_CR = (0u),
dkato 0:853f5b7408a7 86 VDC5_COLORCONV_R_Y = (256u),
dkato 0:853f5b7408a7 87 VDC5_COLORCONV_R_CB = (0u),
dkato 0:853f5b7408a7 88 VDC5_COLORCONV_R_CR = (359u)
dkato 0:853f5b7408a7 89 } vdc5_colcnv_ycbcr_rgb_t;
dkato 0:853f5b7408a7 90
dkato 0:853f5b7408a7 91 /*! Color matrix DC offset typical value */
dkato 0:853f5b7408a7 92 #define VDC5_COLORCONV_DC_OFFSET (128u)
dkato 0:853f5b7408a7 93 /*! Color matrix coefficient value that represents one times */
dkato 0:853f5b7408a7 94 #define VDC5_COLORCONV_1TIMES_GAIN (256u)
dkato 0:853f5b7408a7 95
dkato 0:853f5b7408a7 96 /*! 1usec wait cycle for LVDS PLL */
dkato 0:853f5b7408a7 97 #define VDC5_LVDS_PLL_WAIT_CYCLE (38u)
dkato 0:853f5b7408a7 98 /*! 200usec wait counter for LVDS PLL */
dkato 0:853f5b7408a7 99 #define VDC5_LVDS_PLL_WAIT_200USEC (13400u)
dkato 0:853f5b7408a7 100
dkato 0:853f5b7408a7 101
dkato 0:853f5b7408a7 102 #endif /* R_VDC5_USER_H */
dkato 0:853f5b7408a7 103