Diff: TARGET_NUCLEO_F091RC/stm32f0xx_hal_pwr_ex.h

Revision:

122:f9eeca106725

Parent:

108:34e6b704fe68

diff -r 6c34061e7c34 -r f9eeca106725 TARGET_NUCLEO_F091RC/stm32f0xx_hal_pwr_ex.h
--- a/TARGET_NUCLEO_F091RC/stm32f0xx_hal_pwr_ex.h	Wed May 25 16:44:06 2016 +0100
+++ b/TARGET_NUCLEO_F091RC/stm32f0xx_hal_pwr_ex.h	Thu Jul 07 14:34:11 2016 +0100
@@ -2,13 +2,13 @@
   ******************************************************************************
   * @file    stm32f0xx_hal_pwr_ex.h
   * @author  MCD Application Team
-  * @version V1.3.0
-  * @date    26-June-2015
+  * @version V1.4.0
+  * @date    27-May-2016
   * @brief   Header file of PWR HAL Extension module.
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
+  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
   *
   * Redistribution and use in source and binary forms, with or without modification,
   * are permitted provided that the following conditions are met:
@@ -92,16 +92,16 @@
 /** @defgroup PWREx_WakeUp_Pins PWREx Wakeup Pins
   * @{
   */
-#if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
-    defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
-#define PWR_WAKEUP_PIN1                     ((uint32_t)0x00)
-#define PWR_WAKEUP_PIN2                     ((uint32_t)0x01)
-#define PWR_WAKEUP_PIN3                     ((uint32_t)0x02)
-#define PWR_WAKEUP_PIN4                     ((uint32_t)0x03)
-#define PWR_WAKEUP_PIN5                     ((uint32_t)0x04)
-#define PWR_WAKEUP_PIN6                     ((uint32_t)0x05)
-#define PWR_WAKEUP_PIN7                     ((uint32_t)0x06)
-#define PWR_WAKEUP_PIN8                     ((uint32_t)0x07)
+#if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
+    defined (STM32F091xC) || defined (STM32F098xx)
+#define PWR_WAKEUP_PIN1                     ((uint32_t)PWR_CSR_EWUP1)
+#define PWR_WAKEUP_PIN2                     ((uint32_t)PWR_CSR_EWUP2)
+#define PWR_WAKEUP_PIN3                     ((uint32_t)PWR_CSR_EWUP3)
+#define PWR_WAKEUP_PIN4                     ((uint32_t)PWR_CSR_EWUP4)
+#define PWR_WAKEUP_PIN5                     ((uint32_t)PWR_CSR_EWUP5)
+#define PWR_WAKEUP_PIN6                     ((uint32_t)PWR_CSR_EWUP6)
+#define PWR_WAKEUP_PIN7                     ((uint32_t)PWR_CSR_EWUP7)
+#define PWR_WAKEUP_PIN8                     ((uint32_t)PWR_CSR_EWUP8)
 
 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
                                 ((PIN) == PWR_WAKEUP_PIN2) || \
@@ -111,14 +111,45 @@
                                 ((PIN) == PWR_WAKEUP_PIN6) || \
                                 ((PIN) == PWR_WAKEUP_PIN7) || \
                                 ((PIN) == PWR_WAKEUP_PIN8))
-#else 
-#define PWR_WAKEUP_PIN1                     ((uint32_t)0x00)
-#define PWR_WAKEUP_PIN2                     ((uint32_t)0x01)
+
+#elif defined(STM32F030xC) || defined (STM32F070xB)
+#define PWR_WAKEUP_PIN1                     ((uint32_t)PWR_CSR_EWUP1)
+#define PWR_WAKEUP_PIN2                     ((uint32_t)PWR_CSR_EWUP2)
+#define PWR_WAKEUP_PIN4                     ((uint32_t)PWR_CSR_EWUP4)
+#define PWR_WAKEUP_PIN5                     ((uint32_t)PWR_CSR_EWUP5)
+#define PWR_WAKEUP_PIN6                     ((uint32_t)PWR_CSR_EWUP6)
+#define PWR_WAKEUP_PIN7                     ((uint32_t)PWR_CSR_EWUP7)
+
+#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
+                                ((PIN) == PWR_WAKEUP_PIN2) || \
+                                ((PIN) == PWR_WAKEUP_PIN4) || \
+                                ((PIN) == PWR_WAKEUP_PIN5) || \
+                                ((PIN) == PWR_WAKEUP_PIN6) || \
+                                ((PIN) == PWR_WAKEUP_PIN7))
+
+#elif defined(STM32F042x6) || defined (STM32F048xx)
+#define PWR_WAKEUP_PIN1                     ((uint32_t)PWR_CSR_EWUP1)
+#define PWR_WAKEUP_PIN2                     ((uint32_t)PWR_CSR_EWUP2)
+#define PWR_WAKEUP_PIN4                     ((uint32_t)PWR_CSR_EWUP4)
+#define PWR_WAKEUP_PIN6                     ((uint32_t)PWR_CSR_EWUP6)
+#define PWR_WAKEUP_PIN7                     ((uint32_t)PWR_CSR_EWUP7)
+
+#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
+                                ((PIN) == PWR_WAKEUP_PIN2) || \
+                                ((PIN) == PWR_WAKEUP_PIN4) || \
+                                ((PIN) == PWR_WAKEUP_PIN6) || \
+                                ((PIN) == PWR_WAKEUP_PIN7))
+
+#else
+#define PWR_WAKEUP_PIN1                     ((uint32_t)PWR_CSR_EWUP1)
+#define PWR_WAKEUP_PIN2                     ((uint32_t)PWR_CSR_EWUP2)
+
 
 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
                                 ((PIN) == PWR_WAKEUP_PIN2))
-#endif /* defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || */
-       /* defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
+
+#endif
+
 /**
   * @}
   */
@@ -333,9 +364,12 @@
   * @brief  Vddio2 Monitor EXTI line configuration: clear falling edge and rising edge trigger.
   * @retval None.
   */
-#define __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE()    EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2); \
-                                                      EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2)
-
+#define __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE()                 \
+                        do{                                          \
+                            EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2);   \
+                            EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2);   \
+                          } while(0)
+                    
 /**
   * @brief  Vddio2 Monitor EXTI line configuration: set falling edge trigger.
   * @retval None.