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Diff: TARGET_ELMO_F411RE/stm32f4xx_hal_sd.h
- Revision:
- 122:f9eeca106725
- Parent:
- 110:165afa46840b
diff -r 6c34061e7c34 -r f9eeca106725 TARGET_ELMO_F411RE/stm32f4xx_hal_sd.h
--- a/TARGET_ELMO_F411RE/stm32f4xx_hal_sd.h Wed May 25 16:44:06 2016 +0100
+++ b/TARGET_ELMO_F411RE/stm32f4xx_hal_sd.h Thu Jul 07 14:34:11 2016 +0100
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f4xx_hal_sd.h
* @author MCD Application Team
- * @version V1.4.1
- * @date 09-October-2015
+ * @version V1.5.0
+ * @date 06-May-2016
* @brief Header file of SD HAL module.
******************************************************************************
* @attention
*
- * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -45,7 +45,8 @@
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
- defined(STM32F469xx) || defined(STM32F479xx)
+ defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
+ defined(STM32F412Rx) || defined(STM32F412Cx)
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_ll_sdmmc.h"
@@ -217,52 +218,52 @@
/**
* @brief SD specific error defines
*/
- SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
- SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */
- SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
- SD_DATA_TIMEOUT = (4), /*!< Data timeout */
- SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */
- SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */
- SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */
- SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */
- SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
- SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
- SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */
- SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */
- SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
- SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
- SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
- SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
- SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
- SD_CC_ERROR = (18), /*!< Internal card controller error */
- SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */
- SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
- SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
- SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
- SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */
- SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
- SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
- SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
- SD_INVALID_VOLTRANGE = (27),
- SD_ADDR_OUT_OF_RANGE = (28),
- SD_SWITCH_ERROR = (29),
- SD_SDIO_DISABLED = (30),
- SD_SDIO_FUNCTION_BUSY = (31),
- SD_SDIO_FUNCTION_FAILED = (32),
- SD_SDIO_UNKNOWN_FUNCTION = (33),
+ SD_CMD_CRC_FAIL = (1U), /*!< Command response received (but CRC check failed) */
+ SD_DATA_CRC_FAIL = (2U), /*!< Data block sent/received (CRC check failed) */
+ SD_CMD_RSP_TIMEOUT = (3U), /*!< Command response timeout */
+ SD_DATA_TIMEOUT = (4U), /*!< Data timeout */
+ SD_TX_UNDERRUN = (5U), /*!< Transmit FIFO underrun */
+ SD_RX_OVERRUN = (6U), /*!< Receive FIFO overrun */
+ SD_START_BIT_ERR = (7U), /*!< Start bit not detected on all data signals in wide bus mode */
+ SD_CMD_OUT_OF_RANGE = (8U), /*!< Command's argument was out of range. */
+ SD_ADDR_MISALIGNED = (9U), /*!< Misaligned address */
+ SD_BLOCK_LEN_ERR = (10U), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
+ SD_ERASE_SEQ_ERR = (11U), /*!< An error in the sequence of erase command occurs. */
+ SD_BAD_ERASE_PARAM = (12U), /*!< An invalid selection for erase groups */
+ SD_WRITE_PROT_VIOLATION = (13U), /*!< Attempt to program a write protect block */
+ SD_LOCK_UNLOCK_FAILED = (14U), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
+ SD_COM_CRC_FAILED = (15U), /*!< CRC check of the previous command failed */
+ SD_ILLEGAL_CMD = (16U), /*!< Command is not legal for the card state */
+ SD_CARD_ECC_FAILED = (17U), /*!< Card internal ECC was applied but failed to correct the data */
+ SD_CC_ERROR = (18U), /*!< Internal card controller error */
+ SD_GENERAL_UNKNOWN_ERROR = (19U), /*!< General or unknown error */
+ SD_STREAM_READ_UNDERRUN = (20U), /*!< The card could not sustain data transfer in stream read operation. */
+ SD_STREAM_WRITE_OVERRUN = (21U), /*!< The card could not sustain data programming in stream mode */
+ SD_CID_CSD_OVERWRITE = (22U), /*!< CID/CSD overwrite error */
+ SD_WP_ERASE_SKIP = (23U), /*!< Only partial address space was erased */
+ SD_CARD_ECC_DISABLED = (24U), /*!< Command has been executed without using internal ECC */
+ SD_ERASE_RESET = (25U), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
+ SD_AKE_SEQ_ERROR = (26U), /*!< Error in sequence of authentication. */
+ SD_INVALID_VOLTRANGE = (27U),
+ SD_ADDR_OUT_OF_RANGE = (28U),
+ SD_SWITCH_ERROR = (29U),
+ SD_SDIO_DISABLED = (30U),
+ SD_SDIO_FUNCTION_BUSY = (31U),
+ SD_SDIO_FUNCTION_FAILED = (32U),
+ SD_SDIO_UNKNOWN_FUNCTION = (33U),
/**
* @brief Standard error defines
*/
- SD_INTERNAL_ERROR = (34),
- SD_NOT_CONFIGURED = (35),
- SD_REQUEST_PENDING = (36),
- SD_REQUEST_NOT_APPLICABLE = (37),
- SD_INVALID_PARAMETER = (38),
- SD_UNSUPPORTED_FEATURE = (39),
- SD_UNSUPPORTED_HW = (40),
- SD_ERROR = (41),
- SD_OK = (0)
+ SD_INTERNAL_ERROR = (34U),
+ SD_NOT_CONFIGURED = (35U),
+ SD_REQUEST_PENDING = (36U),
+ SD_REQUEST_NOT_APPLICABLE = (37U),
+ SD_INVALID_PARAMETER = (38U),
+ SD_UNSUPPORTED_FEATURE = (39U),
+ SD_UNSUPPORTED_HW = (40U),
+ SD_ERROR = (41U),
+ SD_OK = (0U)
}HAL_SD_ErrorTypedef;
/**
@@ -274,9 +275,9 @@
*/
typedef enum
{
- SD_TRANSFER_OK = 0, /*!< Transfer success */
- SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */
- SD_TRANSFER_ERROR = 2 /*!< Transfer failed */
+ SD_TRANSFER_OK = 0U, /*!< Transfer success */
+ SD_TRANSFER_BUSY = 1U, /*!< Transfer is occurring */
+ SD_TRANSFER_ERROR = 2U /*!< Transfer failed */
}HAL_SD_TransferStateTypedef;
/**
@@ -288,15 +289,15 @@
*/
typedef enum
{
- SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */
- SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */
- SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */
- SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */
- SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */
- SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */
- SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */
- SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */
- SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */
+ SD_CARD_READY = ((uint32_t)0x00000001U), /*!< Card state is ready */
+ SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002U), /*!< Card is in identification state */
+ SD_CARD_STANDBY = ((uint32_t)0x00000003U), /*!< Card is in standby state */
+ SD_CARD_TRANSFER = ((uint32_t)0x00000004U), /*!< Card is in transfer state */
+ SD_CARD_SENDING = ((uint32_t)0x00000005U), /*!< Card is sending an operation */
+ SD_CARD_RECEIVING = ((uint32_t)0x00000006U), /*!< Card is receiving operation information */
+ SD_CARD_PROGRAMMING = ((uint32_t)0x00000007U), /*!< Card is in programming state */
+ SD_CARD_DISCONNECTED = ((uint32_t)0x00000008U), /*!< Card is disconnected */
+ SD_CARD_ERROR = ((uint32_t)0x000000FFU) /*!< Card is in error state */
}HAL_SD_CardStateTypedef;
/**
@@ -308,10 +309,10 @@
*/
typedef enum
{
- SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */
- SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */
- SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */
- SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */
+ SD_READ_SINGLE_BLOCK = 0U, /*!< Read single block operation */
+ SD_READ_MULTIPLE_BLOCK = 1U, /*!< Read multiple blocks operation */
+ SD_WRITE_SINGLE_BLOCK = 2U, /*!< Write single block operation */
+ SD_WRITE_MULTIPLE_BLOCK = 3U /*!< Write multiple blocks operation */
}HAL_SD_OperationTypedef;
/**
@@ -330,102 +331,102 @@
/**
* @brief SD Commands Index
*/
-#define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */
-#define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */
-#define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
-#define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */
-#define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */
-#define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
+#define SD_CMD_GO_IDLE_STATE ((uint8_t)0U) /*!< Resets the SD memory card. */
+#define SD_CMD_SEND_OP_COND ((uint8_t)1U) /*!< Sends host capacity support information and activates the card's initialization process. */
+#define SD_CMD_ALL_SEND_CID ((uint8_t)2U) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
+#define SD_CMD_SET_REL_ADDR ((uint8_t)3U) /*!< Asks the card to publish a new relative address (RCA). */
+#define SD_CMD_SET_DSR ((uint8_t)4U) /*!< Programs the DSR of all cards. */
+#define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5U) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
operating condition register (OCR) content in the response on the CMD line. */
-#define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
-#define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */
-#define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
+#define SD_CMD_HS_SWITCH ((uint8_t)6U) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
+#define SD_CMD_SEL_DESEL_CARD ((uint8_t)7U) /*!< Selects the card by its own relative address and gets deselected by any other address */
+#define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8U) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
and asks the card whether card supports voltage. */
-#define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
-#define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */
-#define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */
-#define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */
-#define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */
-#define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
-#define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */
-#define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands
+#define SD_CMD_SEND_CSD ((uint8_t)9U) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
+#define SD_CMD_SEND_CID ((uint8_t)10U) /*!< Addressed card sends its card identification (CID) on the CMD line. */
+#define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11U) /*!< SD card doesn't support it. */
+#define SD_CMD_STOP_TRANSMISSION ((uint8_t)12U) /*!< Forces the card to stop transmission. */
+#define SD_CMD_SEND_STATUS ((uint8_t)13U) /*!< Addressed card sends its status register. */
+#define SD_CMD_HS_BUSTEST_READ ((uint8_t)14U)
+#define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15U) /*!< Sends an addressed card into the inactive state. */
+#define SD_CMD_SET_BLOCKLEN ((uint8_t)16U) /*!< Sets the block length (in bytes for SDSC) for all following block commands
(read, write, lock). Default block length is fixed to 512 Bytes. Not effective
for SDHS and SDXC. */
-#define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
+#define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17U) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
fixed 512 bytes in case of SDHC and SDXC. */
-#define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by
+#define SD_CMD_READ_MULT_BLOCK ((uint8_t)18U) /*!< Continuously transfers data blocks from card to host until interrupted by
STOP_TRANSMISSION command. */
-#define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
-#define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */
-#define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */
-#define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
+#define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19U) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
+#define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20U) /*!< Speed class control command. */
+#define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23U) /*!< Specify block count for CMD18 and CMD25. */
+#define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24U) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
fixed 512 bytes in case of SDHC and SDXC. */
-#define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
-#define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */
-#define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */
-#define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */
-#define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */
-#define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */
-#define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */
-#define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */
-#define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command
+#define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25U) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
+#define SD_CMD_PROG_CID ((uint8_t)26U) /*!< Reserved for manufacturers. */
+#define SD_CMD_PROG_CSD ((uint8_t)27U) /*!< Programming of the programmable bits of the CSD. */
+#define SD_CMD_SET_WRITE_PROT ((uint8_t)28U) /*!< Sets the write protection bit of the addressed group. */
+#define SD_CMD_CLR_WRITE_PROT ((uint8_t)29U) /*!< Clears the write protection bit of the addressed group. */
+#define SD_CMD_SEND_WRITE_PROT ((uint8_t)30U) /*!< Asks the card to send the status of the write protection bits. */
+#define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32U) /*!< Sets the address of the first write block to be erased. (For SD card only). */
+#define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33U) /*!< Sets the address of the last write block of the continuous range to be erased. */
+#define SD_CMD_ERASE_GRP_START ((uint8_t)35U) /*!< Sets the address of the first write block to be erased. Reserved for each command
system set by switch function command (CMD6). */
-#define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased.
+#define SD_CMD_ERASE_GRP_END ((uint8_t)36U) /*!< Sets the address of the last write block of the continuous range to be erased.
Reserved for each command system set by switch function command (CMD6). */
-#define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */
-#define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */
-#define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */
-#define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
+#define SD_CMD_ERASE ((uint8_t)38U) /*!< Reserved for SD security applications. */
+#define SD_CMD_FAST_IO ((uint8_t)39U) /*!< SD card doesn't support it (Reserved). */
+#define SD_CMD_GO_IRQ_STATE ((uint8_t)40U) /*!< SD card doesn't support it (Reserved). */
+#define SD_CMD_LOCK_UNLOCK ((uint8_t)42U) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
the SET_BLOCK_LEN command. */
-#define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather
+#define SD_CMD_APP_CMD ((uint8_t)55U) /*!< Indicates to the card that the next command is an application specific command rather
than a standard command. */
-#define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card
+#define SD_CMD_GEN_CMD ((uint8_t)56U) /*!< Used either to transfer a data block to the card or to get a data block from the card
for general purpose/application specific commands. */
-#define SD_CMD_NO_CMD ((uint8_t)64)
+#define SD_CMD_NO_CMD ((uint8_t)64U)
/**
* @brief Following commands are SD Card Specific commands.
* SDIO_APP_CMD should be sent before sending these commands.
*/
-#define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
+#define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6U) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
widths are given in SCR register. */
-#define SD_CMD_SD_APP_STATUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */
-#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
+#define SD_CMD_SD_APP_STATUS ((uint8_t)13U) /*!< (ACMD13) Sends the SD status. */
+#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22U) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
32bit+CRC data block. */
-#define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
+#define SD_CMD_SD_APP_OP_COND ((uint8_t)41U) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
send its operating condition register (OCR) content in the response on the CMD line. */
-#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
-#define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */
-#define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */
-#define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */
+#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42U) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
+#define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51U) /*!< Reads the SD Configuration Register (SCR). */
+#define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52U) /*!< For SD I/O card only, reserved for security specification. */
+#define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53U) /*!< For SD I/O card only, reserved for security specification. */
/**
* @brief Following commands are SD Card Specific security commands.
* SD_CMD_APP_CMD should be sent before sending these commands.
*/
-#define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */
-#define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */
-#define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */
-#define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */
-#define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */
-#define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */
-#define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */
-#define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */
-#define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */
-#define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */
-#define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */
+#define SD_CMD_SD_APP_GET_MKB ((uint8_t)43U) /*!< For SD card only */
+#define SD_CMD_SD_APP_GET_MID ((uint8_t)44U) /*!< For SD card only */
+#define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45U) /*!< For SD card only */
+#define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46U) /*!< For SD card only */
+#define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47U) /*!< For SD card only */
+#define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48U) /*!< For SD card only */
+#define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18U) /*!< For SD card only */
+#define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25U) /*!< For SD card only */
+#define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38U) /*!< For SD card only */
+#define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49U) /*!< For SD card only */
+#define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48U) /*!< For SD card only */
/**
* @brief Supported SD Memory Cards
*/
-#define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
-#define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
-#define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
-#define MULTIMEDIA_CARD ((uint32_t)0x00000003)
-#define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
-#define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
-#define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
-#define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
+#define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000U)
+#define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001U)
+#define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002U)
+#define MULTIMEDIA_CARD ((uint32_t)0x00000003U)
+#define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004U)
+#define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005U)
+#define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006U)
+#define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007U)
/**
* @}
*/
@@ -619,7 +620,7 @@
/**
* @brief Clear the SD's interrupt pending bits.
- * @param __HANDLE__ : SD Handle
+ * @param __HANDLE__: SD Handle
* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
* This parameter can be one or a combination of the following values:
* @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
@@ -783,7 +784,8 @@
* @}
*/
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
- STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
+ STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||
+ STM32F412Rx || STM32F412Cx */
#ifdef __cplusplus
}
#endif