Diff: TARGET_NUCLEO_F401RE/stm32f4xx_hal_sdram.h

Revision:

99:dbbf35b96557

Parent:

90:cb3d968589d8

Child:

106:ba1f97679dad

diff -r 8ab26030e058 -r dbbf35b96557 TARGET_NUCLEO_F401RE/stm32f4xx_hal_sdram.h
--- a/TARGET_NUCLEO_F401RE/stm32f4xx_hal_sdram.h	Wed Apr 29 10:16:23 2015 +0100
+++ b/TARGET_NUCLEO_F401RE/stm32f4xx_hal_sdram.h	Wed May 13 08:08:21 2015 +0200
@@ -2,13 +2,13 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_sdram.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    19-June-2014
+  * @version V1.3.0
+  * @date    09-March-2015
   * @brief   Header file of SDRAM HAL module.
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
   *
   * Redistribution and use in source and binary forms, with or without modification,
   * are permitted provided that the following conditions are met:
@@ -43,7 +43,7 @@
  extern "C" {
 #endif
 
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
 
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f4xx_ll_fmc.h"
@@ -57,6 +57,9 @@
   */ 
 
 /* Exported typedef ----------------------------------------------------------*/   
+/** @defgroup SDRAM_Exported_Types SDRAM Exported Types
+  * @{
+  */
 
 /** 
   * @brief  HAL SDRAM State structure definition  
@@ -88,19 +91,35 @@
   DMA_HandleTypeDef             *hdma;      /*!< Pointer DMA handler                   */
   
 }SDRAM_HandleTypeDef;
-         
-/* Exported types ------------------------------------------------------------*/
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
 /* Exported macro ------------------------------------------------------------*/
+/** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
+  * @{
+  */
 
 /** @brief Reset SDRAM handle state
   * @param  __HANDLE__: specifies the SDRAM handle.
   * @retval None
   */
 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
+/**
+  * @}
+  */
 
 /* Exported functions --------------------------------------------------------*/
+/** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
+  * @{
+  */
 
-/* Initialization/de-initialization functions  **********************************/
+/** @addtogroup SDRAM_Exported_Functions_Group1 
+  * @{
+  */
+
+/* Initialization/de-initialization functions *********************************/
 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
@@ -110,8 +129,14 @@
 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
+/**
+  * @}
+  */
 
-/* I/O operation functions  *****************************************************/
+/** @addtogroup SDRAM_Exported_Functions_Group2 
+  * @{
+  */
+/* I/O operation functions ****************************************************/
 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
@@ -121,7 +146,13 @@
 
 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
-
+/**
+  * @}
+  */
+  
+/** @addtogroup SDRAM_Exported_Functions_Group3 
+  * @{
+  */
 /* SDRAM Control functions  *****************************************************/
 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
@@ -129,14 +160,28 @@
 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
 uint32_t          HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
+/**
+  * @}
+  */
 
+/** @addtogroup SDRAM_Exported_Functions_Group4 
+  * @{
+  */
 /* SDRAM State functions ********************************************************/
 HAL_SDRAM_StateTypeDef  HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
+/**
+  * @}
+  */
 
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
 /**
   * @}
-  */ 
+  */
+
+/**
+  * @}
+  */
+
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
 
 /**
   * @}