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TARGET_LPC1768/PeripheralNames.h@64:e3affc9e7238, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 12:28:09 2013 +0300
Revision:
64:e3affc9e7238
Parent:
LPC2368/PeripheralNames.h@59:0883845fe643
Child:
66:9c8f0e3462fb
New build system structure, new target (LPC1347), bug fixes (I2C read/write errors, LPC11U24 memory map and others)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 44:24d45a770a51 1 /* mbed Microcontroller Library
emilmont 54:71b101360fb9 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 44:24d45a770a51 3 *
emilmont 59:0883845fe643 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 59:0883845fe643 5 * you may not use this file except in compliance with the License.
emilmont 59:0883845fe643 6 * You may obtain a copy of the License at
emilmont 59:0883845fe643 7 *
emilmont 59:0883845fe643 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 44:24d45a770a51 9 *
emilmont 59:0883845fe643 10 * Unless required by applicable law or agreed to in writing, software
emilmont 59:0883845fe643 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 59:0883845fe643 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 59:0883845fe643 13 * See the License for the specific language governing permissions and
emilmont 59:0883845fe643 14 * limitations under the License.
emilmont 44:24d45a770a51 15 */
emilmont 44:24d45a770a51 16 #ifndef MBED_PERIPHERALNAMES_H
emilmont 44:24d45a770a51 17 #define MBED_PERIPHERALNAMES_H
emilmont 44:24d45a770a51 18
emilmont 44:24d45a770a51 19 #include "cmsis.h"
emilmont 44:24d45a770a51 20
emilmont 44:24d45a770a51 21 #ifdef __cplusplus
emilmont 44:24d45a770a51 22 extern "C" {
emilmont 55:d722ed6a4237 23 #endif
emilmont 44:24d45a770a51 24
emilmont 44:24d45a770a51 25 typedef enum {
emilmont 44:24d45a770a51 26 UART_0 = (int)LPC_UART0_BASE,
emilmont 44:24d45a770a51 27 UART_1 = (int)LPC_UART1_BASE,
emilmont 44:24d45a770a51 28 UART_2 = (int)LPC_UART2_BASE,
emilmont 44:24d45a770a51 29 UART_3 = (int)LPC_UART3_BASE
emilmont 44:24d45a770a51 30 } UARTName;
emilmont 44:24d45a770a51 31
emilmont 44:24d45a770a51 32 typedef enum {
emilmont 44:24d45a770a51 33 ADC0_0 = 0,
emilmont 44:24d45a770a51 34 ADC0_1,
emilmont 44:24d45a770a51 35 ADC0_2,
emilmont 44:24d45a770a51 36 ADC0_3,
emilmont 44:24d45a770a51 37 ADC0_4,
emilmont 44:24d45a770a51 38 ADC0_5,
emilmont 44:24d45a770a51 39 ADC0_6,
emilmont 44:24d45a770a51 40 ADC0_7
emilmont 44:24d45a770a51 41 } ADCName;
emilmont 44:24d45a770a51 42
emilmont 44:24d45a770a51 43 typedef enum {
emilmont 44:24d45a770a51 44 DAC_0 = 0
emilmont 44:24d45a770a51 45 } DACName;
emilmont 44:24d45a770a51 46
emilmont 44:24d45a770a51 47 typedef enum {
emilmont 44:24d45a770a51 48 SPI_0 = (int)LPC_SSP0_BASE,
emilmont 44:24d45a770a51 49 SPI_1 = (int)LPC_SSP1_BASE
emilmont 44:24d45a770a51 50 } SPIName;
emilmont 44:24d45a770a51 51
emilmont 44:24d45a770a51 52 typedef enum {
emilmont 44:24d45a770a51 53 I2C_0 = (int)LPC_I2C0_BASE,
emilmont 44:24d45a770a51 54 I2C_1 = (int)LPC_I2C1_BASE,
emilmont 44:24d45a770a51 55 I2C_2 = (int)LPC_I2C2_BASE
emilmont 44:24d45a770a51 56 } I2CName;
emilmont 44:24d45a770a51 57
emilmont 44:24d45a770a51 58 typedef enum {
emilmont 44:24d45a770a51 59 PWM_1 = 1,
emilmont 44:24d45a770a51 60 PWM_2,
emilmont 44:24d45a770a51 61 PWM_3,
emilmont 44:24d45a770a51 62 PWM_4,
emilmont 55:d722ed6a4237 63 PWM_5,
emilmont 55:d722ed6a4237 64 PWM_6
emilmont 44:24d45a770a51 65 } PWMName;
emilmont 44:24d45a770a51 66
emilmont 55:d722ed6a4237 67 typedef enum {
emilmont 44:24d45a770a51 68 CAN_1 = (int)LPC_CAN1_BASE,
emilmont 44:24d45a770a51 69 CAN_2 = (int)LPC_CAN2_BASE
emilmont 44:24d45a770a51 70 } CANName;
emilmont 44:24d45a770a51 71
emilmont 44:24d45a770a51 72 #define STDIO_UART_TX USBTX
emilmont 44:24d45a770a51 73 #define STDIO_UART_RX USBRX
emilmont 44:24d45a770a51 74 #define STDIO_UART UART_0
emilmont 44:24d45a770a51 75
emilmont 44:24d45a770a51 76 #ifdef __cplusplus
emilmont 44:24d45a770a51 77 }
emilmont 44:24d45a770a51 78 #endif
emilmont 44:24d45a770a51 79
emilmont 44:24d45a770a51 80 #endif