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TARGET_NUCLEO_L486RG/TOOLCHAIN_ARM_STD/stm32l476xx.sct@128:9bcdf88f62b0, 2016-10-27 (annotated)

Committer:
<>
Date:
Thu Oct 27 16:45:56 2016 +0100
Revision:
128:9bcdf88f62b0
Release 128 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



2966: Add kw24 support https://github.com/ARMmbed/mbed-os/pull/2966

3068: MultiTech mDot - clean up PeripheralPins.c and add new pin names https://github.com/ARMmbed/mbed-os/pull/3068

3089: Kinetis HAL: Remove clock initialization code from serial and ticker  https://github.com/ARMmbed/mbed-os/pull/3089

2943: [NRF5] NVIC_SetVector functionality https://github.com/ARMmbed/mbed-os/pull/2943

2938: InterruptIn changes in NCS36510 HAL. https://github.com/ARMmbed/mbed-os/pull/2938

3108: Fix sleep function for NRF52. https://github.com/ARMmbed/mbed-os/pull/3108

3076: STM32F1: Correct timer master value reading https://github.com/ARMmbed/mbed-os/pull/3076

3085: Add LOWPOWERTIMER capability for NUCLEO_F303ZE https://github.com/ARMmbed/mbed-os/pull/3085

3046: [BEETLE] Update BLE stack on Beetle board https://github.com/ARMmbed/mbed-os/pull/3046

3122: [Silicon Labs] Update of Silicon Labs HAL https://github.com/ARMmbed/mbed-os/pull/3122

3022: OnSemi RAM usage fix https://github.com/ARMmbed/mbed-os/pull/3022

3121: STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH https://github.com/ARMmbed/mbed-os/pull/3121

3142: Targets- NUMAKER_PFM_NUC47216 remove mbed 2 https://github.com/ARMmbed/mbed-os/pull/3142

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 ; Scatter-Loading Description File
<> 128:9bcdf88f62b0 2 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
<> 128:9bcdf88f62b0 3 ; Copyright (c) 2015, STMicroelectronics
<> 128:9bcdf88f62b0 4 ; All rights reserved.
<> 128:9bcdf88f62b0 5 ;
<> 128:9bcdf88f62b0 6 ; Redistribution and use in source and binary forms, with or without
<> 128:9bcdf88f62b0 7 ; modification, are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 8 ;
<> 128:9bcdf88f62b0 9 ; 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 10 ; this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 11 ; 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 12 ; this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 13 ; and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 14 ; 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 15 ; may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 16 ; without specific prior written permission.
<> 128:9bcdf88f62b0 17 ;
<> 128:9bcdf88f62b0 18 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 19 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 20 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 21 ; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 22 ; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 23 ; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 24 ; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 25 ; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 26 ; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 27 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
<> 128:9bcdf88f62b0 29
<> 128:9bcdf88f62b0 30 ; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
<> 128:9bcdf88f62b0 31 LR_IROM1 0x08000000 0x100000 { ; load region size_region
<> 128:9bcdf88f62b0 32
<> 128:9bcdf88f62b0 33 ER_IROM1 0x08000000 0x100000 { ; load address = execution address
<> 128:9bcdf88f62b0 34 *.o (RESET, +First)
<> 128:9bcdf88f62b0 35 *(InRoot$$Sections)
<> 128:9bcdf88f62b0 36 .ANY (+RO)
<> 128:9bcdf88f62b0 37 }
<> 128:9bcdf88f62b0 38
<> 128:9bcdf88f62b0 39 RW_IRAM1 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1
<> 128:9bcdf88f62b0 40 .ANY (+RW +ZI)
<> 128:9bcdf88f62b0 41 }
<> 128:9bcdf88f62b0 42 ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
<> 128:9bcdf88f62b0 43 RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby
<> 128:9bcdf88f62b0 44 .ANY (+RW +ZI)
<> 128:9bcdf88f62b0 45 }
<> 128:9bcdf88f62b0 46
<> 128:9bcdf88f62b0 47 }
<> 128:9bcdf88f62b0 48