Diff: TARGET_NUCLEO_F746ZG/stm32f7xx_hal_hash.h

Revision:

122:f9eeca106725

Parent:

116:c0f6e94411f5

--- a/TARGET_NUCLEO_F746ZG/stm32f7xx_hal_hash.h	Wed May 25 16:44:06 2016 +0100
+++ b/TARGET_NUCLEO_F746ZG/stm32f7xx_hal_hash.h	Thu Jul 07 14:34:11 2016 +0100
@@ -2,13 +2,13 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_hash.h
   * @author  MCD Application Team
-  * @version V1.0.4
-  * @date    09-December-2015
+  * @version V1.1.0
+  * @date    22-April-2016
   * @brief   Header file of HASH HAL module.
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
+  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
   *
   * Redistribution and use in source and binary forms, with or without modification,
   * are permitted provided that the following conditions are met:
@@ -43,7 +43,7 @@
  extern "C" {
 #endif
 
-#if defined(STM32F756xx)
+#if defined (STM32F756xx) || defined (STM32F777xx) || defined (STM32F779xx)
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f7xx_hal_def.h"
 
@@ -85,11 +85,11 @@
 
 typedef enum
 {
-  HAL_HASH_STATE_RESET     = 0x00,  /*!< HASH not yet initialized or disabled */
-  HAL_HASH_STATE_READY     = 0x01,  /*!< HASH initialized and ready for use   */
-  HAL_HASH_STATE_BUSY      = 0x02,  /*!< HASH internal process is ongoing     */
-  HAL_HASH_STATE_TIMEOUT   = 0x03,  /*!< HASH timeout state                   */
-  HAL_HASH_STATE_ERROR     = 0x04   /*!< HASH error state                     */
+  HAL_HASH_STATE_RESET     = 0x00U,  /*!< HASH not yet initialized or disabled */
+  HAL_HASH_STATE_READY     = 0x01U,  /*!< HASH initialized and ready for use   */
+  HAL_HASH_STATE_BUSY      = 0x02U,  /*!< HASH internal process is ongoing     */
+  HAL_HASH_STATE_TIMEOUT   = 0x03U,  /*!< HASH timeout state                   */
+  HAL_HASH_STATE_ERROR     = 0x04U   /*!< HASH error state                     */
 }HAL_HASH_StateTypeDef;
 
 /** 
@@ -102,8 +102,8 @@
   
 typedef enum
 {
-  HAL_HASH_PHASE_READY     = 0x01,  /*!< HASH peripheral is ready for initialization */
-  HAL_HASH_PHASE_PROCESS   = 0x02,  /*!< HASH peripheral is in processing phase      */
+  HAL_HASH_PHASE_READY     = 0x01U,  /*!< HASH peripheral is ready for initialization */
+  HAL_HASH_PHASE_PROCESS   = 0x02U,  /*!< HASH peripheral is in processing phase      */
 }HAL_HASHPhaseTypeDef;
 
 /** 
@@ -156,7 +156,7 @@
 /** @defgroup HASH_Exported_Constants_Group1 HASH Algorithm Selection
   * @{
   */
-#define HASH_ALGOSELECTION_SHA1      ((uint32_t)0x0000)  /*!< HASH function is SHA1   */
+#define HASH_ALGOSELECTION_SHA1      ((uint32_t)0x0000U)  /*!< HASH function is SHA1   */
 #define HASH_ALGOSELECTION_SHA224    HASH_CR_ALGO_1      /*!< HASH function is SHA224 */
 #define HASH_ALGOSELECTION_SHA256    HASH_CR_ALGO        /*!< HASH function is SHA256 */
 #define HASH_ALGOSELECTION_MD5       HASH_CR_ALGO_0      /*!< HASH function is MD5    */
@@ -167,7 +167,7 @@
 /** @defgroup HASH_Exported_Constants_Group2 HASH Algorithm Mode
   * @{
   */
-#define HASH_ALGOMODE_HASH         ((uint32_t)0x00000000)  /*!< Algorithm is HASH */ 
+#define HASH_ALGOMODE_HASH         ((uint32_t)0x00000000U)  /*!< Algorithm is HASH */ 
 #define HASH_ALGOMODE_HMAC         HASH_CR_MODE            /*!< Algorithm is HMAC */
 /**
   * @}
@@ -176,7 +176,7 @@
 /** @defgroup HASH_Data_Type HASH Data Type
   * @{
   */
-#define HASH_DATATYPE_32B          ((uint32_t)0x0000) /*!< 32-bit data. No swapping                     */
+#define HASH_DATATYPE_32B          ((uint32_t)0x0000U) /*!< 32-bit data. No swapping                     */
 #define HASH_DATATYPE_16B          HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped       */
 #define HASH_DATATYPE_8B           HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped            */
 #define HASH_DATATYPE_1B           HASH_CR_DATATYPE   /*!< 1-bit data. In the word all bits are swapped */
@@ -188,7 +188,7 @@
   * @brief HASH HMAC Long key used only for HMAC mode
   * @{
   */
-#define HASH_HMAC_KEYTYPE_SHORTKEY      ((uint32_t)0x00000000)  /*!< HMAC Key is <= 64 bytes */
+#define HASH_HMAC_KEYTYPE_SHORTKEY      ((uint32_t)0x00000000U)  /*!< HMAC Key is <= 64 bytes */
 #define HASH_HMAC_KEYTYPE_LONGKEY       HASH_CR_LKEY            /*!< HMAC Key is > 64 bytes  */
 /**
   * @}
@@ -435,7 +435,7 @@
 /**
   * @}
   */ 
-#endif /* STM32F756xx */
+#endif /* STM32F756xx || STM32F777xx || STM32F779xx */
 /**
   * @}
   */