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Diff: TARGET_NUCLEO_F411RE/stm32f4xx_hal_nor.h
- Revision:
- 122:f9eeca106725
- Parent:
- 110:165afa46840b
--- a/TARGET_NUCLEO_F411RE/stm32f4xx_hal_nor.h Wed May 25 16:44:06 2016 +0100
+++ b/TARGET_NUCLEO_F411RE/stm32f4xx_hal_nor.h Thu Jul 07 14:34:11 2016 +0100
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f4xx_hal_nor.h
* @author MCD Application Team
- * @version V1.4.1
- * @date 09-October-2015
+ * @version V1.5.0
+ * @date 06-May-2016
* @brief Header file of NOR HAL module.
******************************************************************************
* @attention
*
- * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -44,9 +44,10 @@
#endif
/* Includes ------------------------------------------------------------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
+ defined(STM32F412Vx)
#include "stm32f4xx_ll_fsmc.h"
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
@@ -63,7 +64,8 @@
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+ defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
+ defined(STM32F412Vx)
/* Exported typedef ----------------------------------------------------------*/
/** @defgroup NOR_Exported_Types NOR Exported Types
@@ -75,11 +77,11 @@
*/
typedef enum
{
- HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */
- HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */
- HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */
- HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */
- HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */
+ HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */
+ HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
+ HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
+ HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
+ HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */
}HAL_NOR_StateTypeDef;
/**
@@ -87,7 +89,7 @@
*/
typedef enum
{
- HAL_NOR_STATUS_SUCCESS = 0,
+ HAL_NOR_STATUS_SUCCESS = 0U,
HAL_NOR_STATUS_ONGOING,
HAL_NOR_STATUS_ERROR,
HAL_NOR_STATUS_TIMEOUT
@@ -230,29 +232,29 @@
* @{
*/
/* NOR device IDs addresses */
-#define MC_ADDRESS ((uint16_t)0x0000)
-#define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
-#define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
-#define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
+#define MC_ADDRESS ((uint16_t)0x0000U)
+#define DEVICE_CODE1_ADDR ((uint16_t)0x0001U)
+#define DEVICE_CODE2_ADDR ((uint16_t)0x000EU)
+#define DEVICE_CODE3_ADDR ((uint16_t)0x000FU)
/* NOR CFI IDs addresses */
-#define CFI1_ADDRESS ((uint16_t)0x61)
-#define CFI2_ADDRESS ((uint16_t)0x62)
-#define CFI3_ADDRESS ((uint16_t)0x63)
-#define CFI4_ADDRESS ((uint16_t)0x64)
+#define CFI1_ADDRESS ((uint16_t)0x0061U)
+#define CFI2_ADDRESS ((uint16_t)0x0062U)
+#define CFI3_ADDRESS ((uint16_t)0x0063U)
+#define CFI4_ADDRESS ((uint16_t)0x0064U)
/* NOR operation wait timeout */
-#define NOR_TMEOUT ((uint16_t)0xFFFF)
+#define NOR_TMEOUT ((uint16_t)0xFFFFU)
/* NOR memory data width */
-#define NOR_MEMORY_8B ((uint8_t)0x0)
-#define NOR_MEMORY_16B ((uint8_t)0x1)
+#define NOR_MEMORY_8B ((uint8_t)0x00U)
+#define NOR_MEMORY_16B ((uint8_t)0x01U)
/* NOR memory device read/write start address */
-#define NOR_MEMORY_ADRESS1 ((uint32_t)0x60000000)
-#define NOR_MEMORY_ADRESS2 ((uint32_t)0x64000000)
-#define NOR_MEMORY_ADRESS3 ((uint32_t)0x68000000)
-#define NOR_MEMORY_ADRESS4 ((uint32_t)0x6C000000)
+#define NOR_MEMORY_ADRESS1 ((uint32_t)0x60000000U)
+#define NOR_MEMORY_ADRESS2 ((uint32_t)0x64000000U)
+#define NOR_MEMORY_ADRESS3 ((uint32_t)0x68000000U)
+#define NOR_MEMORY_ADRESS4 ((uint32_t)0x6C000000U)
/**
* @}
*/
@@ -268,7 +270,7 @@
* @param ADDRESS: NOR memory address
* @retval NOR shifted address value
*/
-#define NOR_ADDR_SHIFT(__NOR_ADDRESS__, NOR_MEMORY_WIDTH, ADDRESS) (uint32_t)(((NOR_MEMORY_WIDTH) == NOR_MEMORY_8B)? ((uint32_t)((__NOR_ADDRESS__) + (2 * (ADDRESS)))):\
+#define NOR_ADDR_SHIFT(__NOR_ADDRESS__, NOR_MEMORY_WIDTH, ADDRESS) (uint32_t)(((NOR_MEMORY_WIDTH) == NOR_MEMORY_16B)? ((uint32_t)((__NOR_ADDRESS__) + (2U * (ADDRESS)))):\
((uint32_t)((__NOR_ADDRESS__) + (ADDRESS))))
/**
@@ -284,7 +286,8 @@
*/
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
- STM32F446xx || STM32F469xx || STM32F479xx */
+ STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
+ STM32F412Vx */
/**
* @}
*/