Diff: TARGET_DISCO_L476VG/TOOLCHAIN_IAR/stm32l476xx.icf

Revision:

108:34e6b704fe68

Parent:

107:4f6c30876dfa

Child:

120:7c328cabac7e

--- a/TARGET_DISCO_L476VG/TOOLCHAIN_IAR/stm32l476xx.icf	Wed Sep 16 15:32:31 2015 +0100
+++ b/TARGET_DISCO_L476VG/TOOLCHAIN_IAR/stm32l476xx.icf	Fri Oct 02 07:35:07 2015 +0200
@@ -3,20 +3,20 @@
 define symbol __region_ROM_start__ = 0x08000000;
 define symbol __region_ROM_end__   = 0x080FFFFF;
 
-/* [RAM = 128kb = 0x20000] */
+/* [RAM = 96kb + 32kb = 0x20000] */
 /* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
-define symbol __NVIC_start__          = 0x20000000;
-define symbol __NVIC_end__            = 0x20000187; /* Aligned on 8 bytes (392 = 49 x 8) */
-define symbol __region_RAM_start__    = 0x20000188;
-define symbol __region_RAM_end__      = 0x2001FFFF;
-define symbol __region_SRAM2_start__  = 0x10000000;
+define symbol __NVIC_start__          = 0x10000000;
+define symbol __NVIC_end__            = 0x10000187; /* Aligned on 8 bytes (392 = 49 x 8) */
+define symbol __region_SRAM2_start__  = 0x10000188;
 define symbol __region_SRAM2_end__    = 0x10007FFF;
+define symbol __region_SRAM1_start__  = 0x20000000;
+define symbol __region_SRAM1_end__    = 0x20017FFF;
 
 /* Memory regions */
 define memory mem with size = 4G;
 define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
-define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
 define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
+define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
 
 /* Stack 1/8 and Heap 1/4 of RAM */
 define symbol __size_cstack__ = 0x4000;
@@ -31,5 +31,5 @@
 place at address mem:__intvec_start__ { readonly section .intvec };
 
 place in ROM_region   { readonly };
-place in RAM_region   { readwrite, block STACKHEAP };
-place in SRAM2_region { };
\ No newline at end of file
+place in SRAM2_region   { readwrite, block STACKHEAP };
+place in SRAM1_region { };