Diff: TARGET_KL27Z/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct

Revision:

125:2e9cc70d1897

Parent:

122:f9eeca106725

Child:

127:25aea2a3f4e3

--- a/TARGET_KL27Z/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct	Fri Aug 19 10:17:11 2016 +0100
+++ b/TARGET_KL27Z/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct	Wed Aug 31 18:09:46 2016 +0100
@@ -15,7 +15,7 @@
 **     Abstract:
 **         Linker file for the Keil ARM C/C++ Compiler
 **
-**     Copyright (c) 2015 Freescale Semiconductor, Inc.
+**     Copyright (c) 2016 Freescale Semiconductor, Inc.
 **     All rights reserved.
 **
 **     Redistribution and use in source and binary forms, with or without modification,
@@ -50,6 +50,10 @@
 */
 #define __ram_vector_table__            1
 
+/* Heap 1/4 of ram and stack 1/8 */
+#define __stack_size__       0x800
+#define __heap_size__        0x1000
+
 #if (defined(__ram_vector_table__))
   #define __ram_vector_table_size__    0x00000200
 #else
@@ -71,22 +75,42 @@
 #define m_data_start                   (m_interrupts_ram_start + m_interrupts_ram_size)
 #define m_data_size                    (0x00004000 - m_interrupts_ram_size)
 
+/* Sizes */
+#if (defined(__stack_size__))
+  #define Stack_Size                   __stack_size__
+#else
+  #define Stack_Size                   0x0400
+#endif
 
-LR_m_text m_interrupts_start 0x10000 {   ; load region size_region
+#if (defined(__heap_size__))
+  #define Heap_Size                    __heap_size__
+#else
+  #define Heap_Size                    0x0400
+#endif
+
+LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start {   ; load region size_region
   VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
     * (RESET,+FIRST)
   }
   ER_m_flash_config m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
     * (FlashConfig)
   }
-  ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
+  ER_m_text m_text_start m_text_size { ; load address = execution address
     * (InRoot$$Sections)
     .ANY (+RO)
   }
+
+#if (defined(__ram_vector_table__))
   VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
   }
-  RW_IRAM1 m_data_start m_data_size { ; RW data
+#else
+  VECTOR_RAM m_interrupts_start EMPTY 0 {
+  }
+#endif
+  RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
     .ANY (+RW +ZI)
   }
+  RW_IRAM1 +0 EMPTY Heap_Size { ; RW data
+  }
 }