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Revision:
127:25aea2a3f4e3
Parent:
124:2241e3a39974
--- a/TARGET_K66F/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct	Fri Sep 16 13:57:13 2016 +0100
+++ b/TARGET_K66F/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct	Fri Sep 30 16:49:46 2016 +0100
@@ -7,12 +7,12 @@
 **     Compiler:            Keil ARM C/C++ Compiler
 **     Reference manual:    K66P144M180SF5RMV2, Rev. 1, Mar 2015
 **     Version:             rev. 3.0, 2015-03-25
-**     Build:               b151009
+**     Build:               b160406
 **
 **     Abstract:
 **         Linker file for the Keil ARM C/C++ Compiler
 **
-**     Copyright (c) 2015 Freescale Semiconductor, Inc.
+**     Copyright (c) 2016 Freescale Semiconductor, Inc.
 **     All rights reserved.
 **
 **     Redistribution and use in source and binary forms, with or without modification,
@@ -47,6 +47,10 @@
 */
 #define __ram_vector_table__            1
 
+/* Heap 1/4 of ram and stack 1/8 */
+#define __stack_size__       0x8000
+#define __heap_size__        0x10000
+
 #if (defined(__ram_vector_table__))
   #define __ram_vector_table_size__    0x00000400
 #else
@@ -71,24 +75,44 @@
 #define m_data_2_start                 0x20000000
 #define m_data_2_size                  0x00030000
 
+/* Sizes */
+#if (defined(__stack_size__))
+  #define Stack_Size                   __stack_size__
+#else
+  #define Stack_Size                   0x0400
+#endif
 
-LR_m_text m_interrupts_start m_text_size+m_interrupts_size+m_flash_config_size {   ; load region size_region
+#if (defined(__heap_size__))
+  #define Heap_Size                    __heap_size__
+#else
+  #define Heap_Size                    0x0400
+#endif
+
+LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start {   ; load region size_region
   VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
     * (RESET,+FIRST)
   }
-  ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address
+  ER_m_flash_config m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
     * (FlashConfig)
   }
   ER_m_text m_text_start m_text_size { ; load address = execution address
     * (InRoot$$Sections)
     .ANY (+RO)
   }
+
+#if (defined(__ram_vector_table__))
+  VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
+  }
+#else
+  VECTOR_RAM m_interrupts_start EMPTY 0 {
+  }
+#endif
   RW_m_data m_data_start m_data_size { ; RW data
     .ANY (+RW +ZI)
   }
-  RW_IRAM1 m_data_2_start m_data_2_size { ; RW data
+  RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
     .ANY (+RW +ZI)
   }
-  VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {  
+  RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up
   }
-}
\ No newline at end of file
+}