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spi_api.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
102:da0ca467f8b5 
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 65:5798e58a58b1 1 /* mbed Microcontroller Library
bogdanm 65:5798e58a58b1 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 65:5798e58a58b1 3 *
bogdanm 65:5798e58a58b1 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 65:5798e58a58b1 5 * you may not use this file except in compliance with the License.
bogdanm 65:5798e58a58b1 6 * You may obtain a copy of the License at
bogdanm 65:5798e58a58b1 7 *
bogdanm 65:5798e58a58b1 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 65:5798e58a58b1 9 *
bogdanm 65:5798e58a58b1 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 65:5798e58a58b1 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 65:5798e58a58b1 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 65:5798e58a58b1 13 * See the License for the specific language governing permissions and
bogdanm 65:5798e58a58b1 14 * limitations under the License.
bogdanm 65:5798e58a58b1 15 */
bogdanm 65:5798e58a58b1 16 #ifndef MBED_SPI_API_H
bogdanm 65:5798e58a58b1 17 #define MBED_SPI_API_H
bogdanm 65:5798e58a58b1 18
bogdanm 65:5798e58a58b1 19 #include "device.h"
Kojto 98:8ab26030e058 20 #include "dma_api.h"
Kojto 98:8ab26030e058 21 #include "buffer.h"
bogdanm 65:5798e58a58b1 22
bogdanm 65:5798e58a58b1 23 #if DEVICE_SPI
bogdanm 65:5798e58a58b1 24
Kojto 98:8ab26030e058 25 #define SPI_EVENT_ERROR (1 << 1)
Kojto 98:8ab26030e058 26 #define SPI_EVENT_COMPLETE (1 << 2)
Kojto 98:8ab26030e058 27 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
Kojto 98:8ab26030e058 28 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
Kojto 98:8ab26030e058 29
Kojto 122:f9eeca106725 30 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
Kojto 98:8ab26030e058 31
Kojto 98:8ab26030e058 32 #define SPI_FILL_WORD (0xFFFF)
Kojto 98:8ab26030e058 33
Kojto 98:8ab26030e058 34 #if DEVICE_SPI_ASYNCH
Kojto 122:f9eeca106725 35 /** Asynch SPI HAL structure
Kojto 98:8ab26030e058 36 */
Kojto 98:8ab26030e058 37 typedef struct {
Kojto 122:f9eeca106725 38 struct spi_s spi; /**< Target specific SPI structure */
Kojto 98:8ab26030e058 39 struct buffer_s tx_buff; /**< Tx buffer */
Kojto 98:8ab26030e058 40 struct buffer_s rx_buff; /**< Rx buffer */
Kojto 98:8ab26030e058 41 } spi_t;
Kojto 98:8ab26030e058 42
Kojto 98:8ab26030e058 43 #else
Kojto 122:f9eeca106725 44 /** Non-asynch SPI HAL structure
Kojto 98:8ab26030e058 45 */
Kojto 98:8ab26030e058 46 typedef struct spi_s spi_t;
Kojto 98:8ab26030e058 47
Kojto 98:8ab26030e058 48 #endif
Kojto 98:8ab26030e058 49
bogdanm 65:5798e58a58b1 50 #ifdef __cplusplus
bogdanm 65:5798e58a58b1 51 extern "C" {
bogdanm 65:5798e58a58b1 52 #endif
bogdanm 65:5798e58a58b1 53
Kojto 98:8ab26030e058 54 /**
Kojto 122:f9eeca106725 55 * \defgroup hal_GeneralSPI SPI Configuration Functions
Kojto 98:8ab26030e058 56 * @{
Kojto 98:8ab26030e058 57 */
Kojto 98:8ab26030e058 58
Kojto 98:8ab26030e058 59 /** Initialize the SPI peripheral
Kojto 98:8ab26030e058 60 *
Kojto 98:8ab26030e058 61 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
Kojto 98:8ab26030e058 62 * @param[out] obj The SPI object to initialize
Kojto 98:8ab26030e058 63 * @param[in] mosi The pin to use for MOSI
Kojto 98:8ab26030e058 64 * @param[in] miso The pin to use for MISO
Kojto 98:8ab26030e058 65 * @param[in] sclk The pin to use for SCLK
Kojto 98:8ab26030e058 66 * @param[in] ssel The pin to use for SSEL
Kojto 98:8ab26030e058 67 */
Kojto 98:8ab26030e058 68 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
Kojto 98:8ab26030e058 69
Kojto 98:8ab26030e058 70 /** Release a SPI object
Kojto 98:8ab26030e058 71 *
Kojto 98:8ab26030e058 72 * TODO: spi_free is currently unimplemented
Kojto 98:8ab26030e058 73 * This will require reference counting at the C++ level to be safe
Kojto 98:8ab26030e058 74 *
Kojto 98:8ab26030e058 75 * Return the pins owned by the SPI object to their reset state
Kojto 98:8ab26030e058 76 * Disable the SPI peripheral
Kojto 98:8ab26030e058 77 * Disable the SPI clock
Kojto 98:8ab26030e058 78 * @param[in] obj The SPI object to deinitialize
Kojto 98:8ab26030e058 79 */
Kojto 98:8ab26030e058 80 void spi_free(spi_t *obj);
Kojto 98:8ab26030e058 81
Kojto 98:8ab26030e058 82 /** Configure the SPI format
Kojto 98:8ab26030e058 83 *
Kojto 122:f9eeca106725 84 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
Kojto 122:f9eeca106725 85 * The default bit order is MSB.
Kojto 98:8ab26030e058 86 * @param[in,out] obj The SPI object to configure
Kojto 98:8ab26030e058 87 * @param[in] bits The number of bits per frame
Kojto 98:8ab26030e058 88 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
Kojto 98:8ab26030e058 89 * @param[in] slave Zero for master mode or non-zero for slave mode
Kojto 98:8ab26030e058 90 */
Kojto 98:8ab26030e058 91 void spi_format(spi_t *obj, int bits, int mode, int slave);
Kojto 98:8ab26030e058 92
Kojto 98:8ab26030e058 93 /** Set the SPI baud rate
Kojto 98:8ab26030e058 94 *
Kojto 98:8ab26030e058 95 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
Kojto 98:8ab26030e058 96 * Configures the SPI peripheral's baud rate
Kojto 98:8ab26030e058 97 * @param[in,out] obj The SPI object to configure
Kojto 98:8ab26030e058 98 * @param[in] hz The baud rate in Hz
Kojto 98:8ab26030e058 99 */
Kojto 98:8ab26030e058 100 void spi_frequency(spi_t *obj, int hz);
Kojto 98:8ab26030e058 101
Kojto 98:8ab26030e058 102 /**@}*/
Kojto 98:8ab26030e058 103 /**
Kojto 98:8ab26030e058 104 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
Kojto 98:8ab26030e058 105 * @{
Kojto 98:8ab26030e058 106 */
Kojto 98:8ab26030e058 107
Kojto 98:8ab26030e058 108 /** Write a byte out in master mode and receive a value
Kojto 98:8ab26030e058 109 *
Kojto 98:8ab26030e058 110 * @param[in] obj The SPI peripheral to use for sending
Kojto 98:8ab26030e058 111 * @param[in] value The value to send
Kojto 98:8ab26030e058 112 * @return Returns the value received during send
Kojto 98:8ab26030e058 113 */
Kojto 98:8ab26030e058 114 int spi_master_write(spi_t *obj, int value);
Kojto 98:8ab26030e058 115
Kojto 98:8ab26030e058 116 /** Check if a value is available to read
Kojto 98:8ab26030e058 117 *
Kojto 98:8ab26030e058 118 * @param[in] obj The SPI peripheral to check
Kojto 98:8ab26030e058 119 * @return non-zero if a value is available
Kojto 98:8ab26030e058 120 */
Kojto 98:8ab26030e058 121 int spi_slave_receive(spi_t *obj);
Kojto 98:8ab26030e058 122
Kojto 98:8ab26030e058 123 /** Get a received value out of the SPI receive buffer in slave mode
Kojto 98:8ab26030e058 124 *
Kojto 98:8ab26030e058 125 * Blocks until a value is available
Kojto 98:8ab26030e058 126 * @param[in] obj The SPI peripheral to read
Kojto 98:8ab26030e058 127 * @return The value received
Kojto 98:8ab26030e058 128 */
Kojto 98:8ab26030e058 129 int spi_slave_read(spi_t *obj);
bogdanm 65:5798e58a58b1 130
Kojto 98:8ab26030e058 131 /** Write a value to the SPI peripheral in slave mode
Kojto 98:8ab26030e058 132 *
Kojto 98:8ab26030e058 133 * Blocks until the SPI peripheral can be written to
Kojto 98:8ab26030e058 134 * @param[in] obj The SPI peripheral to write
Kojto 98:8ab26030e058 135 * @param[in] value The value to write
Kojto 98:8ab26030e058 136 */
Kojto 98:8ab26030e058 137 void spi_slave_write(spi_t *obj, int value);
Kojto 98:8ab26030e058 138
Kojto 98:8ab26030e058 139 /** Checks if the specified SPI peripheral is in use
Kojto 98:8ab26030e058 140 *
Kojto 98:8ab26030e058 141 * @param[in] obj The SPI peripheral to check
Kojto 98:8ab26030e058 142 * @return non-zero if the peripheral is currently transmitting
Kojto 98:8ab26030e058 143 */
Kojto 98:8ab26030e058 144 int spi_busy(spi_t *obj);
Kojto 98:8ab26030e058 145
Kojto 98:8ab26030e058 146 /** Get the module number
Kojto 98:8ab26030e058 147 *
Kojto 98:8ab26030e058 148 * @param[in] obj The SPI peripheral to check
Kojto 98:8ab26030e058 149 * @return The module number
Kojto 98:8ab26030e058 150 */
Kojto 98:8ab26030e058 151 uint8_t spi_get_module(spi_t *obj);
Kojto 98:8ab26030e058 152
Kojto 98:8ab26030e058 153 /**@}*/
Kojto 98:8ab26030e058 154
Kojto 98:8ab26030e058 155 #if DEVICE_SPI_ASYNCH
Kojto 98:8ab26030e058 156 /**
Kojto 98:8ab26030e058 157 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
Kojto 98:8ab26030e058 158 * @{
Kojto 98:8ab26030e058 159 */
Kojto 98:8ab26030e058 160
Kojto 98:8ab26030e058 161 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
Kojto 98:8ab26030e058 162 *
Kojto 122:f9eeca106725 163 * @param[in] obj The SPI object that holds the transfer information
Kojto 122:f9eeca106725 164 * @param[in] tx The transmit buffer
Kojto 122:f9eeca106725 165 * @param[in] tx_length The number of bytes to transmit
Kojto 122:f9eeca106725 166 * @param[in] rx The receive buffer
Kojto 122:f9eeca106725 167 * @param[in] rx_length The number of bytes to receive
Kojto 98:8ab26030e058 168 * @param[in] bit_width The bit width of buffer words
Kojto 98:8ab26030e058 169 * @param[in] event The logical OR of events to be registered
Kojto 98:8ab26030e058 170 * @param[in] handler SPI interrupt handler
Kojto 98:8ab26030e058 171 * @param[in] hint A suggestion for how to use DMA with this transfer
Kojto 98:8ab26030e058 172 */
Kojto 102:da0ca467f8b5 173 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
Kojto 98:8ab26030e058 174
Kojto 98:8ab26030e058 175 /** The asynchronous IRQ handler
Kojto 98:8ab26030e058 176 *
Kojto 98:8ab26030e058 177 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
Kojto 98:8ab26030e058 178 * conditions, such as buffer overflows or transfer complete.
Kojto 122:f9eeca106725 179 * @param[in] obj The SPI object that holds the transfer information
Kojto 122:f9eeca106725 180 * @return Event flags if a transfer termination condition was met; otherwise 0.
Kojto 98:8ab26030e058 181 */
Kojto 98:8ab26030e058 182 uint32_t spi_irq_handler_asynch(spi_t *obj);
Kojto 98:8ab26030e058 183
Kojto 122:f9eeca106725 184 /** Attempts to determine if the SPI peripheral is already in use
Kojto 98:8ab26030e058 185 *
Kojto 98:8ab26030e058 186 * If a temporary DMA channel has been allocated, peripheral is in use.
Kojto 98:8ab26030e058 187 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
Kojto 98:8ab26030e058 188 * channel were allocated.
Kojto 98:8ab26030e058 189 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
Kojto 98:8ab26030e058 190 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
Kojto 98:8ab26030e058 191 * there are any bytes in the FIFOs.
Kojto 98:8ab26030e058 192 * @param[in] obj The SPI object to check for activity
Kojto 122:f9eeca106725 193 * @return Non-zero if the SPI port is active or zero if it is not.
Kojto 98:8ab26030e058 194 */
Kojto 98:8ab26030e058 195 uint8_t spi_active(spi_t *obj);
Kojto 98:8ab26030e058 196
Kojto 98:8ab26030e058 197 /** Abort an SPI transfer
Kojto 98:8ab26030e058 198 *
Kojto 98:8ab26030e058 199 * @param obj The SPI peripheral to stop
Kojto 98:8ab26030e058 200 */
Kojto 98:8ab26030e058 201 void spi_abort_asynch(spi_t *obj);
Kojto 98:8ab26030e058 202
Kojto 98:8ab26030e058 203
Kojto 98:8ab26030e058 204 #endif
Kojto 98:8ab26030e058 205
Kojto 98:8ab26030e058 206 /**@}*/
bogdanm 65:5798e58a58b1 207
bogdanm 65:5798e58a58b1 208 #ifdef __cplusplus
bogdanm 65:5798e58a58b1 209 }
Kojto 98:8ab26030e058 210 #endif // __cplusplus
bogdanm 65:5798e58a58b1 211
Kojto 98:8ab26030e058 212 #endif // SPI_DEVICE
bogdanm 65:5798e58a58b1 213
Kojto 98:8ab26030e058 214 #endif // MBED_SPI_API_H